- 09 Jun, 2017 4 commits
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Tobias Klauser authored
struct irq_domain_ops is not modified, so it can be made const. Suggested-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Tobias Klauser <tklauser@distanz.ch> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Alexandre TORGUE authored
There is no link between the number of elements of tab which contains all pin desc (located in each pinctrl-stm32xxxx.c files) and the pin number (defined in the tab). Signed-off-by:
Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Jerome Brunet authored
Add GPIO interrupt information to pinctrl data. Added to the original version from Jerome was data for Meson GXL. Signed-off-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Acked-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Heiner Kallweit authored
After commit 34e61801 "pinctrl: meson-gxbb: Add missing GPIODV_18 pin entry" I started to get the following warning: "meson-pinctrl c8834000.periphs:pinctrl@4b0: names 119 do not match number of GPIOs 120" It turned out that not the mentioned commit has a problem, it just revealed another problem which had existed before. There is no PIN GPIOX_22 on Meson GXBB. Fixes: 468c234f ("pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC") Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 31 May, 2017 3 commits
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Linus Walleij authored
Merge tag 'sh-pfc-for-v4.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.13 - Add PWM, AVB MDIO/MII, and sound pin groups on R-Car M3-W, - Add support for RZ/G1M and RZ/G1E, - Small fixes and cleanups.
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Alexandre TORGUE authored
Add .get_direction() gpiochip callback in STM32 pinctrl driver. Signed-off-by:
Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Alexandre TORGUE authored
This patch ensures that pin is correctly set as gpio input when it is used as an interrupt. Signed-off-by:
Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 30 May, 2017 1 commit
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Arnd Bergmann authored
With "SPI_MASTER=y && I2C=m", we can build mcp23s08 as a built-in driver, which then results in a link failure: drivers/pinctrl/built-in.o: In function `mcp23s08_probe_one.isra.0': :(.text+0x7910): undefined reference to `__devm_regmap_init_i2c' drivers/pinctrl/built-in.o: In function `mcp23s08_init': :(.init.text+0x110): undefined reference to `i2c_register_driver' drivers/pinctrl/built-in.o: In function `mcp23s08_exit': :(.exit.text+0x3c): undefined reference to `i2c_del_driver' To avoid the problem, this adds another dependency on I2C that enforces mcp23s08 to be a loadable module whenever the I2C core is a module. Fixes: 64ac43e6 ("gpio: mcp23s08: move to pinctrl") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Reviewed-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 29 May, 2017 23 commits
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Martin Schiller authored
Signed-off-by:
Martin Schiller <ms@dev.tdt.de> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Icenowy Zheng authored
Allwinner R40 has a pin controller like the ones in older Allwinner SoCs (especially A20), and can use modified version of the A10/A20 pinctrl driver. Add a compatible string for it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Acked-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Icenowy Zheng authored
As we added A20 support to A10 pinctrl driver, now we can delete the dedicated A20 pinctrl driver, which is duplicated code. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Reviewed-by:
Chen-Yu Tsai <wens@csie.org> [Drop Makefile entry] Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Icenowy Zheng authored
As A20 is designed as a pin-compatible upgrade of A10, their pin controller are very similar, and can share one driver. Add A20 support to the A10 driver. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Reviewed-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Icenowy Zheng authored
Allwinner A10, A20 and R40 SoCs have similar GPIO layout. Add SoC definitions in pinctrl-sunxi.h, in order to merge A20 support into A10 driver, and add R40 support into it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Reviewed-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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David Wu authored
There are 2 IP blocks pin routes need to be switched, that are uart2dbg, pcie_clkreq. Signed-off-by:
David Wu <david.wu@rock-chips.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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David Wu authored
There are 8 IP blocks pin routes need to be switched, that are uart2dbg, gmac-m1-optimized, pdm, spi, i2s2, card, tsp, cif. Signed-off-by:
David Wu <david.wu@rock-chips.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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David Wu authored
There are 9 IP blocks pin routes need to be switched, that are pwm-0, pwm-1, pwm-2, pwm-3, sdio, spi, emmc, uart2, uart1. Signed-off-by:
David Wu <david.wu@rock-chips.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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David Wu authored
On the some rockchip SOCS, some things like rk3399 specific uart2 can use multiple pins. Somewhere between the pin io-cells and the uart it seems to have some sort of switch to decide to which pin to actually route the data. +-------+ +--------+ /- GPIO4_B0 (pinmux 2) | uart2 | -- | switch | --- GPIO4_C0 (pinmux 2) +-------+ +--------+ \- GPIO4_C3 (pinmux 2) (switch selects one of the 3 pins base on the GRF_SOC_CON7[BIT0, BIT1]) The routing switch is determined by one pin of a specific group to be set to its special pinmux function. If the pinmux setting is wrong for that pin the ip block won't work correctly anyway. Signed-off-by:
David Wu <david.wu@rock-chips.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Fix compile errors due to missing OF. Cc: Paul Cercueil <paul@crapouillou.net> Reported-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs enables the Link and Activity LEDs signals. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
Add the AO and EE domain CEC pins for the Amlogic Meson GXBB SoCs. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The AO SPDIF pins were incorrectly defined with the EE pin offset. Fixes: b840d649 ("pinctrl: meson: gxl: add spdif output pins") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The AO I2S pins were incorrectly defined with the EE pin offset. Fixes: 2899adf0 ("pinctrl: meson: gxl: add i2s output pins") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
GPIODV_18 entry was missing in the original driver push. Fixes: 468c234f ("pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
GPIODV_18 entry was missing in the original driver push. Fixes: 0f15f500 ("pinctrl: meson: Add GXL pinctrl definitions") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Gortmaker authored
Fixups here tend to be more of a conglomerate of some of the other repeated/systematic ones we've seen in the earlier pinctrl cleanups. We remove module.h from code that isn't doing anything modular at all; if they have __init sections, then replace it with init.h One driver has a .remove that would be dispatched on module_exit, and as that code is essentially orphaned, so we remove it. In case anyone was previously doing the (pointless) unbind to get to that function, we disable unbind for this one driver as well. A couple bool drivers (hence non-modular) are converted over to to builtin_platform_driver(). Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Eric Anholt <eric@anholt.net> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jon Mason <jonmason@broadcom.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Sherman Yin <syin@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: linux-gpio@vger.kernel.org Cc: linux-rpi-kernel@lists.infradead.org Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Tested-by:
Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Paul Gortmaker authored
None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the drivers there is no doubt they are builtin-only. All drivers get similar changes, so they are handled in batch. We remove module.h from code that isn't doing anything modular at all; if they have __init sections, then replace it with init.h. A couple drivers have module_exit() code that is essentially orphaned, and so we remove that. Quite a few bool drivers (hence non-modular) are converted over to to builtin_platform_driver(). Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Pritesh Raithatha <praithatha@nvidia.com> Cc: Ashwini Ghuge <aghuge@nvidia.com> Cc: linux-gpio@vger.kernel.org Cc: linux-tegra@vger.kernel.org Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Masahiro Yamada authored
Use of_device_get_match_data() instead of of_match_device(). It allows us to remove the forward declaration of pcs_of_match. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Shawn Guo authored
There are a couple of issues with group_desc initialization in function zx_pinctrl_build_state(). - num_pins is not initialized and remains zero. - pins shouldn't be initialized with a pointer to variable in the stack. With them fixed, pin_request() in pinmux_enable_setting() can be invoked correctly. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The SPICC controller has dedicated SPI pins, this patchs add the pins definition in the GXBB pinctrl driver Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
The SPICC controller has dedicated SPI pins, this patchs add the pins definition in the GXL pinctrl driver. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 23 May, 2017 9 commits
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Chen-Yu Tsai authored
We use well known standard names for functions that have name, such as I2C, SPI, SPDIF, etc.. Fix the function name of SPDIF, which was named OWA (One Wire Audio) based on Allwinner datasheets. Fixes: 4730f33f ("pinctrl: sunxi: add allwinner A83T PIO controller support") Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Gregory CLEMENT authored
There was no entry for the mvebu pinctrl drivers. As they are tightly linked to the SoCs and there is a lot of common code to support the various pinctrl of each SoCs, then add a new entry for the mvebu maintainers. Reviewed-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Mauro Carvalho Chehab authored
Each text file under Documentation follows a different format. Some doesn't even have titles! Change its representation to follow the adopted standard, using ReST markups for it to be parseable by Sphinx. This document is almost following the standard stile. There are only two things to adjust on it: - promote the level of the document title; - mark literal blocks as such. Signed-off-by:
Mauro Carvalho Chehab <mchehab@s-opensource.com> [Fix some indentations] Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
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Sebastian Reichel authored
The comment does not match the driver, which actually supports automatic assignment. Fix this by updating the comment. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
The driver supports using mcp23xxx as interrupt controller, so let's drop all comments stating otherwise. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
This moves irq property handling from spi/i2c specific code into the generic mcp23s08_probe_one. This is possible because the device properties are named equally. As a side-effect this drops support for setting the properties via pdata, which has no mainline users. If boardcode wants to enable the chip as interrupt controller it can attach the device properties instead. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Sebastian Reichel authored
Simplify spi pdata handling, so that it uses pdata when available and falls back to reading device properties otherwise. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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