- 21 Jun, 2015 27 commits
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Paul Burton authored
Ingenic have actually varied the vendor/company ID of the XBurst cores across their range of SoCs, whilst keeping the product ID & revision constant... Add definitions for vendor IDs known to be used in some of Ingenic's newer SoCs, and handle them in the same way as the existing Ingenic vendor ID from the JZ4740. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Co-authored-by: Paul Cercueil <paul@crapouillou.net> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-kernel@vger.kernel.org Cc: Huacai Chen <chenhc@lemote.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/10128/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Burton authored
In preparation for supporting Ingenic SoCs other than the JZ4740, introduce MACH_INGENIC to Kconfig & move MACH_JZ4740 to a separate entry selected by the board when appropriate. This allows MACH_INGENIC to be used to enable things generic across Ingenic SoCs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Andrew Bresticker <abrestic@chromium.org> Patchwork: https://patchwork.linux-mips.org/patch/10130/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Burton authored
Define a vendor prefix for Qi Hardware, creators of the Ben Nanonote (qi_lb60) among other open devices. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: Hayato Suzuki <hytszk@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: linux-kernel@vger.kernel.org Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Cc: Arnaud Ebalard <arno@natisbad.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Antony Pavlov <antonynpavlov@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10142/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Burton authored
Define a vendor prefix for Ingenic Semiconductor, a vendor of MIPS-based SoCs. Simply use 'ingenic'. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: Hayato Suzuki <hytszk@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Cc: linux-kernel@vger.kernel.org Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Cc: Arnaud Ebalard <arno@natisbad.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Antony Pavlov <antonynpavlov@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10129/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Update CPU overrides for the DEC port with the recent additions, shaving off some effectively dead code: text data bss dec hex filename 5586952 233132 5990368 11810452 b43694 vmlinux.32-old 5581248 233140 5990368 11804756 b42054 vmlinux.32-new text data bss dec hex filename 6036936 356648 10756544 17150128 105b0b0 vmlinux.64-old 6029896 360752 10756544 17147192 105a538 vmlinux.64-new The data size increase is due to the special alignment requirement of `init_thread_union' aka `.data..init_task' moving it up to the nearest page boundary and making the amount of padding at its front rely on how far within a page text ends. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10197/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Brian Norris authored
The cmdlinepart parser is already supported in the default probe. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10071/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Replace an explicit barrier with a useful processor instruction in TLB invalidation, following several other such cases elsewhere in `tlb-r3k.c'. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10196/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Move the initialisation of the CP0.Wired register implemented by Toshiba TX3922 and TX3927 processors from `tx39_cache_init' to `tlb_init' where it belongs, correcting code structure and making sure initialisation does not rely on `tx39_cache_init' being called before `tlb_init' to work correctly. Make `r3k_have_wired_reg' static as it's no longer externally referred to; remove a stale declaration too. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10195/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Most R3k processor implementations have their 8 first TLB entries fixed as wired, so we always skip them in TLB invalidation. That however means any leftover entries present there at boot will stay throughout the life of the kernel, unless replaced with new ones. So rename `local_flush_tlb_all' to `local_flush_tlb_from' and make it accept the TLB entry to start from. Then use 0 initially at bootstrap, and the first regular entry later on, bypassing any wired entries. Wrap the latter arrangement into a new `local_flush_tlb_all' entry point. There is no need to disable interrupts in the call made from `tlb_init' because it's made before the interrupt subsystem has been initialised; this is also true for secondary processors, should we ever support R3k SMP. So move this piece of code to new `local_flush_tlb_all'. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10194/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
XPA extends the physical addresses on MIPS32, including the EntryLo registers. Update dump_tlb() to concatenate the PFNX field from the high end of the EntryLo registers (as read by mfhc0). The width of physical and virtual addresses are also separated to show only 8 nibbles of virtual but 11 nibbles of physical with XPA. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10077/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
The RI/XI bits when present are above the PFN field in the EntryLo registers, at bits 63,62 when read with dmfc0, and bits 31,30 when read with mfc0. This makes them appear as part of the physical address, since the other bits are masked with PAGE_MASK, for example: Index: 253 pgmask=16kb va=77b18000 asid=75 [pa=1000744000 c=5 d=1 v=1 g=0] [pa=100134c000 c=5 d=1 v=1 g=0] The physical addresses have bit 36 set, which corresponds to bit 30 of EntryLo1, the XI bit. Explicitly mask off the RI and XI bits from the printed physical address, and print the RI and XI bits separately if they exist, giving output more like this: Index: 226 pgmask=16kb va=77be0000 asid=79 [ri=0 xi=1 pa=01288000 c=5 d=1 v=1 g=0] [ri=0 xi=0 pa=010e4000 c=5 d=0 v=1 g=0] Cc: linux-mips@linux-mips.org Cc: James Hogan <james.hogan@imgtec.com> Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/10080/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
The EHINV bit in EntryHi allows a TLB entry to be properly marked invalid so that EntryHi doesn't have to be set to a unique value to avoid machine check exceptions due to multiple matching entries. Unfortunately dump_tlb() doesn't take this into account so it will print all the uninteresting invalid TLB entries if the current ASID happens to be 00. Therefore add a condition to skip entries which are marked invalid with the EHINV bit. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10076/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
The TLB only matches the ASID when the global bit isn't set, so dump_tlb() shouldn't really be skipping global entries just because the ASID doesn't match. Fix the condition to read the TLB entry's global bit from EntryLo0. Note that after a TLB read the global bits in both EntryLo registers reflect the same global bit in the TLB entry. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10079/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
Make use of recently added EntryLo bit definitions in mipsregs.h when dumping TLB contents. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10075/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
Refactor the TLB matching code in dump_tlb() slightly so that the conditions which can cause a TLB entry to be skipped can be more easily extended. This should prevent the match condition getting unwieldy once it is updated to take further conditions into account. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10081/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
Use the new tlb read hazard macros from <asm/hazards.h> rather than the local BARRIER() macro which uses 7 ops regardless of the kernel configuration. We use mtc0_tlbr_hazard for the hazard between mtc0 to the index register and the tlbr, and tlb_read_hazard for the hazard between the tlbr and the mfc0 of the TLB registers written by tlbr. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10074/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
Add definitions for EntryLo register bits in mipsregs.h. The R4000 compatible ones are prefixed MIPS_ENTRYLO_ and the R3000 compatible ones are prefixed R3K_ENTRYLO_. These will be used in later patches. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Maciej W. Rozycki <macro@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/10073/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
Add hazard macros to <asm/hazards.h> for the following hazards around tlbr (TLB read) instructions, which are used in TLB dumping code and some KVM TLB management code: - mtc0_tlbr_hazard Between mtc0 (Index) and tlbr. This is copied from mtc0_tlbw_hazard in all cases on the assumption that tlbr always has similar data user timings to tlbw. - tlb_read_hazard Between tlbr and mfc0 (various TLB registers). This is copied from tlbw_use_hazard in all cases on the assumption that tlbr has similar data writer characteristics to tlbw, and mfc0 has similar data user characteristics to loads and stores. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10078/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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James Hogan authored
Add a MIPS specific SysRq operation to dump the TLB entries on all CPUs, using the 'x' trigger key. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10072/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Petri Gynther authored
Print Exception Code when printing the Cause register. Signed-off-by: Petri Gynther <pgynther@google.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9998/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
Extra bcma buses may be totally different models, see following dump: boardtype=0x0646 pci/1/1/boardtype=0x0545 pci/2/1/boardtype=0x62b We need to detect them properly to allow drivers apply some board specific hacks. [ralf@linux-mips.org: folded in Rafal's fix.] Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/10028/ Patchwork: https://patchwork.linux-mips.org/patch/10048/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
New devices may have more than 1 Ethernet core (device). We should extract info about them to make it available to Ethernet drivers. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Hante Meuleman <meuleman@broadcom.com> Cc: Ian Kent <raven@themaw.net> Patchwork: https://patchwork.linux-mips.org/patch/10027/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
For years we planned to get rid of old u16 fields, let's start doing it with MIPS code. This process will take some time, it requires doing the same in ssb/bcma and then switching all drivers to new fields. This will be handled in separated patches submitted to appropriate trees. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/10026/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
First of all it shouldn't modify copied NVRAM just to make sure it can loop over all entries. It's enough to just compare current position pointer with the end of buffer address. Secondly buffer is guaranteed to be \0 ended, so we don't need strnchr. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Hante Meuleman <meuleman@broadcom.com> Cc: Ian Kent <raven@themaw.net> Patchwork: https://patchwork.linux-mips.org/patch/10032/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
This will simplify reading its contents. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Hante Meuleman <meuleman@broadcom.com> Cc: Ian Kent <raven@themaw.net> Patchwork: https://patchwork.linux-mips.org/patch/10031/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
All the necessary support code is already there so all that's left is to enable the feature in kconfig. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- 15 Jun, 2015 7 commits
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Linus Torvalds authored
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git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds authored
Pull dmaengine fixes from Vinod Koul: "Here are hopefully last set of fixes for 4.1. This time we have: - fixing pause capability reporting on both dmaengine pause & resume support by Krzysztof - locking fix fir at_xdmac by Ludovic - slave configuration fix for at_xdmac by Ludovic" * 'fixes' of git://git.infradead.org/users/vkoul/slave-dma: dmaengine: Fix choppy sound because of unimplemented resume dmaengine: at_xdmac: rework slave configuration part dmaengine: at_xdmac: lock fixes
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git://github.com/jonmason/ntbLinus Torvalds authored
Pull NTB fixes from Jon Mason: "I apologize for the tardiness of this request. Here are a couple of last minute NTB bug fixes for v4.1: NTB bug fixes to address issues in unmapping the MW reg base and vbase, and an uninitialized variable on Atom platforms" * tag 'ntb-4.1' of git://github.com/jonmason/ntb: ntb: initialize max_mw for Atom before using it ntb: iounmap MW reg and vbase in error path
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git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds authored
Pull more MIPS fixes from Ralf Baechle: "Another round of 4.1 MIPS fixes, one fix to a MIPS-specific #if condition in lib/mpi, one fix to the MIPS GIC irqchip driver and one SSB fix. Details: - fix handling of clock in chipco SSB driver. - fix two MIPS-specific #if conditions to correctly work for GCC 5.1. - fix damage to R6 pgtable bits done by XPA support. - fix possible crash due to unloading modules that contain statically defined platform devices. - fix disabling of the MSA ASE on context switch to also work correctly when a new thread/process has the CPU for the very first time. This is part of linux-next and has been beaten to death on Imagination's test farm. While things are not looking too grim this pull request also means the rate of fixes for 4.1 remains nearly constant so I'd not be unhappy if you'd delay the release" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MPI: MIPS: Fix compilation error with GCC 5.1 IRQCHIP: mips-gic: Don't nest calls to do_IRQ() MIPS: MSA: bugfix - disable MSA correctly for new threads/processes. MIPS: Loongson: Do not register 8250 platform device from module. MIPS: Cobalt: Do not build MTD platform device registration code as module. SSB: Fix handling of ssb_pmu_get_alp_clock() MIPS: pgtable-bits: Fix XPA damage to R6 definitions.
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull irqchip fix from Thomas Gleixner: "A single fix for an off by one bug in the sunxi irqchip driver" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip: sunxi-nmi: Fix off-by-one error in irq iterator
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull lockdep fix from Ingo Molnar: "A lockdep/modules unload race fix that can oops" * 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: lockdep: Fix a race between /proc/lock_stat and module unload
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull perf fixes from Ingo Molnar: "A regression fix for a crash, and a Intel HSW uncore PMU driver fix" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: Revert "perf/x86/intel/uncore: Move uncore_box_init() out of driver initialization" perf/x86/intel/uncore: Fix CBOX bit wide and UBOX reg on Haswell-EP
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- 14 Jun, 2015 1 commit
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git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/soundLinus Torvalds authored
Pull sound fixes from Takashi Iwai: "Most of commits are regression fixes for HD-audio: a few corner case fixes for regmap transition, and i915 binding issues. In addition, a quirk for another USB-audio device supporting DSD" * tag 'sound-4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: hda - Abort the probe without i915 binding for HSW/BDW ALSA: hda - Re-add the lost fake mute support ALSA: hda - Continue probing even if i915 binding fails ALSA: hda - Don't actually write registers for caps overwrites ALSA: hda - fix number of devices query on hotplug ALSA: usb-audio: add native DSD support for JLsounds I2SoverUSB
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- 13 Jun, 2015 3 commits
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Jaedon Shin authored
This patch fixes mips compilation error: lib/mpi/generic_mpih-mul1.c: In function 'mpihelp_mul_1': lib/mpi/longlong.h:651:2: error: impossible constraint in 'asm' Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/10546/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rabin Vincent authored
The GIC chained handlers use do_IRQ() to call the subhandlers. This means that irq_enter() calls get nested, which leads to preempt count looking like we're in nested interrupts, which in turn leads to all system time being accounted as IRQ time in account_system_time(). Fix it by using generic_handle_irq(). Since these same functions are used in some systems (if cpu_has_veic) from a low-level vectored interrupt handler which does not go throught do_IRQ(), we need to do it conditionally. Signed-off-by: Rabin Vincent <rabin.vincent@axis.com> Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Patchwork: https://patchwork.linux-mips.org/patch/10545/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds authored
Pull networking fixes from David Miller: 1) Fix uninitialized struct station_info in cfg80211_wireless_stats(), from Johannes Berg. 2) Revert commit attempt to fix ipv6 protocol resubmission, it adds regressions. 3) Endless loops can be created in bridge port lists, fix from Nikolay Aleksandrov. 4) Don't WARN_ON() if sk->sk_forward_alloc is non-zero in sk_clear_memalloc, it is a legal situation during swap deactivation. Fix from Mel Gorman. 5) Fix order of disabling interrupts and unlocking NAPI in enic driver to avoid a race. From Govindarajulu Varadarajan. 6) High and low register writes are swapped when programming the start of periodic output in igb driver. From Richard Cochran. 7) Fix device rename handling in mpls stack, from Robert Shearman. 8) Do not trigger compaction synchronously when optimistically trying to allocate an order 3 page in alloc_skb_with_frags() and skb_page_frag_refill(). From Shaohua Li. 9) Authentication with COOKIE_ECHO is not handled properly in SCTP, fix from Marcelo Ricardo Leitner. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: Doc: networking: Fix URL for wiki.wireshark.org in udplite.txt sctp: allow authenticating DATA chunks that are bundled with COOKIE_ECHO net: don't wait for order-3 page allocation mpls: handle device renames for per-device sysctls net: igb: fix the start time for periodic output signals enic: fix memory leak in rq_clean enic: check return value for stat dump enic: unlock napi busy poll before unmasking intr net, swap: Remove a warning and clarify why sk_mem_reclaim is required when deactivating swap bridge: fix multicast router rlist endless loop tipc: disconnect socket directly after probe failure Revert "ipv6: Fix protocol resubmission" cfg80211: wext: clear sinfo struct before calling driver
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- 12 Jun, 2015 2 commits
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Masanari Iida authored
This patch fix URL (http to https) for wiki.wireshark.org. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Marcelo Ricardo Leitner authored
Currently, we can ask to authenticate DATA chunks and we can send DATA chunks on the same packet as COOKIE_ECHO, but if you try to combine both, the DATA chunk will be sent unauthenticated and peer won't accept it, leading to a communication failure. This happens because even though the data was queued after it was requested to authenticate DATA chunks, it was also queued before we could know that remote peer can handle authenticating, so sctp_auth_send_cid() returns false. The fix is whenever we set up an active key, re-check send queue for chunks that now should be authenticated. As a result, such packet will now contain COOKIE_ECHO + AUTH + DATA chunks, in that order. Reported-by: Liu Wei <weliu@redhat.com> Signed-off-by: Marcelo Ricardo Leitner <marcelo.leitner@gmail.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Acked-by: Vlad Yasevich <vyasevich@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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