- 11 Jun, 2015 6 commits
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Kevin Hilman authored
* socfpga/soc: ARM: socfpga: fix build error due to secondary_startup
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Kevin Hilman authored
After commit 02b4e275 (ARM: v7 setup function should invalidate L1 cache) the soc specific secondary_startup is removed, causing build failures: ../arch/arm/mach-socfpga/platsmp.c: In function 'socfpga_a10_boot_secondary': ../arch/arm/mach-socfpga/platsmp.c:66:140: error: 'socfpga_secondary_startup' undeclared (first use in this function) ../arch/arm/mach-socfpga/platsmp.c:66:140: note: each undeclared identifier is reported only once for each function it appears in To fix, use the generic secondary_startup. Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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Krzysztof Kozlowski authored
Extend the Exynos entry to ARM64 device tree sources. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene@kernel.org> Cc: Kevin Hilman <khilman@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by:
Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by:
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Kevin Hilman authored
Merge tag 'samsung-mach-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Samsung updates for v4.2 - add failure(exception) handling : of_iomap(), of_find_device_by_node() and kstrdup() - add common poweroff to use PS_HOLD based for all of exynos SoCs - add exnos_get/set_boot_addr() helper - constify platform_device_id and irq_domain_ops - get current parent clock for power domain on/off - use core_initcall to register power domain driver - make exynos_core_restart() less verbose - add support coupled CPUidle for exynos3250 - fix exynos_boot_secondary() return value on timeout - fix clk_enable() in s3c24xx adc - fix missing of_node_put() for power domains * tag 'samsung-mach-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (301 commits) ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ARM: EXYNOS: Get current parent clock for power domain on/off ARM: SAMSUNG: fix clk_enable() WARNing in S3C24XX ADC ARM: EXYNOS: Add missing of_node_put() when parsing power domains ARM: EXYNOS: Handle of_find_device_by_node() and kstrdup() failures ARM: EXYNOS: Handle of of_iomap() failure Linux 4.1-rc4 ....
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Mika Westerberg authored
This includes setting up EGPIOs 0 and 9 for card detection and chip select respectively. This patch is needed to mount a root filesystem on the SPI-based MMC card reader found on the Sim.One. Signed-off-by:
Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by:
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git://github.com/hisilicon/linux-hisiKevin Hilman authored
ARM64: Hisilicon ARM64 SoC Updates for V4.2 - Added Hisilicon ARM64 SoC family support in Kconfig and defconfig * tag 'hi6220-soc-for-4.2' of git://github.com/hisilicon/linux-hisi: arm64: Enable Hisilicon ARMv8 SoC family in Kconfig and defconfig
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- 10 Jun, 2015 6 commits
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Shawn Guo authored
Update my mailbox to use kernel.org one for handling kernel community maintenance traffic. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
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Kevin Hilman authored
Merge tag 'imx-soc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc The i.MX SoC updates for 4.2: - Add new SoC i.MX7D support, which integrates two Cortex-A7 and one Cortex-M4 cores. - Support suspend from IRAM on i.MX53, so that DDR pins can be set to high impedance for more power saving during suspend. - Move i.MX clock drivers from arch/arm/mach-imx to drivers/clk/imx. - Move i.MX GPT timer driver from arch/arm/mach-imx into drivers/clocksource. - A couple of clock driver update for VF610 and i.MX6Q. - A few random code correction and improvement. * tag 'imx-soc-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (44 commits) ARM: imx: imx7d requires anatop clocksource: timer-imx-gpt: remove include of <asm/mach/time.h> ARM: imx: move timer driver into drivers/clocksource ARM: imx: remove platform headers from timer driver ARM: imx: provide gpt device specific irq functions ARM: imx: get rid of variable timer_base ARM: imx: define gpt register offset per device type ARM: imx: move clock event variables into imx_timer ARM: imx: set up .set_next_event hook via imx_gpt_data ARM: imx: setup tctl register in device specific function ARM: imx: initialize gpt device type for DT boot ARM: imx: define an enum for gpt timer device type ARM: imx: move timer resources into a structure ARM: imx: use relaxed IO accessor in timer driver ARM: imx: make imx51/3 suspend optional ARM: clk-imx6q: refine sata's parent ARM: imx: clk-v610: Add clock for I2C2 and I2C3 ARM: mach-imx: iomux-imx31: Use DECLARE_BITMAP ARM: imx: add imx7d clk tree support ARM: clk: imx: update pllv3 to support imx7 ... Conflicts: arch/arm/mach-imx/Kconfig
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Kevin Hilman authored
* socfpga/soc: ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
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Alan Tull authored
Add code that requests that the sdr controller go into self-refresh mode. This code is run from ocram. Suspend-to-RAM and EDAC support are mutually exclusive on SOCFPGA. If the EDAC is enabled, it will prevent the platform from going into suspend. Example of how to request to suspend to ram: $ echo enabled > \ /sys/devices/soc/ffc02000.serial0/tty/ttyS0/power/wakeup $ echo -n mem > /sys/power/state Signed-off-by:
Alan Tull <atull@opensource.altera.com> Signed-off-by:
Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by:
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Dinh Nguyen authored
Add boot_secondary implementation for the Arria10 platform. Bringing up the secondary core on the Arria 10 platform is pretty similar to the Cyclone/Arria 5 platform, with the exception of the following differences: - Register offset to bringup CPU1 out of reset is different. - The cpu1-start-addr for Arria10 contains an additional nibble. Signed-off-by:
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Dinh Nguyen authored
Convert cyclone5/arria5 to use CPU_METHOD_OF_DECLARE for smp operations. Signed-off-by:
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- 05 Jun, 2015 15 commits
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Marek Szyprowski authored
SYSMMU devices are registered very early in arch_initcall, so ensure that they can get access to power domains by registering power domain driver from earlier initcall. This change requires dropping usage of the platform device associated with each power domain and replacing clock calls with respective of_clk_* equivalents. Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Kukjin Kim <kgene@kernel.org>
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Marek Szyprowski authored
PS_HOLD based power off procedure is common for all Exynos SoCs, so use it for every Exynos SoCs. Signed-off-by:
Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by:
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Krzysztof Kozlowski authored
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by:
Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by:
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Krzysztof Kozlowski authored
The irq_domain_ops are not modified by the driver and the irqdomain core code accepts pointer to a const data. Signed-off-by:
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Bartlomiej Zolnierkiewicz authored
The following patch adds coupled cpuidle support for Exynos3250 to an existing cpuidle-exynos driver. As a result it enables AFTR mode to be used by default on Exynos3250 without the need to hot unplug CPU1 first. The detailed changelog: - use exynos_[get,set]_boot_addr() in cpuidle-exynos.c and then make cpu_boot_reg_base() static - use exynos_core_restart() in exynos_cpu0_enter_aftr() - add missing smp_rmb() to exynos_cpu0_enter_aftr() (to make the code in-sync with the platform SMP code) - add call_firmware_op(cpu_boot, 1) to exynos_cpu0_enter_aftr() - use dsb_sev() instead of IPI wakeup for Exynos3250 in exynos_cpu0_enter_aftr() - add CPU0 vs CPU1 synchronization based on S5P_PMU_SPARE2 register for Exynos3250 to cpuidle-exynos.c - add flush_cache_all() for CPU1/0 before powerdown/AFTR for Exynos3250 to exynos_wfi_finisher()/exynos_do_idle() Signed-off-by:
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
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Bartlomiej Zolnierkiewicz authored
Add get_cpu_boot_addr() firmware operation and then exynos_get_boot_addr() helper. This is a preparation for adding coupled cpuidle support for Exynos3250 SoC. There should be no functional changes caused by this patch. Signed-off-by:
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Bartlomiej Zolnierkiewicz authored
Add exynos_set_boot_addr() helper and covert existing code (exynos_boot_secondary() and exynos_smp_prepare_cpus()) to use it. There should be no functional changes caused by this patch. Signed-off-by:
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Bartlomiej Zolnierkiewicz authored
There is a kernel message about secondary CPU bootup when exynos_core_restart() is called through CPU hotplug code-path (the only exynos_core_restart() user currently) so there is no need for an extra info on Exynos3250 SoC about software reset. This also prepares exynos_core_restart() to be re-used in coupled cpuidle code-path in the future. Signed-off-by:
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Bartlomiej Zolnierkiewicz authored
exynos_boot_secondary() can erroneously return 0 or -ENOSYS even when waiting on pen_release being set to -1 timeouts. Fix it by adjusting ret variable value to -ETIMEDOUT when necessary. Signed-off-by:
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Krzysztof Kozlowski authored
Using a fixed (by DTS) parent for clocks when turning on the power domain may introduce issues in other drivers. For example when such driver changes the parent during runtime and expects that he is the only place of such change. Do not rely on DTS providing the fixed parent for such clocks. Instead before switching domain off, grab a current parent of a clock with clk_get_parent(). Signed-off-by:
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Sergiy Kibrik authored
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare calls as required by common clock framework. Removes this warning on probe: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:889 __clk_enable+0x28/0x9c() Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 3.19.0+ #46 [<c0013a98>] (unwind_backtrace) from [<c0010d8c>] (show_stack+0x10/0x14) [<c0010d8c>] (show_stack) from [<c001b018>] (warn_slowpath_common+0x7c/0xa4) [<c001b018>] (warn_slowpath_common) from [<c001b0d0>] (warn_slowpath_null+0x18/0x20) [<c001b0d0>] (warn_slowpath_null) from [<c01a5f80>] (__clk_enable+0x28/0x9c) [<c01a5f80>] (__clk_enable) from [<c01a600c>] (clk_enable+0x18/0x2c) [<c01a600c>] (clk_enable) from [<c001860c>] (s3c_adc_probe+0x11c/0x18c) [<c001860c>] (s3c_adc_probe) from [<c0153a10>] (platform_drv_probe+0x30/0x78) [<c0153a10>] (platform_drv_probe) from [<c01523e0>] (driver_probe_device+0xb0/0x1fc) [<c01523e0>] (driver_probe_device) from [<c01525dc>] (__driver_attach+0x68/0x88) [<c01525dc>] (__driver_attach) from [<c0150df0>] (bus_for_each_dev+0x70/0x94) [<c0150df0>] (bus_for_each_dev) from [<c0151c80>] (bus_add_driver+0xdc/0x1c4) [<c0151c80>] (bus_add_driver) from [<c0152ba4>] (driver_register+0x9c/0xe0) [<c0152ba4>] (driver_register) from [<c03041cc>] (adc_init+0x10/0x34) [<c03041cc>] (adc_init) from [<c00087fc>] (do_one_initcall+0x110/0x1cc) [<c00087fc>] (do_one_initcall) from [<c02ffccc>] (kernel_init_freeable+0xf4/0x1ac) [<c02ffccc>] (kernel_init_freeable) from [<c022f4fc>] (kernel_init+0x8/0xe0) [<c022f4fc>] (kernel_init) from [<c000e098>] (ret_from_fork+0x14/0x3c) ---[ end trace f4a1ea39a114fecf ]--- Signed-off-by:
Sergiy Kibrik <sakib@meta.ua> Reviewed-by:
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Krzysztof Kozlowski authored
Add missing of_node_put() to: 1. Error return path if allocating memory for exynos_pm_domain failed. 2. Second iteration over power domains if a child domain was not present or was incomplete. Signed-off-by:
Karol Wrona <k.wrona@samsung.com> Signed-off-by:
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Krzysztof Kozlowski authored
Prevent possible NULL pointer dereference of pointer returned by of_find_device_by_node(). Handle this by skipping such power domain. Additionally fail the init on kstrdup() failure. Such case is actually not fatal because the name for power domain allocated by kstrdup() is used only in printk. Still as a precaution handle this as an error condition. Signed-off-by:
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Krzysztof Kozlowski authored
Prevent possible NULL pointer dereference if of_iomap() fails. Handle the error by skipping such power domain. Signed-off-by:
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Bintian Wang authored
This patch introduces ARCH_HISI to enable Hisilicon SoC family in Kconfig and defconfig. Signed-off-by:
Bintian Wang <bintian.wang@huawei.com> Acked-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by:
Wei Xu <xuwei5@hisilicon.com> Tested-by:
Will Deacon <will.deacon@arm.com> Tested-by:
Tyler Baker <tyler.baker@linaro.org> Tested-by:
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- 03 Jun, 2015 13 commits
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Arnd Bergmann authored
Like i.MX6, the i.MX7 code calls into the anatop driver, which fails if that is disabled: arch/arm/mach-imx/built-in.o: In function `imx7d_init_machine': arch/arm/mach-imx/mach-imx7d.c:24: undefined reference to `imx_anatop_init' arch/arm/mach-imx/built-in.o: In function `imx7d_init_irq': arch/arm/mach-imx/mach-imx7d.c:29: undefined reference to `imx_init_revision_from_anatop' This patch ensures that for an imx7-only build, we still get anatop built-in, matching what we do for imx6. We also need to select HAVE_IMX_MMDC, as that is needed by the anatop code. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Shawn Guo authored
The include of <asm/mach/time.h> is not needed at all, and causes build error in some cases. Remove it. Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
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Shawn Guo authored
After the cleanup on imx timer driver, now it's ready to be moved into drivers/clocksource/. Let's do it. Signed-off-by:
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Shawn Guo authored
With the cleanup done before, the platform specific headers now can be removed. Signed-off-by: -
Shawn Guo authored
It splits irq enable/disable/acknowledge operations into device specific functions as the hooks in imx_gpt_data, so that we can save the use of timer_is_xxx() and cpu_is_xxx() checking in these irq functions. Signed-off-by: -
Shawn Guo authored
We now have pointer to imx_timer structure available where timer base address is needed, so we can just kill global timer_base by using imxtm->base instead. Signed-off-by: -
Shawn Guo authored
It defines offset of gpt registers TSTAT, TCN and TCMP per device type in imx_gpt_data, so that these registers can be accessed in an way without timer_is_v2() checking. Signed-off-by: -
Shawn Guo authored
Since we now have imx_timer structure, it makes more sense to move those clock event related variables into the structure, so that we can save some global variables. Signed-off-by: -
Shawn Guo authored
Set up .set_next_event hook via imx_gpt_data, so that we can save the use of timer_is_v2(). Signed-off-by: -
Shawn Guo authored
It creates a gpt device speicific data structure and adds function hook gpt_setup_tctl in there to set up gpt TCTL register. Signed-off-by: -
Shawn Guo authored
Use different initialization function in CLOCKSOURCE_OF_DECLARE() to initialize gpt device type for DT boot. Signed-off-by: -
Shawn Guo authored
Define an enum for gpt timer device type in include/soc/imx/timer.h to tell the gpt block differences among SoCs. Update non-DT users (clock drivers) to pass the device type. As we now have include/soc/imx/timer.h, the declaration of mxc_timer_init() is moved into there as the best fit. Signed-off-by: -
Shawn Guo authored
Instead of passing around as individual argument, let's move timer resources like irq and clocks together with base address into a data structure, and pass pointer of the structure as argument to simplify the function call interface. Signed-off-by:
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