1. 23 Sep, 2013 12 commits
    • Dave Martin's avatar
      ARM: bL_switcher/trace: Add kernel trace trigger interface · 29064b88
      Dave Martin authored
      This patch exports a bL_switcher_trace_trigger() function to
      provide a means for drivers using the trace events to get the
      current status when starting a trace session.
      
      Calling this function is equivalent to pinging the trace_trigger
      file in sysfs.
      Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
      29064b88
    • Dave Martin's avatar
      ARM: bL_switcher/trace: Add trace trigger for trace bootstrapping · b09bbe5b
      Dave Martin authored
      When tracing switching, an external tracer needs a way to bootstrap
      its knowledge of the logical<->physical CPU mapping.
      
      This patch adds a sysfs attribute trace_trigger.  A write to this
      attribute will generate a power:cpu_migrate_current event for each
      online CPU, indicating the current physical CPU for each logical
      CPU.
      
      Activating or deactivating the switcher also generates these
      events, so that the tracer knows about the resulting remapping of
      affected CPUs.
      Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
      b09bbe5b
    • Dave Martin's avatar
      ARM: bL_switcher: Basic trace events support · 1bfbddb6
      Dave Martin authored
      This patch adds simple trace events to the b.L switcher code
      to allow tracing of CPU migration events.
      
      To make use of the trace events, you will need:
      
      CONFIG_FTRACE=y
      CONFIG_ENABLE_DEFAULT_TRACERS=y
      
      The following events are added:
        * power:cpu_migrate_begin
        * power:cpu_migrate_finish
      
      each with the following data:
          u64     timestamp;
          u32     cpu_hwid;
      
      power:cpu_migrate_begin occurs immediately before the
      switcher-specific migration operations start.
      power:cpu_migrate_finish occurs immediately when migration is
      completed.
      
      The cpu_hwid field contains the ID fields of the MPIDR.
      
      * For power:cpu_migrate_begin, cpu_hwid is the ID of the outbound
        physical CPU (equivalent to (from_phys_cpu,from_phys_cluster)).
      
      * For power:cpu_migrate_finish, cpu_hwid is the ID of the inbound
        physical CPU (equivalent to (to_phys_cpu,to_phys_cluster)).
      
      By design, the cpu_hwid field is masked in the same way as the
      device tree cpu node reg property, allowing direct correlation to
      the DT description of the hardware.
      
      The timestamp is added in order to minimise timing noise.  An
      accurate system-wide clock should be used for generating this
      (hopefully getnstimeofday is appropriate, but it could be changed).
      It could be any monotonic shared clock, since the aim is to allow
      accurate deltas to be computed.  We don't necessarily care about
      accurate synchronisation with wall clock time.
      
      In practice, each switch takes place on a single logical CPU,
      and the trace infrastructure should guarantee that events are
      well-ordered with respect to a single logical CPU.
      Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      1bfbddb6
    • Nicolas Pitre's avatar
      ARM: bL_switcher: wait until inbound is alive before performing a switch · 6137eba6
      Nicolas Pitre authored
      In some cases, a significant delay may be observed between the moment
      a request for a CPU to come up is made and the moment it is ready to
      start executing kernel code.  This is especially true when a whole
      cluster has to be powered up which may take in the order of miliseconds.
      It is therefore a good idea to let the outbound CPU continue to execute
      code in the mean time, and be notified when the inbound is ready before
      performing the actual switch.
      
      This is achieved by registering a completion block with the appropriate
      IPI callback, and programming the sending of an IPI by the early assembly
      code prior to entering the main kernel code.  Once the IPI is delivered
      to the outbound CPU, the completion block is "completed" and the switcher
      thread is resumed.
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      6137eba6
    • Nicolas Pitre's avatar
      ARM: GIC: interface to send a SGI directly · 14d2ca61
      Nicolas Pitre authored
      The regular gic_raise_softirq() takes as input a CPU mask which is not
      adequate when we need to send an IPI to a CPU which is not represented
      in the kernel to GIC mapping.  That is the case with the b.L switcher
      when GIC migration to the inbound CPU has not yet occurred.
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      14d2ca61
    • Nicolas Pitre's avatar
      ARM: GIC: function to retrieve the physical address of the SGIR · eeb44658
      Nicolas Pitre authored
      In order to have early assembly code signal other CPUs in the system,
      we need to get the physical address for the SGIR register used to
      send IPIs.  Because the register will be used with a precomputed CPU
      interface ID number, there is no need for any locking in the assembly
      code where this register is written to.
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      eeb44658
    • Nicolas Pitre's avatar
      ARM: mcpm: add a simple poke mechanism to the early entry code · de885d14
      Nicolas Pitre authored
      This allows to poke a predetermined value into a specific address
      upon entering the early boot code in bL_head.S.
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      de885d14
    • Nicolas Pitre's avatar
      ARM: SMP: basic IPI triggered completion support · 5135d875
      Nicolas Pitre authored
      We need a mechanism to let an inbound CPU signal that it is alive before
      even getting into the kernel environment i.e. from early assembly code.
      Using an IPI is the simplest way to achieve that.
      
      This adds some basic infrastructure to register a struct completion
      pointer to be "completed" when the dedicated IPI for this task is
      received.
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      5135d875
    • Nicolas Pitre's avatar
      ARM: bL_switcher: synchronize the outbound with the inbound · 108a9640
      Nicolas Pitre authored
      Let's wait for the inbound CPU to come up and snoop some of the outbound
      CPU cache before bringing the outbound CPU down.  That should be more
      efficient than going down right away.
      
      Possible improvements might involve some monitoring of the CCI event
      counters.
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      108a9640
    • Dave Martin's avatar
      ARM: bL_switcher: Add switch completion callback for bL_switch_request() · 0577fee2
      Dave Martin authored
      There is no explicit way to know when a switch started via
      bL_switch_request() is complete.  This can lead to unpredictable
      behaviour when the switcher is controlled by a subsystem which
      makes dynamic decisions (such as cpufreq).
      
      The CPU PM notifier is not really suitable for signalling
      completion, because the CPU could get suspended and resumed for
      other, independent reasons while a switch request is in flight.
      Adding a whole new notifier for this seems excessive, and may tempt
      people to put heavyweight code on this path.
      
      This patch implements a new bL_switch_request_cb() function that
      allows for a per-request lightweight callback, private between the
      switcher and the caller of bL_switch_request_cb().
      
      Overlapping switches on a single CPU are considered incorrect if
      they are requested via bL_switch_request_cb() with a callback (they
      will lead to an unpredictable final state without explicit external
      synchronisation to force the requests into a particular order).
      Queuing requests robustly would be overkill because only one
      subsystem should be attempting to control the switcher at any time.
      
      Overlapping requests of this kind will be failed with -EBUSY to
      indicate that the second request won't take effect and the
      completer will never be called for it.
      
      bL_switch_request() is retained as a wrapper round the new function,
      with the old, fire-and-forget semantics.  In this case the last request
      will always win. The request may still be denied if a previous request
      with a completer is still pending.
      Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
      Signed-off-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
      0577fee2
    • Dave Martin's avatar
      ARM: bL_switcher: Add runtime control notifier · 491990e2
      Dave Martin authored
      Some subsystems will need to respond synchronously to runtime
      enabling and disabling of the switcher.
      
      This patch adds a dedicated notifier interface to support such
      subsystems.  Pre- and post- enable/disable notifications are sent
      to registered callbacks, allowing safe transition of non-b.L-
      transparent subsystems across these control transitions.
      
      Notifier callbacks may veto switcher (de)activation on pre notifications
      only.  Post notifications won't revert the action.
      
      If enabling or disabling of the switcher fails after the pre-change
      notification has been sent, subsystems which have registered
      notifiers can be left in an inappropriate state.
      
      This patch sends a suitable post-change notification on failure,
      indicating that the old state has been reestablished.
      
      For example, a failed initialisation will result in the following
      sequence:
      
          BL_NOTIFY_PRE_ENABLE
          /* switcher initialisation fails */
          BL_NOTIFY_POST_DISABLE
      
      It is the responsibility of notified subsystems to respond in an
      appropriate way.
      Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      491990e2
    • Dave Martin's avatar
      ARM: bL_switcher: Add synchronous enable/disable interface · c0f43751
      Dave Martin authored
      Some subsystems will need to know for sure whether the switcher is
      enabled or disabled during certain critical regions.
      
      This patch provides a simple mutex-based mechanism to discover
      whether the switcher is enabled and temporarily lock out further
      enable/disable:
      
        * bL_switcher_get_enabled() returns true iff the switcher is
          enabled and temporarily inhibits enable/disable.
      
        * bL_switcher_put_enabled() permits enable/disable of the switcher
          again after a previous call to bL_switcher_get_enabled().
      Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      c0f43751
  2. 17 Sep, 2013 1 commit
  3. 16 Sep, 2013 5 commits
  4. 15 Sep, 2013 7 commits
    • Linus Torvalds's avatar
      Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus · d8efd82e
      Linus Torvalds authored
      Pull MIPS fixes from Ralf Baechle:
       "These are four patches for three construction sites:
      
         - Fix register decoding for the combination of multi-core processors
           and multi-threading.
      
         - Two more fixes that are part of the ongoing DECstation resurrection
           work.  One of these touches a DECstation-only network driver.
      
         - Finally Markos' trivial build fix for the AP/SP support.
      
        (With this applied now all MIPS defconfigs are building again)"
      
      * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
        MIPS: kernel: vpe: Make vpe_attrs an array of pointers.
        MIPS: Fix SMP core calculations when using MT support.
        MIPS: DECstation I/O ASIC DMA interrupt handling fix
        MIPS: DECstation HRT initialization rearrangement
      d8efd82e
    • Linus Torvalds's avatar
      Merge branch 'for_linus' of git://cavan.codon.org.uk/platform-drivers-x86 · cd619e21
      Linus Torvalds authored
      Pull x86 platform updates from Matthew Garrett:
       "Nothing amazing here, almost entirely cleanups and minor bugfixes and
        one bit of hardware enablement in the amilo-rfkill driver"
      
      * 'for_linus' of git://cavan.codon.org.uk/platform-drivers-x86:
        platform/x86: panasonic-laptop: reuse module_acpi_driver
        samsung-laptop: fix config build error
        platform: x86: remove unnecessary platform_set_drvdata()
        amilo-rfkill: Enable using amilo-rfkill with the FSC Amilo L1310.
        wmi: parse_wdg() should return kernel error codes
        hp_wmi: Fix unregister order in hp_wmi_rfkill_setup()
        platform: replace strict_strto*() with kstrto*()
        x86: irst: use module_acpi_driver to simplify the code
        x86: smartconnect: use module_acpi_driver to simplify the code
        platform samsung-q10: use ACPI instead of direct EC calls
        thinkpad_acpi: add the ability setting TPACPI_LED_NONE by quirk
        thinkpad_acpi: return -NODEV while operating uninitialized LEDs
      cd619e21
    • Linus Torvalds's avatar
      Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi · 0375ec58
      Linus Torvalds authored
      Pull misc SCSI driver updates from James Bottomley:
       "This patch set is a set of driver updates (megaraid_sas, fnic, lpfc,
        ufs, hpsa) we also have a couple of bug fixes (sd out of bounds and
        ibmvfc error handling) and the first round of esas2r checker fixes and
        finally the much anticipated big endian additions for megaraid_sas"
      
      * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (47 commits)
        [SCSI] fnic: fnic Driver Tuneables Exposed through CLI
        [SCSI] fnic: Kernel panic while running sh/nosh with max lun cfg
        [SCSI] fnic: Hitting BUG_ON(io_req->abts_done) in fnic_rport_exch_reset
        [SCSI] fnic: Remove QUEUE_FULL handling code
        [SCSI] fnic: On system with >1.1TB RAM, VIC fails multipath after boot up
        [SCSI] fnic: FC stat param seconds_since_last_reset not getting updated
        [SCSI] sd: Fix potential out-of-bounds access
        [SCSI] lpfc 8.3.42: Update lpfc version to driver version 8.3.42
        [SCSI] lpfc 8.3.42: Fixed issue of task management commands having a fixed timeout
        [SCSI] lpfc 8.3.42: Fixed inconsistent spin lock usage.
        [SCSI] lpfc 8.3.42: Fix driver's abort loop functionality to skip IOs already getting aborted
        [SCSI] lpfc 8.3.42: Fixed failure to allocate SCSI buffer on PPC64 platform for SLI4 devices
        [SCSI] lpfc 8.3.42: Fix WARN_ON when driver unloads
        [SCSI] lpfc 8.3.42: Avoided making pci bar ioremap call during dual-chute WQ/RQ pci bar selection
        [SCSI] lpfc 8.3.42: Fixed driver iocbq structure's iocb_flag field running out of space
        [SCSI] lpfc 8.3.42: Fix crash on driver load due to cpu affinity logic
        [SCSI] lpfc 8.3.42: Fixed logging format of setting driver sysfs attributes hard to interpret
        [SCSI] lpfc 8.3.42: Fixed back to back RSCNs discovery failure.
        [SCSI] lpfc 8.3.42: Fixed race condition between BSG I/O dispatch and timeout handling
        [SCSI] lpfc 8.3.42: Fixed function mode field defined too small for not recognizing dual-chute mode
        ...
      0375ec58
    • Linus Torvalds's avatar
      Merge branch 'slab/next' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/linux · bff157b3
      Linus Torvalds authored
      Pull SLAB update from Pekka Enberg:
       "Nothing terribly exciting here apart from Christoph's kmalloc
        unification patches that brings sl[aou]b implementations closer to
        each other"
      
      * 'slab/next' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/linux:
        slab: Use correct GFP_DMA constant
        slub: remove verify_mem_not_deleted()
        mm/sl[aou]b: Move kmallocXXX functions to common code
        mm, slab_common: add 'unlikely' to size check of kmalloc_slab()
        mm/slub.c: beautify code for removing redundancy 'break' statement.
        slub: Remove unnecessary page NULL check
        slub: don't use cpu partial pages on UP
        mm/slub: beautify code for 80 column limitation and tab alignment
        mm/slub: remove 'per_cpu' which is useless variable
      bff157b3
    • Linus Torvalds's avatar
      Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input · 8bf5e36d
      Linus Torvalds authored
      Pull input update from Dmitry Torokhov:
       "The only change is David Hermann's new EVIOCREVOKE evdev ioctl that
        allows safely passing file descriptors to input devices to session
        processes and later being able to stop delivery of events through
        these fds so that inactive sessions will no longer receive user input
        that does not belong to them"
      
      * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
        Input: evdev - add EVIOCREVOKE ioctl
      8bf5e36d
    • Linus Torvalds's avatar
      vfs: fix typo in comment in recent dentry work · 05a8252b
      Linus Torvalds authored
      Sedat points out that I transposed some letters in "LRU" and wrote "RLU"
      instead in one of the new comments explaining the flow.  Let's just fix
      it.
      Reported-by: default avatarSedat Dilek <sedat.dilek@jpberlin.de>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      05a8252b
    • Davidlohr Bueso's avatar
      partitions/efi: loosen check fot pmbr size in lba · 6b02fa59
      Davidlohr Bueso authored
      Matt found that commit 27a7c642 ("partitions/efi: account for pmbr
      size in lba") caused his GPT formatted eMMC device not to boot.  The
      reason is that this commit enforced Linux to always check the lesser of
      the whole disk or 2Tib for the pMBR size in LBA.  While most disk
      partitioning tools out there create a pMBR with these characteristics,
      Microsoft does not, as it always sets the entry to the maximum 32-bit
      limitation - even though a drive may be smaller than that[1].
      
      Loosen this check and only verify that the size is either the whole disk
      or 0xFFFFFFFF.  No tool in its right mind would set it to any value
      other than these.
      
      [1] http://thestarman.pcministry.com/asm/mbr/GPT.htm#GPTPTReported-and-tested-by: default avatarMatt Porter <matt.porter@linaro.org>
      Signed-off-by: default avatarDavidlohr Bueso <davidlohr@hp.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      6b02fa59
  5. 14 Sep, 2013 2 commits
  6. 13 Sep, 2013 13 commits