1. 19 Jul, 2022 2 commits
    • Haibo Chen's avatar
      gpio: pca953x: use the correct range when do regmap sync · 2abc17a9
      Haibo Chen authored
      regmap will sync a range of registers, here use the correct range
      to make sure the sync do not touch other unexpected registers.
      
      Find on pca9557pw on imx8qxp/dxl evk board, this device support
      8 pin, so only need one register(8 bits) to cover all the 8 pins's
      property setting. But when sync the output, we find it actually
      update two registers, output register and the following register.
      
      Fixes: b7657430 ("gpio: pca953x: Restore registers after suspend/resume cycle")
      Fixes: ec82d1eb ("gpio: pca953x: Zap ad-hoc reg_output cache")
      Fixes: 0f25fda8 ("gpio: pca953x: Zap ad-hoc reg_direction cache")
      Signed-off-by: default avatarHaibo Chen <haibo.chen@nxp.com>
      Reviewed-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
      Signed-off-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
      2abc17a9
    • Haibo Chen's avatar
      gpio: pca953x: only use single read/write for No AI mode · db8edaa0
      Haibo Chen authored
      For the device use NO AI mode(not support auto address increment),
      only use the single read/write when config the regmap.
      
      We meet issue on PCA9557PW on i.MX8QXP/DXL evk board, this device
      do not support AI mode, but when do the regmap sync, regmap will
      sync 3 byte data to register 1, logically this means write first
      data to register 1, write second data to register 2, write third data
      to register 3. But this device do not support AI mode, finally, these
      three data write only into register 1 one by one. the reault is the
      value of register 1 alway equal to the latest data, here is the third
      data, no operation happened on register 2 and register 3. This is
      not what we expect.
      
      Fixes: 49427232 ("gpio: pca953x: Perform basic regmap conversion")
      Signed-off-by: default avatarHaibo Chen <haibo.chen@nxp.com>
      Reviewed-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
      Signed-off-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
      db8edaa0
  2. 17 Jul, 2022 15 commits
  3. 16 Jul, 2022 12 commits
  4. 15 Jul, 2022 11 commits