- 27 Jun, 2024 40 commits
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Aurabindo Pillai authored
[WHAT] Add the necessary register definitions to enable DCC on DCN4x Reviewed-by:
Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by:
Alex Hung <alex.hung@amd.com> Signed-off-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Hung authored
[WHAT & HOW] The same display null check was a few lines above. This fixes 1 DEADCODE issue reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] advanced_pstate_switching was initialized to false and never assigned to another value; as a result !advanced_pstate_switching is always true and should be removed. This fixes 2 DEADCODE issues reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] Function return values must be checked before data can be used in subsequent functions. This fixes 4 CHECKED_RETURN issues reported by Coverity. Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Alex Hung authored
[WHAT & HOW] Check cm3_helper_translate_curve_to_hw_format runs successfully so the regamma_params is valid and can be used. Also revmoed two result assignments. This fixes 2 CHECKED_RETURN UNUSED_VALUE issues reported by Coverity. Reviewed-by:
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Roman Li authored
[WHY] Hotplug is not detected in headless (no eDP) mode on dcn35x. With no display dcn35x goes to IPS2 powersaving state where HPD interrupt is not handled. [HOW] Use idle worker thread for periodic detection of HPD in headless mode. Reviewed-by:
Roman Li <roman.li@amd.com> Tested-by:
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Relja Vojvodic authored
[WHY] Enabling NL SDR blending caused the 1D LUTs to be set/populated in two different functions. This caused flickering as the LUT was set differently by the two functions, one of which should only have been modifying the 1D LUT if 3D LUT was enabled. [HOW] Added check to only modify the 1D LUT in populate_mcm if 3D LUT was enabled. Added blend_tf function update for non-main planes if the 3D LUT path was taken. Reviewed-by:
Ilya Bakoulin <ilya.bakoulin@amd.co> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
Relja Vojvodic <relja.vojvodic@amd.com> Tested-by:
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Ryan Seto authored
[WHY] DSC was waiting for the wrong field to disconnect cleanly. [HOW] Changed field the DSC disconnect was waiting on. Reviewed-by:
Wenjing Liu <wenjing.liu@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
Ryan Seto <ryanseto@amd.com> Tested-by:
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Wenjing Liu authored
[WHY] mod_hdcp_execute_and_set returns (*status == MOD_HDCP_STATUS_SUCCESS). When it return 0, it is guaranteed that status == MOD_HDCP_STATUS_SUCCESS will be evaluated as false. Since now we are using goto out already, all 3 if (status == MOD_HDCP_STATUS_SUCCESS) clauses are guaranteed to enter. Therefore we are removing the if statements due to redundancy. Reviewed-by:
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Ryan Seto authored
[WHY] Added HW cursor visual confirm [HOW] Added visual confirm logic when programming cursor positions. HW is programmed on cursor updates since cursor can change without flips. Reviewed-by:
Alvin Lee <alvin.lee2@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
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Nevenko Stupar authored
[WHY & HOW] Adjust hot spot positions between ODM slices when cursor magnification is used. Reviewed-by:
Sridevi Arvindekar <sridevi.arvindekar@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
Nevenko Stupar <nevenko.stupar@amd.com> Tested-by:
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Alvin Lee authored
[WHAT & HOW] We must wait for ODM double buffer updates to complete before exiting the pipe update sequence or we may reduce DISPCLK and hit some transient underflow (pixel rate is reduced before the pipes have ODM enabled). Reviewed-by:
Samson Tam <samson.tam@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
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Duncan Ma authored
[WHY] When system exits idle state followed by enabling the display, DSC memory may still be forced in a deep sleep or shutdown state. Intermittent DSC corruption is seen when display is visible. [HOW] When DSC is enabled, reset dsc memory to force and disable status. Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
Duncan Ma <duncan.ma@amd.com> Tested-by:
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Alvin Lee authored
[WHAT & HOW] According to register specifications, the CURSOR_DST_X_OFFSET is relative to the start of the data viewport, not RECOUT space. In this case we must transform the cursor coordinates passed to hubp401_cursor_set_position into viewport space to program this register. This fixes an underflow issue that occurs in scaled mode with low refresh rate. Reviewed-by:
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Alex Hung authored
[WHAT] 1. is_pwrseq0 needs to check link before accessing link->link_index. 2. context is checked before accessing its bw_ctx.dml2 3. clk_mgr_base->bw_params is checked before clk_table.num_entries_per_cl This fixes 4 REVERSE_INULL issues reported by Coverity. Reviewed-by:
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Daniel Sa authored
[WHY] Some monitors are forced to a lower resolution and refresh rate after system restarts. [HOW] Some monitors may give invalid LTTPR information when queried such as indicating they have one DP lane instead of 4. If given an invalid DPCD version, skip over getting lttpr link rate and lane counts. Reviewed-by:
Daniel Sa <daniel.sa@amd.com> Tested-by:
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Dillon Varone authored
[WHY & HOW] Currently the force only works for a single display, make it so it can be forced per stream. Reviewed-by:
Dillon Varone <dillon.varone@amd.com> Tested-by:
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Sung-huai Wang authored
[WHY] Underflow occurs on some platforms when urgent BW is close to the maximum in DPM0. [HOW] It does not occur at DPM1, so as a workaround restrict the maximum amount and increase the lowest state index for clock states until we're out of DPM0. Adds DML2 config options to specify this pe platform as required. Reviewed-by:
Sung-huai Wang <danny.wang@amd.com> Tested-by:
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George Shen authored
[WHY] In check_mode_supported, we should validate that the required clocks can be successfully mapped to DPM levels. This ensures we only apply dynamic ODM optimizations to modes that are supported without dynamic ODM optimizations to begin with. [HOW] Call dpmm to check that the display config can successfully be mapped to a DPM level. Reviewed-by:
Chaitanya Dhere <chaitanya.dhere@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
George Shen <george.shen@amd.com> Tested-by:
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TungYu Lu authored
[WHY] Tiled displays showed not aligned on 8K60hz when system resumed from S3/S4. [HOW] Do dc_trigger_sync to re-sync pipes to ensure OTG become synced. Reviewed-by:
TungYu Lu <tungyu.lu@amd.com> Tested-by:
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Leo (Hanghong) Ma authored
[WHY && HOW] Some DP EDID CTS tests fail due to HPO disable, and we should keep it enable on DCN4 dGPU. Reviewed-by:
Leo (Hanghong) Ma <hanghong.ma@amd.com> Tested-by:
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Aurabindo Pillai authored
[WHAT & HOW] On DCN401, the cursor composition to the plane happens after scaler. So the cursor isn't stretched with the rest of the surface. Temporarily disable hardware cursor in case when hardware rotation is enabled such that userspace falls back to software cursor. Reviewed-by:
Sun peng Li <sunpeng.li@amd.com> Reviewed-by:
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Joan Lee authored
[WHY & HOW] Driver side adding replay general cmd interface. Replay general command will config at most two uint_32 parameters, with a replay general command subtype to set relative configurations. Reviewed-by:
Joan Lee <joan.lee@amd.com> Tested-by:
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Alex Hung authored
[WHAT & HOW] Check mod_hdcp_execute_and_set() return values in authenticated_dp. This fixes 3 CHECKED_RETURN issues reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] dm_dmub_hw_init and drm_dp_mst_topology_mgr_set_mst can return error codes and errors should be reported. This fixes 2 CHECKED_RETURN issues reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] BIOS_CMD_TABLE_REVISION and link_transmitter_control can return error codes and errors should be reported. This fixes 3 CHECKED_RETURN issues reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] clk_mgr_helper_get_active_display_cnt returns display count and itself alone has no use. This fixes 1 CHECKED_RETURN issue reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] surf_linear_128_l/c are used in CalculateBytePerPixelAndBlockSizes before they are assigned, so initializing them before passing them into the function. This fixes 2 UNINIT issues reported by Coverity. Reviewed-by:
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Nevenko Stupar authored
[WHY & HOW] Fix the cursor size between ODM slices. Reviewed-by:
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Alex Hung authored
[WHAT] The DC_LOG_DC should be run after link->link_enc is checked, not before. This fixes 1 REVERSE_INULL issue reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] The null checks for pipe_ctx->stream and pipe_ctx->stream_res.tg are redundant as they were already dereferenced previously, as reported by Coverity; therefore the null checks are removed. This fixes 6 REVERSE_INULL issues reported by Coverity. Reviewed-by:
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Michael Strauss authored
[WHY] New register field added in DP2.1 SCR, needed for auxless ALPM [HOW] Echo value read from 0xF0007 back to sink Reviewed-by:
Michael Strauss <michael.strauss@amd.com> Tested-by:
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Nevenko Stupar authored
[WHY & HOW] Current code for cursor positions does not work properly with different ODM options and HW rotations like ODM 2to1, 3to1 and 4to1, and has different issues depending on angle of HW rotations. [HOW] Fixed these issues so to work properly when ODM is used with HW rotations. Reviewed-by:
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Ivan Lipski authored
[WHY] Coverity analysis flagged this code as DEADCODE because the condition '(!need_recovery)' is never true. The variable 'need_recovery' is initialized as 'true', is not assigned to 'false' anywhere before the conditional statement. Since the variable is only used for the conditional check, but the check can never be true, the variable itself is redundant. [HOW] Removed the variable 'need_recovery'. Reviewed-by:
Ivan Lipski <ivlipski@amd.com> Tested-by:
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Hawking Zhang authored
fault_status is read only register. fault_cntl is not accessible from guest environment. Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
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Ivan Lipski authored
[WHY] Coverity analysis flagged these files as containing DEADCODE, i. e. redundant or unreachabale. In these files, variable 'mode_422' is always the same file (0 or false), so any code logic with it is redundant. [HOW] Removed 'mode_422' variable and all code with it from 'display_rq_dlg_calc_' functions in dml. Reviewed-by:
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Relja Vojvodic authored
[WHY] Function was used to check the number of FEs connected to the current BE. This was then used to determine if the symclk could be disabled, if all FEs were disconnected. However, the function would skip over the primary FE and return 0 when the primary FE was still connected. This caused black screens on driver disable with an MST daisy chain hooked up. [HOW] Refactored the function to correctly return the number of FEs connected to the input BE. Also renamed it for clarity. Reviewed-by:
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Nicholas Susanto authored
[WHY] On hotpluggin a 4k144 HDMI FRL setup, display fails FRL link training and falls back to TMDS which is caused by driver not ungating HPO before doing FRL link training. [HOW] Enable debug flag to disable HPO power gate in DCN35 Reviewed-by:
Charlene Liu <charlene.liu@amd.com> Signed-off-by:
Nicholas Susanto <nicholas.susanto@amd.com> Tested-by:
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Frank Min authored
Access ltr through pci cfg space instead of mmio while programing aspm on gfx12 Signed-off-by:
Frank Min <Frank.Min@amd.com> Reviewed-by:
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Yang Wang authored
refine gfx12 firmware loading Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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