1. 01 Nov, 2006 6 commits
    • Timur Tabi's avatar
      [POWERPC] qe_lib: qe_issue_cmd writes wrong value to CECDR · 302439d2
      Timur Tabi authored
      Changed qe_issue_cmd() to write cmd_input to the CECDR unmodified.  It
      was treating cmd_input as a virtual address and tried to convert it to
      a physical address.
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      302439d2
    • Linas Vepstas's avatar
      [POWERPC] Use 4kB iommu pages even on 64kB-page systems · 5d2efba6
      Linas Vepstas authored
      The 10Gigabit ethernet device drivers appear to be able to chew
      up all 256MB of TCE mappings on pSeries systems, as evidenced by
      numerous error messages:
      
       iommu_alloc failed, tbl c0000000010d5c48 vaddr c0000000d875eff0 npages 1
      
      Some experimentation indicates that this is essentially because
      one 1500 byte ethernet MTU gets mapped as a 64K DMA region when
      the large 64K pages are enabled. Thus, it doesn't take much to
      exhaust all of the available DMA mappings for a high-speed card.
      
      This patch changes the iommu allocator to work with its own
      unique, distinct page size. Although the patch is long, its
      actually quite simple: it just #defines a distinct IOMMU_PAGE_SIZE
      and then uses this in all the places that matter.
      
      As a side effect, it also dramatically improves network performance
      on platforms with H-calls on iommu translation inserts/removes (since
      we no longer call it 16 times for a 1500 bytes packet when the iommu HW
      is still 4k).
      
      In the future, we might want to make the IOMMU_PAGE_SIZE a variable
      in the iommu_table instance, thus allowing support for different HW
      page sizes in the iommu itself.
      Signed-off-by: default avatarLinas Vepstas <linas@austin.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Acked-by: default avatarOlof Johansson <olof@lixom.net>
      Acked-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      5d2efba6
    • Andy Fleming's avatar
      [POWERPC] Fix oprofile support for e500 in arch/powerpc · dd6c89f6
      Andy Fleming authored
      Fixed a compile error in building the 85xx support with oprofile, and in
      the process cleaned up some issues with the fsl_booke performance monitor
      code.
      
      * Reorganized FSL Book-E performance monitoring code so that the 7450
        wouldn't be built if the e500 was, and cleaned it up so it was more
        self-contained.
      
      * Added a cpu_setup function for FSL Book-E.  The original
        cpu_setup function prototype had no arguments, assuming that
        the reg_setup function would copy the required information into
        variables which represented the registers.  This was silly for
        e500, since it has 1 register per counter (rather than 3 for
        all counters), so the code has been restructured to have
        cpu_setup take the current counter config array as an argument,
        with op_powerpc_setup() invoking op_powerpc_cpu_setup() through
        on_each_cpu(), and op_powerpc_cpu_setup() invoking the
        model-specific cpu_setup function with an argument.  The
        argument is ignored on all other platforms at present.
      
      * Fixed a confusing line where a trinary operator only had two
        arguments
      Signed-off-by: default avatarAndrew Fleming <afleming@freescale.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      dd6c89f6
    • Andy Fleming's avatar
      [POWERPC] Fix rmb() for e500-based machines it · e0da0dae
      Andy Fleming authored
      The e500 core generates an illegal instruction exception when it tries
      to execute the lwsync instruction, which we currently use for rmb().
      This fixes it by using the LWSYNC macro, which turns into a plain sync
      on 32-bit machines.
      Signed-off-by: default avatarAndrew Fleming <afleming@freescale.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      e0da0dae
    • Benjamin Herrenschmidt's avatar
      [POWERPC] Fix various offb issues · 441cbd8d
      Benjamin Herrenschmidt authored
      This patch fixes a few issues in offb:
      
       - A test was inverted causing the palette hack to never work
      (no device node was passed down to the init function)
      
       - Some cards seem to have their assigned-addresses property in a random
      order, thus we need to try using of_get_pci_address() first, which will
      fail if it's not a PCI device, and fallback to of_get_address() in that
      case. of_get_pci_address() properly parsees assigned-addresses to test
      the BAR number and thus will get it right whatever the order is.
      
       - Some cards (like GXT4500) provide a linebytes of 0xffffffff in the
      device-tree which does no good. This patch handles that by using the
      screen width when that happens. (Also fixes btext.c while at it).
      
       - Add detection of the GXT4500 in addition to the GXT2000 for the
      palette hacks (we use the same hack, palette is linear in register space
      at offset 0x6000).
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      441cbd8d
    • Linus Torvalds's avatar
      Merge branch 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6 · d5b9b787
      Linus Torvalds authored
      * 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6:
        [IA64] Correct definition of handle_IPI
        [IA64] move SAL_CACHE_FLUSH check later in boot
        [IA64] MCA recovery: Montecito support
        [IA64] cpu-hotplug: Fixing confliction between CPU hot-add and IPI
        [IA64] don't double >> PAGE_SHIFT pointer for /dev/kmem access
      d5b9b787
  2. 31 Oct, 2006 34 commits