- 10 May, 2022 27 commits
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Likun Gao authored
Support memory power gating control for lsdma 6.0.2. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Support memory power gating control for LSDMA. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Add LSDMA ip block for LSDMA v6.0.2. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Add LSDMA ip block for LSDMA v6.0.0. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Support constant data filling in PIO mode for LSDMA. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Support memory to memory linear copy in PIO mode for LSDMA. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Add Light SDMA (LSDMA) block and related function. LSDMA is a small instance of SDMA mainly for kernel driver use. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
Add lsdma v6_0_0 register offset and shift masks header files v2: squash in updates (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Dan Carpenter authored
Add a missing amdgpu_bo_unreserve(ring->mqd_obj) to an error path in gfx_v11_0_kiq_resume(). Fixes: 3d879e81 ("drm/amdgpu: add init support for GFX11 (v2)") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
To avoid a warning on 32 bit. Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
It's not used outside of the this file. Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alice Wong authored
In SRIOV, PSP will block incompatible firmware from loading. When this happens, driver should be prevented from continue initialization and start cleanup. Return failure in psp_cmd_submit_buf when firmware load failed in SRIOV. Signed-off-by: Alice Wong <shiwei.wong@amd.com> Reviewed-by: Sashank Saye <sashank.saye@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Graham Sider authored
Implement gmc_v11_0_get_vmid_pasid_mapping_info to fix gmc_v11_0_flush_gpu_tlb_pasid logic. Change from gfx10 to use IH_VMID_*_LUT registers for VMID -> PASID mapping. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Graham Sider authored
Add amdgpu_no_queue_eviction_on_vm_fault condition to event_interrupt_isr_v11 return. If no queue eviction on vm fault specified, function should return false for client/source ids specifying vm fault. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Mukul Joshi <mukul.joshi@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Graham Sider authored
WPTR_POLL_ENABLE = 1 was kept to support legacy doorbell programming in SimNow environment. Disable for real hardware. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Kenneth Feng authored
enable gfxoff control interface on smu_v13_0_7 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Kenneth Feng authored
temporarily disable ac/dc on smu_v13_0_7 due to the force clock issue. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
There is a known "sdma busy" issue with gfxoff enabled. Let's disable the gfxoff feature temporarily until that issue is fixed. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
With PMFW 78.35.0, the FCLK DPM is ready to go on SMU 13.0.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
Instead of using AverageFclkFrequencyPostDs/AverageFclkFrequencyPreDs, we turn to target clock frequency(CurrClock[PPCLK_FCLK]). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
There is some problem with average frequency reading for now. So, we switch to the target frequency reading. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
The output from metrics table for current link status changed. We need to update our driver accordingly. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
Enable SMU 13.0.0 UCLK DPM. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
Enable SMU 13.0.0 BACO support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
Enable those features supported by latest PMFW 78.34.0. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Add new sysfs interface to shows the status of psp vbflash status. V2: rename the sysfs interface, and set more return value. (0: not start; 1: in progress; MBX115 value when vbflash finish) V3: warning fixes Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Add sysfs interface to copy VBIOS. v2: squash in fix for proper vmalloc API (Alex) Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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- 06 May, 2022 13 commits
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Andrey Grodzovsky authored
Add psp vbflash function for psp v13. v2: fix warnings Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Andrey Grodzovsky authored
Add additional registers. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Yang Li authored
Return boolean values ("true" or "false") instead of 1 or 0 from bool functions. This fixes the following warnings from coccicheck: ./drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c:244:9-10: WARNING: return of 0/1 in function 'event_interrupt_isr_v11' with return type bool Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Yang Li authored
Eliminate the following coccicheck warning: ./drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:1222:2-3: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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James Zhu authored
Replace ip based software ring decode with common vcn software ring decode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian Koenig <Christian.Koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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James Zhu authored
Replace ip based software ring decode with common vcn software ring decode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian Koenig <Christian.Koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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James Zhu authored
Add common vcn sofware ring decode. v2: fixed compiling error Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian Koenig <Christian.Koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Richard Gong authored
Active State Power Management (ASPM) feature is enabled since kernel 5.14. There are some AMD Volcanic Islands (VI) GFX cards, such as the WX3200 and RX640, that do not work with ASPM-enabled Intel Alder Lake based systems. Using these GFX cards as video/display output, Intel Alder Lake based systems will freeze after suspend/resume. The issue was originally reported on one system (Dell Precision 3660 with BIOS version 0.14.81), but was later confirmed to affect at least 4 pre-production Alder Lake based systems. Add an extra check to disable ASPM on Intel Alder Lake based systems with the problematic AMD Volcanic Islands GFX cards. Fixes: 0064b0ce ("drm/amd/pm: enable ASPM by default") Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1885Signed-off-by: Richard Gong <richard.gong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
It's over a decade ago that this was actually used for more than ring and IB tests. Just use the static register directly where needed and nuke the now useless infrastructure. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Lang Yu <Lang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Check of the base offset for the IP exists rather than explicitly checking for how many instances of a particular IP there are. This is what soc15.c already does. Expand this to nv.c and soc21.c. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Yiqing Yao authored
[why] lru_list not empty warning in sw fini during repeated device bind unbind. There should be a amdgpu_fence_wait_empty() before the flush_delayed_work() call as Christian suggested. [how] Move to do flush_delayed_work for ttm bo delayed delete wq after fence_driver_hw_fini. Tested by: Yiqing Yao <yiqing.yao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Yiqing Yao <yiqing.yao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Huang Rui authored
GC v11.0.1 is using MES v11, so add IP block. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Huang Rui authored
Enable gfx v11 for GC 11.0.1. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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