1. 03 Jun, 2015 11 commits
  2. 02 Jun, 2015 28 commits
  3. 28 May, 2015 1 commit
    • Thomas Petazzoni's avatar
      ARM: mvebu: do not register custom DMA operations when coherency is disabled · 3a5f8103
      Thomas Petazzoni authored
      This patch is a partial backport of commit ef01c6c3 ("ARM: mvebu:
      remove Armada 375 Z1 workaround for I/O coherency"). This commit was
      merged in v3.19, so kernel versions later than v3.19 are not affected
      by the problem that this commit fixes.
      
      It does not make a lot of sense to backport this commit entirely,
      since it is mainly removing some no longer useful code. However, this
      commit is also making sure that the bus_register_notifier that
      register the custom DMA operations that should be used for HW I/O
      coherency does not get registered when said HW I/O coherency is not
      enabled.
      
      This is particularly critical since we have decided to disable HW I/O
      coherency completely in all kernels < 4.0, to be on the safe side,
      while experimenting a new implementation of the HW I/O coherency in >=
      4.0.
      
      Without this commit, kernels earlier than 3.18 have the custom DMA
      operations normally used for HW I/O coherency registered (they don't
      do cache maintenance operations), while HW I/O coherency is
      disabled. It essentially causes every DMA transfer to transfer
      garbage.
      
      The issue fixed by this commit was introduced by 5ab5afd8 ("ARM:
      mvebu: implement Armada 375 coherency workaround"), but it was not
      visible until now since it didn't cause any problem when HW I/O
      coherency is enabled.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Bjørn Mork <bjorn@mork.no>
      Signed-off-by: default avatarLuis Henriques <luis.henriques@canonical.com>
      3a5f8103