1. 13 Aug, 2015 3 commits
    • Gregory Fong's avatar
      gpio: brcmstb: support wakeup from S5 cold boot · 3afa129a
      Gregory Fong authored
      For wake from S5, we need to:
      - register a reboot handler
      - set wakeup capability before requesting IRQ so wakeup count is
        incremented
      - mask all GPIO IRQs and clear any pending interrupts during driver
        probe to since no driver will yet be registered to handle any IRQs
        carried over from boot at that time, and it's possible that the
        booted kernel does not request the same IRQ anyway.
      
      This means that /sys/.../power/wakeup_count is valid at boot time, and
      we can properly account for S5 wakeup stats. e.g.:
      
        ### After waking from S5 from a GPIO key
        # cat /sys/bus/platform/drivers/brcmstb-gpio/f04172c0.gpio/power/wakeup
        enabled
        # cat /sys/bus/platform/drivers/brcmstb-gpio/f04172c0.gpio/power/wakeup_count
        1
      Signed-off-by: default avatarGregory Fong <gregory.0xf0@gmail.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      3afa129a
    • Gregory Fong's avatar
      gpio: brcmstb: Add interrupt and wakeup source support · 19a7b694
      Gregory Fong authored
      Uses the gpiolib irqchip helpers.  For this to work, the irq setup
      function is called once per bank instead of once per device.  Note
      that all known uses of this block have a BCM7120 L2 interrupt
      controller as a parent.  Supports interrupts for all GPIOs.
      
      In the IRQ handler, we check for raised IRQs for invalid GPIOs and
      warn (ratelimited) if they're encountered.
      
      Also, several drivers (e.g. gpio-keys) allow for GPIOs to be
      configured as wakeup sources, and this GPIO controller supports that
      through a separate interrupt path.
      
      The de-facto standard DT property "wakeup-source" is checked, since
      that indicates whether the GPIO controller hardware can wake.  Uses
      the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have
      any of its own wakeup source configuration.
      
      Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me)
      that you can have multiple chained irqchips and associated IRQ domains
      for a single parent IRQ, and as long as the xlate function is written
      correctly, a GPIO IRQ request end up checking the correct domain and
      will get associated with the correct IRQ.  What helps make this clear
      is to read
        drivers/gpio/gpiolib-of.c:
         - of_gpiochip_find_and_xlate()
         - of_get_named_gpiod_flags()
        drivers/gpio/gpiolib.c:
         - gpiochip_find()
      Signed-off-by: default avatarGregory Fong <gregory.0xf0@gmail.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      19a7b694
    • Linus Walleij's avatar
      gpio/ABI: document what is already the case · 77a775b7
      Linus Walleij authored
      commit 926b663c
      "gpiolib: allow GPIOs to be named" added the ability to
      name GPIO lines by an array of names stored in the GPIO
      chip. This was in 2009 and has been an ABI since. Let's
      document it properly.
      
      Cc: Daniel Silverstone <dsilvers@digital-scurf.org>
      Cc: Markus Pargmann <mpa@pengutronix.de>
      Cc: Johan Hovold <johan@kernel.org>
      Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      77a775b7
  2. 03 Aug, 2015 2 commits
  3. 28 Jul, 2015 3 commits
  4. 27 Jul, 2015 10 commits
  5. 21 Jul, 2015 1 commit
  6. 17 Jul, 2015 4 commits
  7. 16 Jul, 2015 9 commits
  8. 15 Jul, 2015 8 commits