1. 18 Apr, 2013 22 commits
  2. 08 Apr, 2013 4 commits
  3. 06 Apr, 2013 3 commits
  4. 05 Apr, 2013 6 commits
  5. 03 Apr, 2013 5 commits
    • Daniel Vetter's avatar
      drm/i915: create pipe_config->dpll for clock state · f47709a9
      Daniel Vetter authored
      Clock computations and handling are highly encoder specific, both in
      the optimal clock selection and also in which clocks to use and when
      sharing of clocks is possible.
      
      So the best place to do this is somewhere in the encoders, with a
      generic fallback for those encoders without special needs. To facility
      this, add a pipe_config->clocks_set boolean.
      
      This patch here is only prep work, it simply sets the computed clock
      values in pipe_config->dpll, and uses that data in the hw clock
      setting functions.
      
      Haswell code isn't touched, simply because Haswell clocks work much
      different and need their own infrastructure (with probably a
      Haswell-specific config->ddi_clock substruct).
      Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      f47709a9
    • Daniel Vetter's avatar
      drm/i915: hw readout support for ->has_pch_encoders · 88adfff1
      Daniel Vetter authored
      Now we can ditch the checks in the Haswell disable code.
      
      v2: add support for Haswell
      Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      88adfff1
    • Daniel Vetter's avatar
      drm/i915: add hw state readout/checking for pipe_config · 0e8ffe1b
      Daniel Vetter authored
      We need to be able to read out the hw state code for a bunch
      of reasons:
      - Correctly disabling boot-up/resume state.
      - Pure paranoia.
      
      Since not all of the pipe configuration is e.g. relevant for
      fastboot (or at least we can allow some wiggle room in some
      parameters, like the clocks), we need to add a strict_checking
      parameter to intel_pipe_config_compare for fastboot.
      
      For now intel_pipe_config_compare should be fully paranoid and
      check everything that the hw state readout code supports. Which
      for this infrastructure code is nothing.
      
      I've gone a bit overboard with adding 3 get_pipe_config functions:
      The ilk version will differ with the next patch, so it's not too
      onerous.
      
      v2: Don't check the hw config if the pipe is off, since an enabled,
      but dpms off crtc will obviously have tons of difference with the hw
      state.
      Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      0e8ffe1b
    • Daniel Vetter's avatar
      drm/i915: rip out superflous is_dp&is_cpu_edp tracking · 8b47047b
      Daniel Vetter authored
      The only exception left is is_cpu_edp in the haswell modeset code.
      We need that to assign the cpu transcoder, but we might want to
      move that eventually into the encoder, too.
      
      \o/-by: Jesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      8b47047b
    • Daniel Vetter's avatar
      drm/i915: remove leaky eDP functions · 947978fa
      Daniel Vetter authored
      Jesse Barnes noticed in his review of my DP cleanup series that
      intel_edp_target_clock is now unused. Checking related code I've
      noticed that also intel_edp_link_config is long unused.
      
      Kill them both.
      
      Wrt leaky eDP functions used in the common crtc code, the only thing
      still left is intel_encoder_is_pch_edp. That one is just due to the
      massive confusion between eDP vs. DP and port A vs. port D. Crtc code
      should at most concern itself with the later, never with the former.
      
      But that's material for another patch series.
      
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      947978fa