1. 06 Oct, 2016 10 commits
  2. 04 Oct, 2016 30 commits
    • Paul Burton's avatar
      MIPS: SEAD3: Parse memsize in DT shim · fd4d7404
      Paul Burton authored
      Parse the memsize argument provided by the bootloader in the DT shim
      code, allowing the user to override it on the command line. This places
      all of the DT manipulation code into sead3-dtshim.c.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Matt Redfearn <matt.redfearn@imgtec.com>
      Cc: Rob Herring <robh@kernel.org>
      Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14058/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      fd4d7404
    • Paul Burton's avatar
      MIPS: SEAD3: Use generic restart-poweroff driver · a1ec6003
      Paul Burton authored
      Remove the custom platform code to restart when instructed to power off,
      instead relying upon the generic restart-poweroff driver probed via DT
      to do the same thing.
      
      Remove also the halt implementation, which is incorrect. The generic
      MIPS version will hang the system as halt should.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Jacek Anaszewski <j.anaszewski@samsung.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14057/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      a1ec6003
    • Paul Burton's avatar
      MIPS: SEAD3: Reset via generic syscon-reboot driver & DT · 70bfdcec
      Paul Burton authored
      Remove the SEAD3 implementation of _machine_restart & instead make use
      of the generic syscon-reboot driver probed via device tree.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14056/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      70bfdcec
    • Paul Burton's avatar
      MIPS: SEAD3: Use register-bit-led driver via DT for LEDs · c764583f
      Paul Burton authored
      Probe a driver for the PLED & FLED LEDs found on the SEAD3 board using
      the register-bit-led driver via device tree, rather than a custom driver
      via platform code. Enable support for the register-bit-led driver & its
      prerequisite syscon in sead3_defconfig.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Jacek Anaszewski <j.anaszewski@samsung.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14054/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      c764583f
    • Paul Burton's avatar
      MIPS: SEAD3: Probe parallel flash via DT · 3aefc655
      Paul Burton authored
      Probe the system parallel flash using device tree rather than platform
      code, in order to reduce the amount of the latter.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14053/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      3aefc655
    • Paul Burton's avatar
      USB: host: ehci-sead3: Remove SEAD-3 EHCI code · 63c8d90c
      Paul Burton authored
      The SEAD-3 board is now probing its EHCI controller using the generic
      EHCI driver & its generic-ehci device tree binding. Remove the unused
      SEAD-3 specific EHCI code.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Acked-by: default avatarAlan Stern <stern@rowland.harvard.edu>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-usb@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14052/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      63c8d90c
    • Paul Burton's avatar
      MIPS: SEAD3: Probe EHCI controller using DT · 7afd2a5a
      Paul Burton authored
      Probe the SEAD3 EHCI controller using the generic-ehci driver & device
      tree rather than platform code, in order to reduce the amount of the
      latter.
      
      Now that no devices probed from platform code require interrupts, remove
      the retrieval of the IRQ domain & sead3int.h.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14051/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      7afd2a5a
    • Paul Burton's avatar
      MIPS: SEAD3: Probe ethernet controller using DT · a34e9388
      Paul Burton authored
      Probe the smsc911x ethernet controller using device tree rather than
      platform code, reducing the amount of the latter.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14050/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      a34e9388
    • Paul Burton's avatar
      MIPS: SEAD3: Use generic ns16550a earlycon support · 53f37d1d
      Paul Burton authored
      Stop selecting SYS_HAS_EARLY_PRINTK & remove the custom support for
      early output to the ns16550a UARTs, instead relying upon generic
      ns16550a earlycon support. This reduces the amount of platform code
      required for SEAD3 without losing any functionality.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Jacek Anaszewski <j.anaszewski@samsung.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14049/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      53f37d1d
    • Paul Burton's avatar
      MIPS: SEAD3: Probe UARTs using DT · c11e3b48
      Paul Burton authored
      Probe the UARTs on SEAD3 boards using device tree rather than platform
      code, in order to reduce the amount of the latter. This requires that
      CONFIG_SERIAL_OF_PLATFORM be enabled, so enable it in sead3_defconfig.
      The SEAD3 DT shim code is extended to read bootloader environment
      variables to determine the appropriate UART & mode for kernel console
      output & set the stdout-path property of the chosen node accordingly.
      
      In contrast to the old platform code, which appears to have only ever
      set "console=ttyS0,38400n8r" with the code in console_config never
      having an effect, this will honor the "yamontty" environment variable to
      select between the 2 UARTs on the board and then check the "modetty0" or
      "modetty1" variable as appropriate to determine the UART configuration.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14048/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      c11e3b48
    • Paul Burton's avatar
      MIPS: SEAD3: Probe interrupt controllers using DT · b6d5e47e
      Paul Burton authored
      Probe the CPU interrupt controller & optional Global Interrupt
      Controller (GIC) using devicetree rather than platform code. Because the
      bootloader on SEAD3 does not provide a device tree to the kernel & the
      device tree is always built in, we patch out the GIC node during boot if
      we detect that a GIC is not present in the system.
      
      The appropriate IRQ domain is discovered by platform code setting up
      device IRQ numbers temporarily. It will be removed by further patches
      which move the devices towards being probed via device tree.
      
      No behavioural change is intended by this patch.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Matt Redfearn <matt.redfearn@imgtec.com>
      Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
      Cc: Jacek Anaszewski <j.anaszewski@samsung.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14047/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      b6d5e47e
    • Paul Burton's avatar
      MIPS: SEAD3: Split obj-y entries across lines · 0a152736
      Paul Burton authored
      Split the obj-y entries for SEAD3 onto a line each, so that they're more
      independent & can be modified more clearly by later commits.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Jacek Anaszewski <j.anaszewski@samsung.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14046/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      0a152736
    • Paul Burton's avatar
      MIPS: pm-cps: Generate idle state entry code when CPUs are onlined · ba750502
      Paul Burton authored
      The MIPS Coherent Processing System (CPS) power management code has
      previously generated code used to enter low power idle states once
      during boot for all CPUs. This has the drawback that if a CPU is present
      in the system but not being used (for example due to the maxcpus kernel
      parameter) then we encounter problems due to not having probed that CPU
      for information about its type & properties. The result of this is that
      we generate entry code which is both unused, potentially entirely
      invalid & likely to be unsuitable for the CPU in question anyway.
      
      Avoid this by generating idle state entry code only when a CPU is
      brought online. This way we only ever generate code for CPUs that we
      know we've probed the properties of, and that will actually be used.
      
      [ralf@linux-mips.org: Resolve merge conflict.]
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
      Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14259/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      ba750502
    • Paul Gortmaker's avatar
      MIPS: kvm: Audit and remove any unnecessary uses of module.h · cd14c92b
      Paul Gortmaker authored
      Historically a lot of these existed because we did not have
      a distinction between what was modular code and what was providing
      support to modules via EXPORT_SYMBOL and friends.  That changed
      when we forked out support for the latter into the export.h file.
      
      This means we should be able to reduce the usage of module.h
      in code that is obj-y Makefile or bool Kconfig.  In the case of
      kvm where it is modular, we can extend that to also include files
      that are building basic support functionality but not related
      to loading or registering the final module; such files also have
      no need whatsoever for module.h
      
      The advantage in removing such instances is that module.h itself
      sources about 15 other headers; adding significantly to what we feed
      cpp, and it can obscure what headers we are effectively using.
      
      Since module.h was the source for init.h (for __init) and for
      export.h (for EXPORT_SYMBOL) we consider each instance for the
      presence of either and replace as needed.  In this case, we did
      not need to add either to any files.
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Acked-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Acked-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: kvm@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14036/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      cd14c92b
    • Paul Gortmaker's avatar
      MIPS: pci: Audit and remove any unnecessary uses of module.h · 2722090a
      Paul Gortmaker authored
      Historically a lot of these existed because we did not have
      a distinction between what was modular code and what was providing
      support to modules via EXPORT_SYMBOL and friends.  That changed
      when we forked out support for the latter into the export.h file.
      
      This means we should be able to reduce the usage of module.h
      in code that is obj-y Makefile or bool Kconfig.  The advantage
      in doing so is that module.h itself sources about 15 other headers;
      adding significantly to what we feed cpp, and it can obscure what
      headers we are effectively using.
      
      Since module.h was the source for init.h (for __init) and for
      export.h (for EXPORT_SYMBOL) we consider each obj-y/bool instance
      for the presence of either and replace as needed.
      
      We also needed to remove the no-op MODULE_DEVICE_TABLE usage in
      several instances to permit removal of the module.h include.  The
      files in these instances were all controlled by bool Kconfig.
      
      In one instance, module_param was being used so we transition the
      module.h include onto a moduleparam.h include.
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14035/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      2722090a
    • Paul Gortmaker's avatar
      MIPS: lib: Audit and remove any unnecessary uses of module.h · 527581b9
      Paul Gortmaker authored
      Historically a lot of these existed because we did not have
      a distinction between what was modular code and what was providing
      support to modules via EXPORT_SYMBOL and friends.  That changed
      when we forked out support for the latter into the export.h file.
      
      This means we should be able to reduce the usage of module.h
      in code that is obj-y Makefile or bool Kconfig.  The advantage
      in doing so is that module.h itself sources about 15 other headers;
      adding significantly to what we feed cpp, and it can obscure what
      headers we are effectively using.
      
      Since module.h was the source for init.h (for __init) and for
      export.h (for EXPORT_SYMBOL) we consider each obj-y/bool instance
      for the presence of either and replace as needed.
      
      The compiler.h additions are for an implict presence of the
      "notrace" which module.h brought in but export.h does not.
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14034/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      527581b9
    • Paul Gortmaker's avatar
      MIPS: mm: Audit and remove any unnecessary uses of module.h · d9ba5778
      Paul Gortmaker authored
      Historically a lot of these existed because we did not have
      a distinction between what was modular code and what was providing
      support to modules via EXPORT_SYMBOL and friends.  That changed
      when we forked out support for the latter into the export.h file.
      
      This means we should be able to reduce the usage of module.h
      in code that is obj-y Makefile or bool Kconfig.  The advantage
      in doing so is that module.h itself sources about 15 other headers;
      adding significantly to what we feed cpp, and it can obscure what
      headers we are effectively using.
      
      Since module.h was the source for init.h (for __init) and for
      export.h (for EXPORT_SYMBOL) we consider each obj-y/bool instance
      for the presence of either and replace as needed.
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14033/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      d9ba5778
    • Paul Gortmaker's avatar
      MIPS: kernel: Audit and remove any unnecessary uses of module.h · d9d54177
      Paul Gortmaker authored
      Historically a lot of these existed because we did not have
      a distinction between what was modular code and what was providing
      support to modules via EXPORT_SYMBOL and friends.  That changed
      when we forked out support for the latter into the export.h file.
      
      This means we should be able to reduce the usage of module.h
      in code that is obj-y Makefile or bool Kconfig.  The advantage
      in doing so is that module.h itself sources about 15 other headers;
      adding significantly to what we feed cpp, and it can obscure what
      headers we are effectively using.
      
      Since module.h was the source for init.h (for __init) and for
      export.h (for EXPORT_SYMBOL) we consider each obj-y/bool instance
      for the presence of either and replace as needed.
      
      In the case of the n32/o32 files, we have to get rid of a couple
      no-op MODULE_ tags to facilitate the module.h removal.  They piggy
      back off the fs/ elf binary support, which is also a bool Kconfig.
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14032/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      d9d54177
    • Ralf Baechle's avatar
      74abd4e9
    • Matt Redfearn's avatar
      MIPS: smp.c: Introduce mechanism for freeing and allocating IPIs · 7688c539
      Matt Redfearn authored
      For the MIPS remote processor implementation, we need additional IPIs to
      talk to the remote processor. Since MIPS GIC reserves exactly the right
      number of IPI IRQs required by Linux for the number of VPs in the
      system, this is not possible without releasing some recources.
      
      This commit introduces mips_smp_ipi_allocate() which allocates IPIs to a
      given cpumask. It is called as normal with the cpu_possible_mask at
      bootup to initialise IPIs to all CPUs. mips_smp_ipi_free() may then be
      used to free IPIs to a subset of those CPUs so that their hardware
      resources can be reused.
      Signed-off-by: default avatarMatt Redfearn <matt.redfearn@imgtec.com>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Ohad Ben-Cohen <ohad@wizery.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Lisa Parratt <Lisa.Parratt@imgtec.com>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Qais Yousef <qsyousef@gmail.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-remoteproc@vger.kernel.org
      Cc: lisa.parratt@imgtec.com
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14285/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      7688c539
    • Matt Redfearn's avatar
      MIPS: tlb-r4k: If there are wired entries, don't use TLBINVF · e710d666
      Matt Redfearn authored
      When adding a wired entry to the TLB via add_wired_entry, the tlb is
      flushed with local_flush_tlb_all, which on CPUs with TLBINV results in
      the new wired entry being flushed again.
      
      Behavior of the TLBINV instruction applies to all applicable TLB entries
      and is unaffected by the setting of the Wired register. Therefore if
      the TLB has any wired entries, fall back to iterating over the entries
      rather than blasting them all using TLBINVF.
      Signed-off-by: default avatarMatt Redfearn <matt.redfearn@imgtec.com>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Ohad Ben-Cohen <ohad@wizery.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: lisa.parratt@imgtec.com
      Cc: Hugh Dickins <hughd@google.com>
      Cc: Huacai Chen <chenhc@lemote.com>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: linux-mips@linux-mips.org
      Cc: linux-remoteproc@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14283/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      e710d666
    • James Hogan's avatar
      MIPS: c-r4k: Fix flush_icache_range() for EVA · b2ff7171
      James Hogan authored
      flush_icache_range() flushes icache lines in a protected fashion for
      kernel addresses, however this isn't correct with EVA where protected
      cache ops only operate on user addresses, making flush_icache_range()
      ineffective.
      
      Split the implementations of __flush_icache_user_range() from
      flush_icache_range(), changing the normal flush_icache_range() to use
      unprotected normal cache ops.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14156/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      b2ff7171
    • James Hogan's avatar
      MIPS: KVM: Use __local_flush_icache_user_range() · 24d1a6e6
      James Hogan authored
      Convert KVM dynamic translation of guest instructions to flush icache
      for guest mapped addresses using the new
      __local_flush_icache_user_range() API to allow the more generic
      flush_icache_range() to be changed to work on kernel addresses only.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14155/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      24d1a6e6
    • James Hogan's avatar
      MIPS: uprobes: Flush icache via kernel address · d99a043a
      James Hogan authored
      Update arch_uprobe_copy_ixol() to use the kmap_atomic() based kernel
      address to flush the icache with flush_icache_range(), rather than the
      user mapping. We have the kernel mapping available anyway and this
      avoids having to switch to using the new __flush_icache_user_range() for
      the sake of Enhanced Virtual Addressing (EVA) where flush_icache_range()
      will become ineffective on user addresses.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14154/
      Patchwork: https://patchwork.linux-mips.org/patch/14308/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      d99a043a
    • James Hogan's avatar
      MIPS: cacheflush: Use __flush_icache_user_range() · 8e3a9f4c
      James Hogan authored
      The cacheflush(2) system call uses flush_icache_range() to flush a range
      of usermode addresses from the icache, so change it to utilise the new
      __flush_icache_user_range() API to allow the more generic
      flush_icache_range() to be changed to work on kernel addresses only.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14153/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      8e3a9f4c
    • James Hogan's avatar
      MIPS: c-r4k: Split user/kernel flush_icache_range() · 01882b4d
      James Hogan authored
      flush_icache_range() is used for both user addresses (i.e.
      cacheflush(2)), and kernel addresses (as the API documentation
      describes).
      
      This isn't really suitable however for Enhanced Virtual Addressing (EVA)
      where cache operations on usermode addresses must use a different
      instruction, and the protected cache ops assume user addresses, making
      flush_icache_range() ineffective on kernel addresses.
      
      Split out a new __flush_icache_user_range() and
      __local_flush_icache_user_range() for users which actually want to flush
      usermode addresses (note that flush_icache_user_range() already exists
      on various architectures but with different arguments).
      
      The implementation of flush_icache_range() will be changed in an
      upcoming commit to use unprotected normal cache ops so as to always work
      on the kernel mode address space.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14152/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      01882b4d
    • James Hogan's avatar
      MIPS: c-r4k: Drop bc_wback_inv() from icache flush · d260d97e
      James Hogan authored
      The EVA conditional bc_wback_inv() at the end of flush_icache_range() to
      flush the modified code all the way back to RAM was apparently there for
      debug purposes and to accommodate the Malta EVA configuration which
      makes use of a physical alias, and didn't use the CP0_EBase.WG (Write
      Gate) bit to put the exception vector in the same physical alias where
      the exception vector code is written and is being flushed.
      
      Now that CP0_EBase.WG is used, lets drop this flush.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14151/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      d260d97e
    • Matt Redfearn's avatar
      MIPS: traps: Ensure full EBase is written · 4b22c693
      Matt Redfearn authored
      On CPUs which support the EBase WG (write gate) flag, the most
      significant bits of the exception base can be changed. Firmware running
      on a VP(E) using MIPS rproc may change EBase to point into the user
      segment where the firmware is located such that it can service
      interrupts. When control is transferred back to the kernel the EBase
      must be switched back into the kernel segment, such that the kernel's
      exception vectors are used.
      
      Similarly when vectored interrupts (vint) or vectored external interrupt
      controllers (veic) are enabled an exception vector is allocated from
      bootmem, and written to the EBase register. Due to the WG flag being
      clear, only bits 29:12 will be written. Asside from the rproc case above
      this is normally fine (as it will usually be a low allocation within the
      KSeg0 range, however when Enhanced Virtual Addressing (EVA) is enabled
      the allocation may be outside of the traditional KSeg0/KSeg1 address
      range, resulting in the wrong EBase being written.
      
      Correct both cases (configure_exception_vector() for the boot CPU, and
      per_cpu_trap_init() for secondary CPUs) to write EBase with the WG flag
      first if supported.
      
      On the Malta EVA configuration, KSeg0 is mapped to physical address 0,
      and memory is allocated from the KUSeg segment which is mapped to
      physical address 0x80000000, which physically aliases the RAM at 0. This
      only worked due to the exception base address aliasing the same
      underlying RAM that was written to & cache flushed, and due to
      flush_icache_range() going beyond the call of duty and flushing from the
      L2 cache too (due to the differing physical addresses).
      Signed-off-by: default avatarMatt Redfearn <matt.redfearn@imgtec.com>
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14150/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      4b22c693
    • James Hogan's avatar
      MIPS: traps: Convert ebase to KSEG0 · c195e079
      James Hogan authored
      When allocating boot memory for the exception vector when vectored
      interrupts (vint) or vectored external interrupt controllers (veic) are
      enabled, try to ensure that the virtual address resides in KSeg0 (and
      WARN should that not be possible).
      
      This will be helpful on MIPS64 cores supporting the CP0_EBase Write Gate
      (WG) bit once we start using the WG bit to write the full ebase into
      CP0_EBase, as we ideally need to avoid hitting the architecturally
      poorly defined exception base for Cache Errors when CP0_EBase is in
      XKPhys.
      
      An exception is made for Enhanced Virtual Addressing (EVA) kernels which
      allow segments to be rearranged and to become uncached during cache
      error handling, making it valid for ebase to be elsewhere.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Matt Redfearn <matt.redfearn@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14149/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      c195e079
    • James Hogan's avatar
      MIPS: traps: 64bit kernels should read CP0_EBase 64bit · 18022894
      James Hogan authored
      When reading the CP0_EBase register containing the WG (write gate) bit,
      the ebase variable should be set to the full value of the register, i.e.
      on a 64-bit kernel the full 64-bit width of the register via
      read_cp0_ebase_64(), and on a 32-bit kernel the full 32-bit width
      including bits 31:30 which may be writeable.
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Signed-off-by: default avatarMatt Redfearn <matt.redfearn@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14148/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      18022894