- 31 Aug, 2024 13 commits
-
-
David S. Miller authored
Ido Schimmel says: ==================== Unmask upper DSCP bits - part 2 tl;dr - This patchset continues to unmask the upper DSCP bits in the IPv4 flow key in preparation for allowing IPv4 FIB rules to match on DSCP. No functional changes are expected. Part 1 was merged in commit ("Merge branch 'unmask-upper-dscp-bits-part-1'"). The TOS field in the IPv4 flow key ('flowi4_tos') is used during FIB lookup to match against the TOS selector in FIB rules and routes. It is currently impossible for user space to configure FIB rules that match on the DSCP value as the upper DSCP bits are either masked in the various call sites that initialize the IPv4 flow key or along the path to the FIB core. In preparation for adding a DSCP selector to IPv4 and IPv6 FIB rules, we need to make sure the entire DSCP value is present in the IPv4 flow key. This patchset continues to unmask the upper DSCP bits, but this time in the output route path. Patches #1-#3 unmask the upper DSCP bits in the various places that invoke the core output route lookup functions directly. Patches #4-#6 do the same in three helpers that are widely used in the output path to initialize the TOS field in the IPv4 flow key. The rest of the patches continue to unmask these bits in call sites that invoke the following wrappers around the core lookup functions: Patch #7 - __ip_route_output_key() Patches #8-#12 - ip_route_output_flow() The next patchset will handle the callers of ip_route_output_ports() and ip_route_output_key(). No functional changes are expected as commit 1fa3314c ("ipv4: Centralize TOS matching") moved the masking of the upper DSCP bits to the core where 'flowi4_tos' is matched against the TOS selector. Changes since v1 [1]: * Remove IPTOS_RT_MASK in patch #7 instead of in patch #6 [1] https://lore.kernel.org/netdev/20240827111813.2115285-1-idosch@nvidia.com/ ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
-
Ido Schimmel authored
Unmask the upper DSCP bits when calling ip_route_output_flow() so that in the future it could perform the FIB lookup according to the full DSCP value. Signed-off-by:
Ido Schimmel <idosch@nvidia.com> Reviewed-by:
Guillaume Nault <gnault@redhat.com> Signed-off-by:
-
Ido Schimmel authored
Unmask the upper DSCP bits when calling ip_route_output_flow() so that in the future it could perform the FIB lookup according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
Unmask the upper DSCP bits when calling ip_route_output_flow() so that in the future it could perform the FIB lookup according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
The function calls flowi4_init_output() to initialize an IPv4 flow key with which it then performs a FIB lookup using ip_route_output_flow(). The 'tos' variable with which the TOS value in the IPv4 flow key (flowi4_tos) is initialized contains the full DS field. Unmask the upper DSCP bits so that in the future the FIB lookup could be performed according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
The function calls flowi4_init_output() to initialize an IPv4 flow key with which it then performs a FIB lookup using ip_route_output_flow(). 'arg->tos' with which the TOS value in the IPv4 flow key (flowi4_tos) is initialized contains the full DS field. Unmask the upper DSCP bits so that in the future the FIB lookup could be performed according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
The function returns a value that is used to initialize 'flowi4_tos' before being passed to the FIB lookup API in the following call chain: xfrm_bundle_create() tos = xfrm_get_tos(fl, family) xfrm_dst_lookup(..., tos, ...) __xfrm_dst_lookup(..., tos, ...) xfrm4_dst_lookup(..., tos, ...) __xfrm4_dst_lookup(..., tos, ...) fl4->flowi4_tos = tos __ip_route_output_key(net, fl4) Unmask the upper DSCP bits so that in the future the output route lookup could be performed according to the full DSCP value. Remove IPTOS_RT_MASK since it is no longer used. Signed-off-by:
-
Ido Schimmel authored
build_sk_flow_key() and __build_flow_key() are used to build an IPv4 flow key before calling one of the FIB lookup APIs. Unmask the upper DSCP bits so that in the future the lookup could be performed according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
The function is used by a few socket types to retrieve the TOS value with which to perform the FIB lookup for packets sent through the socket (flowi4_tos). If a DS field was passed using the IP_TOS control message, then it is used. Otherwise the one specified via the IP_TOS socket option. Unmask the upper DSCP bits so that in the future the lookup could be performed according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
The function is used to read the DS field that was stored in IPv4 sockets via the IP_TOS socket option so that it could be used to initialize the flowi4_tos field before resolving an output route. Unmask the upper DSCP bits so that in the future the output route lookup could be performed according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
The function is called to resolve a route for an ICMP message that is sent in response to a situation. Based on the type of the generated ICMP message, the function is either passed the DS field of the packet that generated the ICMP message or a DS field that is derived from it. Unmask the upper DSCP bits before resolving and output route via ip_route_output_key_hash() so that in the future the lookup could be performed according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
Unmask the upper DSCP bits so that in the future output routes could be looked up according to the full DSCP value. Signed-off-by:
-
Ido Schimmel authored
Unmask the upper DSCP bits when looking up an output route via the RTM_GETROUTE netlink message so that in the future the lookup could be performed according to the full DSCP value. No functional changes intended since the upper DSCP bits are masked when comparing against the TOS selectors in FIB rules and routes. Signed-off-by:
-
- 30 Aug, 2024 16 commits
-
-
Diogo Jahchan Koike authored
Move validation into set, removing .set_validate operation as its current implementation holds the rtnl lock for acquiring the PHY device, defeating the intended purpose of checking before grabbing the lock. Reported-by: syzbot+ec369e6d58e210135f71@syzkaller.appspotmail.com Closes: https://syzkaller.appspot.com/bug?extid=ec369e6d58e210135f71 Fixes: 31748765 ("net: ethtool: pse-pd: Target the command to the requested PHY") Signed-off-by:
Diogo Jahchan Koike <djahchankoike@gmail.com> Reviewed-by:
Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/20240829184830.5861-1-djahchankoike@gmail.comSigned-off-by:
Jakub Kicinski <kuba@kernel.org>
-
Joe Damato authored
Two fields, page_pools and *irq_moder, were added to struct net_device in commit 083772c9 ("net: page_pool: record pools per netdev") and commit f750dfe8 ("ethtool: provide customized dim profile management"), respectively. Add both to the net_cachelines documentation, as well. Signed-off-by:
Joe Damato <jdamato@fastly.com> Link: https://patch.msgid.link/20240829155742.366584-1-jdamato@fastly.comSigned-off-by:
-
Jakub Kicinski authored
Eric Dumazet says: ==================== icmp: avoid possible side-channels attacks Keyu Man reminded us that linux ICMP rate limiting was still allowing side-channels attacks. Quoting the fine document [1]: 4.4 Private Source Port Scan Method ... We can then use the same global ICMP rate limit as a side channel to infer if such an ICMP message has been triggered. At first glance, this method can work but at a low speed of one port per second, due to the per-IP rate limit on ICMP messages. Surprisingly, after we analyze the source code of the ICMP rate limit implementation, we find that the global rate limit is checked prior to the per-IP rate limit. This means that even if the per-IP rate limit may eventually determine that no ICMP reply should be sent, a packet is still subjected to the global rate limit check and one token is deducted. Ironically, such a decision is consciously made by Linux developers to avoid invoking the expensive check of the per-IP rate limit [ 22], involving a search process to locate the per-IP data structure. This effectively means that the per-IP rate limit can be disre- garded for the purpose of our side channel based scan, as it only determines if the final ICMP reply is generated but has nothing to do with the global rate limit counter decrement. As a result, we can continue to use roughly the same scan method as efficient as before, achieving 1,000 ports per second ... This series : 1) Changes the order of the two rate limiters to fix the issue. 2-3) Make the 'host-wide' rate limiter a per-netns one. [1] Link: https://dl.acm.org/doi/pdf/10.1145/3372297.3417280 ==================== Link: https://patch.msgid.link/20240829144641.3880376-1-edumazet@google.comSigned-off-by:
-
Eric Dumazet authored
Previous patch made ICMP rate limits per netns, it makes sense to allow each netns to change the associated sysctl. Signed-off-by:
Eric Dumazet <edumazet@google.com> Reviewed-by:
David Ahern <dsahern@kernel.org> Link: https://patch.msgid.link/20240829144641.3880376-4-edumazet@google.comSigned-off-by:
-
Eric Dumazet authored
Host wide ICMP ratelimiter should be per netns, to provide better isolation. Following patch in this series makes the sysctl per netns. Signed-off-by:
-
Eric Dumazet authored
ICMP messages are ratelimited : After the blamed commits, the two rate limiters are applied in this order: 1) host wide ratelimit (icmp_global_allow()) 2) Per destination ratelimit (inetpeer based) In order to avoid side-channels attacks, we need to apply the per destination check first. This patch makes the following change : 1) icmp_global_allow() checks if the host wide limit is reached. But credits are not yet consumed. This is deferred to 3) 2) The per destination limit is checked/updated. This might add a new node in inetpeer tree. 3) icmp_global_consume() consumes tokens if prior operations succeeded. This means that host wide ratelimit is still effective in keeping inetpeer tree small even under DDOS. As a bonus, I removed icmp_global.lock as the fast path can use a lock-free operation. Fixes: c0303efe ("net: reduce cycles spend on ICMP replies that gets rate limited") Fixes: 4cdf507d ("icmp: add a global rate limitation") Reported-by:
Keyu Man <keyu.man@email.ucr.edu> Signed-off-by:
-
Yan Zhen authored
Using ERR_CAST() is more reasonable and safer, When it is necessary to convert the type of an error pointer and return it. Signed-off-by:
Yan Zhen <yanzhen@vivo.com> Acked-by:
Eelco Chaudron <echaudro@redhat.com> Reviewed-by:
Aaron Conole <aconole@redhat.com> Link: https://patch.msgid.link/20240829095509.3151987-1-yanzhen@vivo.comSigned-off-by:
-
Shen Lichuan authored
Use ERR_CAST() as it is designed for casting an error pointer to another type. Signed-off-by:
Shen Lichuan <shenlichuan@vivo.com> Link: https://patch.msgid.link/20240829072538.33195-1-shenlichuan@vivo.comSigned-off-by:
-
Shen Lichuan authored
As opposed to open-code, using the ERR_CAST macro clearly indicates that this is a pointer to an error value and a type conversion was performed. Signed-off-by:
Jacob Keller <jacob.e.keller@intel.com> Reviewed-by:
Martin Habets <habetsm.xilinx@gmail.com> Reviewed-by:
Edward Cree <ecree.xilinx@gmail.com> Link: https://patch.msgid.link/20240829021253.3066-1-shenlichuan@vivo.comSigned-off-by:
-
David S. Miller authored
FUJITA Tomonori says: ==================== net: phy: add Applied Micro QT2025 PHY driver This patchset adds a PHY driver for Applied Micro Circuits Corporation QT2025. The first patch adds Rust equivalent to include/linux/sizes.h, makes code more readable. The 2-5th patches update the PHYLIB Rust bindings. The 4th and 5th patches have been reviewed previously in a different thread [1]. QT2025 PHY support was implemented as a part of an Ethernet driver for Tehuti Networks TN40xx chips. Multiple vendors (DLink, Asus, Edimax, QNAP, etc) developed adapters based on TN40xx chips. Tehuti Networks went out of business and the driver wasn't merged into mainline. But it's still distributed with some of the hardware (and also available on some vendor sites). The original driver handles multiple PHY hardware (AMCC QT2025, TI TLK10232, Aqrate AQR105, and Marvell MV88X3120, MV88X3310, and MV88E2010). I divided the original driver into MAC and PHY drivers and implemented a QT2025 PHY driver in Rust. The MAC driver for Tehuti Networks TN40xx chips was already merged in 6.11-rc1. The MAC and this PHY drivers have been tested with Edimax EN-9320SFP+ 10G network adapter. [1] https://lore.kernel.org/rust-for-linux/20240607052113.69026-1-fujita.tomonori@gmail.com/ v7: - add Trevor as Reviewer to MAINTAINERS file entry - add Trevor Reviewed-by - add/fix comments - replace uppercase hex with lowercase - remove unnecessary code - update the commit message (1st patch) v6: https://lore.kernel.org/netdev/20240820225719.91410-1-fujita.tomonori@gmail.com/ - improve comments - make the logic to load firmware more readable - add Copy trait to reg::{C22 and C45} - add Trevor Reviewed-by v5: https://lore.kernel.org/netdev/20240819005345.84255-1-fujita.tomonori@gmail.com/ - fix the comments (3th patch) - add RUST_FW_LOADER_ABSTRACTIONS dependency - add Andrew and Benno Reviewed-by v4: https://lore.kernel.org/netdev/20240817051939.77735-1-fujita.tomonori@gmail.com/ - fix the comments - add Andrew's Reviewed-by - fix the order of tags - remove wrong endianness conversion v3: https://lore.kernel.org/netdev/20240804233835.223460-1-fujita.tomonori@gmail.com/ - use addr_of_mut!` to avoid intermediate mutable reference - update probe callback's Safety comment - add MODULE_FIRMWARE equivalent - add Alice's Reviewed-by v2: https://lore.kernel.org/netdev/20240731042136.201327-1-fujita.tomonori@gmail.com/ - add comments in accordance with the hw datasheet - unify C22 and C45 APIs - load firmware in probe callback instead of config_init - use firmware API - handle firmware endian - check firmware size - use SZ_*K constants - avoid confusing phy_id variable v1: https://lore.kernel.org/netdev/20240415104701.4772-1-fujita.tomonori@gmail.com/ ==================== rom: FUJITA Tomonori <fujita.tomonori@gmail.com> To: netdev@vger.kernel.org Cc: rust-for-linux@vger.kernel.org, andrew@lunn.ch, tmgross@umich.edu, miguel.ojeda.sandonis@gmail.com, benno.lossin@proton.me, aliceryhl@google.com Subject: [PATCH net-next v7 0/6] net: phy: add Applied Micro QT2025 PHY driver Date: Sat, 24 Aug 2024 02:06:10 +0000 [thread overview] Message-ID: <20240824020617.113828-1-fujita.tomonori@gmail.com> (raw) This patchset adds a PHY driver for Applied Micro Circuits Corporation QT2025. The first patch adds Rust equivalent to include/linux/sizes.h, makes code more readable. The 2-5th patches update the PHYLIB Rust bindings. The 4th and 5th patches have been reviewed previously in a different thread [1]. QT2025 PHY support was implemented as a part of an Ethernet driver for Tehuti Networks TN40xx chips. Multiple vendors (DLink, Asus, Edimax, QNAP, etc) developed adapters based on TN40xx chips. Tehuti Networks went out of business and the driver wasn't merged into mainline. But it's still distributed with some of the hardware (and also available on some vendor sites). The original driver handles multiple PHY hardware (AMCC QT2025, TI TLK10232, Aqrate AQR105, and Marvell MV88X3120, MV88X3310, and MV88E2010). I divided the original driver into MAC and PHY drivers and implemented a QT2025 PHY driver in Rust. The MAC driver for Tehuti Networks TN40xx chips was already merged in 6.11-rc1. The MAC and this PHY drivers have been tested with Edimax EN-9320SFP+ 10G network adapter. [1] https://lore.kernel.org/rust-for-linux/20240607052113.69026-1-fujita.tomonori@gmail.com/ v7: - add Trevor as Reviewer to MAINTAINERS file entry - add Trevor Reviewed-by - add/fix comments - replace uppercase hex with lowercase - remove unnecessary code - update the commit message (1st patch) v6: https://lore.kernel.org/netdev/20240820225719.91410-1-fujita.tomonori@gmail.com/ - improve comments - make the logic to load firmware more readable - add Copy trait to reg::{C22 and C45} - add Trevor Reviewed-by v5: https://lore.kernel.org/netdev/20240819005345.84255-1-fujita.tomonori@gmail.com/ - fix the comments (3th patch) - add RUST_FW_LOADER_ABSTRACTIONS dependency - add Andrew and Benno Reviewed-by v4: https://lore.kernel.org/netdev/20240817051939.77735-1-fujita.tomonori@gmail.com/ - fix the comments - add Andrew's Reviewed-by - fix the order of tags - remove wrong endianness conversion v3: https://lore.kernel.org/netdev/20240804233835.223460-1-fujita.tomonori@gmail.com/ - use addr_of_mut!` to avoid intermediate mutable reference - update probe callback's Safety comment - add MODULE_FIRMWARE equivalent - add Alice's Reviewed-by v2: https://lore.kernel.org/netdev/20240731042136.201327-1-fujita.tomonori@gmail.com/ - add comments in accordance with the hw datasheet - unify C22 and C45 APIs - load firmware in probe callback instead of config_init - use firmware API - handle firmware endian - check firmware size - use SZ_*K constants - avoid confusing phy_id variable v1: https://lore.kernel.org/netdev/20240415104701.4772-1-fujita.tomonori@gmail.com/Signed-off-by:
Andrew Lunn <andrew@lunn.ch>
-
FUJITA Tomonori authored
This driver supports Applied Micro Circuits Corporation QT2025 PHY, based on a driver for Tehuti Networks TN40xx chips. The original driver for TN40xx chips supports multiple PHY hardware (AMCC QT2025, TI TLK10232, Aqrate AQR105, and Marvell 88X3120, 88X3310, and MV88E2010). This driver is extracted from the original driver and modified to a PHY driver in Rust. This has been tested with Edimax EN-9320SFP+ 10G network adapter. Reviewed-by:
Trevor Gross <tmgross@umich.edu> Reviewed-by:
FUJITA Tomonori <fujita.tomonori@gmail.com> Signed-off-by:
-
FUJITA Tomonori authored
Add unified genphy_read_status function for C22 and C45 registers. Instead of having genphy_c22 and genphy_c45 methods, this unifies genphy_read_status functions for C22 and C45. Reviewed-by:
Benno Lossin <benno.lossin@proton.me> Reviewed-by:
-
FUJITA Tomonori authored
Add the unified read/write API for C22 and C45 registers. The abstractions support access to only C22 registers now. Instead of adding read/write_c45 methods specifically for C45, a new reg module supports the unified API to access C22 and C45 registers with trait, by calling an appropriate phylib functions. Reviewed-by:
-
FUJITA Tomonori authored
Implement AsRef<kernel::device::Device> trait for Device. A PHY driver needs a reference to device::Device to call the firmware API. Reviewed-by:
Alice Ryhl <aliceryhl@google.com> Reviewed-by:
-
FUJITA Tomonori authored
Support phy_driver probe callback, used to set up device-specific structures. Reviewed-by:
-
FUJITA Tomonori authored
Add rust equivalent to include/linux/sizes.h, makes code more readable. Only SZ_*K that QT2025 PHY driver uses are added. Make generated constants accessible with a proper type. Reviewed-by:
-
- 29 Aug, 2024 11 commits
-
-
Jakub Kicinski authored
Michael Chan says: ==================== bnxt_en: Update for net-next This series starts with 2 patches to support firmware crash dump. The driver allocates the required DMA memory ahead of time for firmware to store the crash dump if and when it crashes. Patch 3 adds priority and TPID for the .ndo_set_vf_vlan() callback. Note that this was rejected and reverted last year and it is being re-submitted after recent changes in the guidelines. The remaining patches are MSIX related. Legacy interrupt is no longer supported by firmware so we remove the support in the driver. We then convert to use the newer kernel APIs to allocate and enable MSIX vectors. The last patch adds support for dynamic MSIX. v3: https://lore.kernel.org/20240823195657.31588-1-michael.chan@broadcom.com v2: https://lore.kernel.org/20240816212832.185379-1-michael.chan@broadcom.com v1: https://lore.kernel.org/20240713234339.70293-1-michael.chan@broadcom.com ==================== Link: https://patch.msgid.link/20240828183235.128948-1-michael.chan@broadcom.comSigned-off-by:
-
Michael Chan authored
A range of MSIX vectors are allocated at initialization for the number needed for RocE and L2. During run-time, if the user increases or decreases the number of L2 rings, all the MSIX vectors have to be freed and a new range has to be allocated. This is not optimal and causes disruptions to RoCE traffic every time there is a change in L2 MSIX. If the system supports dynamic MSIX allocations, use dynamic allocation to add new L2 MSIX vectors or free unneeded L2 MSIX vectors. RoCE traffic is not affected using this scheme. Reviewed-by:
Hongguang Gao <hongguang.gao@broadcom.com> Reviewed-by:
Somnath Kotur <somnath.kotur@broadcom.com> Reviewed-by:
Simon Horman <horms@kernel.org> Reviewed-by:
Przemek Kitszel <przemyslaw.kitszel@intel.com> Signed-off-by:
Michael Chan <michael.chan@broadcom.com> Reviewed-by:
Michal Swiatkowski <michal.swiatkowski@linux.intel.com> Link: https://patch.msgid.link/20240828183235.128948-10-michael.chan@broadcom.comSigned-off-by:
-
Michael Chan authored
If dynamic MSIX allocation is supported, additional MSIX can be allocated at run-time without reinitializing the existing MSIX entries. The first step to support this dynamic scheme is to allocate a large enough bp->irq_tbl if dynamic allocation is supported. Reviewed-by:
-
Michael Chan authored
Use the new pci_alloc_irq_vectors() and pci_free_irq_vectors() to replace the deprecated pci_enable_msix_range() and pci_disable_msix(). Reviewed-by:
Pavan Chebbi <pavan.chebbi@broadcom.com> Reviewed-by:
-
Michael Chan authored
In legacy INTX mode, a register is mapped so that the INTX handler can read it to determine if the NIC is the source of the interrupt. This and all the related macros are no longer needed now that INTX is no longer supported. Reviewed-by:
-
Michael Chan authored
Now that we only support MSIX, the BNXT_FLAG_USING_MSIX is always true. Remove it and any if conditions checking for it. Remove the INTX handler and associated logic. Reviewed-by:
Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Reviewed-by:
-
Michael Chan authored
Firmware has deprecated support for legacy INTX in 2022 (since v2.27) and INTX hasn't been tested for many years before that. INTX was only used as a fallback mechansim in case MSIX wasn't available. MSIX is always supported by all firmware. If MSIX capability in PCI config space is not found during probe, abort. Reviewed-by:
-
Sreekanth Reddy authored
With recent changes in the .ndo_set_vf_*() guidelines, resubmitting this patch that was reverted eariler in 2023: c2715368 ("Revert "bnxt_en: Support QOS and TPID settings for the SRIOV VLAN") Add these missing settings in the .ndo_set_vf_vlan() method. Older firmware does not support the TPID setting so check for proper support. Remove the unused BNXT_VF_QOS flag. Reviewed-by:
Sreekanth Reddy <sreekanth.reddy@broadcom.com> Signed-off-by:
-
Vikas Gupta authored
Add support for retrieving crash dump using ethtool -w on the supported interface. Reviewed-by:
Andy Gospodarek <andrew.gospodarek@broadcom.com> Reviewed-by:
Vikas Gupta <vikas.gupta@broadcom.com> Signed-off-by:
-
Vikas Gupta authored
Newer firmware supports automatic DMA of crash dump to host memory when it crashes. If the feature is supported, allocate the required memory using the existing context memory infrastructure. Communicate the page table containing the DMA addresses to the firmware. Reviewed-by:
-
Jakub Kicinski authored
Jon Maloy says: ==================== Adding SO_PEEK_OFF for TCPv6 Adding SO_PEEK_OFF for TCPv6 and selftest for both TCPv4 and TCPv6 ==================== Link: https://patch.msgid.link/20240828183752.660267-1-jmaloy@redhat.comSigned-off-by:
-
