- 19 Feb, 2024 2 commits
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Arınç ÜNAL authored
On MediaTek MT7986b RFB and MediaTek MT7986a RFB, port 5 of the MT7531 switch is connected to the second MAC of the SoC as a CPU port. Add the port and set up the second MAC on the bindings. Signed-off-by:
Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20240219-for-mediatek-v1-2-7078f23eab82@arinc9.comSigned-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Arınç ÜNAL authored
On Banana Pi BPI-R64 and MediaTek MT7622 RFB1 board, port 5 of the MT7531 switch is connected to the second MAC of the SoC as a CPU port. Add the port and set up the second MAC on the bindings. Signed-off-by:
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- 15 Feb, 2024 1 commit
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Alexander Stein authored
Use id-gpios and vbus-gpios instead. Signed-off-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by:
Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by:
Shawn Guo <shawnguo@kernel.org> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240215093214.796821-3-alexander.stein@ew.tq-group.comSigned-off-by:
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- 14 Feb, 2024 3 commits
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Krzysztof Kozlowski authored
Underscores should not be used in node names (dtc with W=2 warns about them), so replace them with hyphens. Signed-off-by:
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Nícolas F. R. A. Prado authored
The mtu3 usb controllers don't list the xhci clock, though they require it, and thus rely on the bootloader leaving it on in order to work. When booting with the upstream arm64 defconfig, the usb controllers will defer probe until modules have loaded since they have an indirect dependency on CONFIG_MTK_CMDQ, which is configured as a module. However at the point where modules are loaded, unused clocks are also disabled, causing the usb controllers to probe without the xhci clock enabled and fail to probe: mtu3 11201000.usb: clks of sts1 are not stable! mtu3 11201000.usb: device enable failed -110 mtu3 11201000.usb: mtu3 hw init failed:-110 mtu3 11201000.usb: failed to initialize gadget mtu3: probe of 11201000.usb failed with error -110 (and same for the one at 11281000) Add the missing clock for the usb controllers so that they can successfully probe without relying on the bootloader state. Fixes: f6c3e61c ("arm64: dts: mediatek: mt8186: Add MTU3 nodes") Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20240213-mt8186-ssusb-domain-clk-fix-v2-2-1f981d35f3fd@collabora.comSigned-off-by:
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Nícolas F. R. A. Prado authored
The ssusb power domains currently don't list any clocks, despite depending on some, and thus rely on the bootloader leaving the required clocks on in order to work. When booting with the upstream arm64 defconfig, the power domain controller will defer probe until modules have loaded since it has an indirect dependency on CONFIG_MTK_CMDQ, which is configured as a module. However at the point where modules are loaded, unused clocks are also disabled, causing the ssusb domains to fail to be enabled and consequently the controller to fail probe: mtk-power-controller 10006000.syscon:power-controller: /soc/syscon@10006000/power-controller/power-domain@4: failed to power on domain: -110 mtk-power-controller: probe of 10006000.syscon:power-controller failed with error -110 Add the missing clocks for the ssusb power domains so that they can successfully probe without relying on the bootloader state. Fixes: d9e43c1e ("arm64: dts: mt8186: Add power domains controller") Signed-off-by:
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- 12 Feb, 2024 34 commits
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Rafał Miłecki authored
This fixes: arch/arm64/boot/dts/mediatek/mt7622-rfb1.dtb: /: memory@40000000: 'device_type' is a required property from schema $id: http://devicetree.org/schemas/memory.yaml# arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dtb: /: memory@40000000: 'device_type' is a required property from schema $id: http://devicetree.org/schemas/memory.yaml#Signed-off-by:Rafał Miłecki <rafal@milecki.pl> Reviewed-by:
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Rafał Miłecki authored
Use order described as preferred in DTS Coding Style: 1. Sort bus nodes by unit address 2. Use alpha-numerical order for the rest Signed-off-by:
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Rafał Miłecki authored
Use order described as preferred in DTS Coding Style. Mostly just move "compatible", "reg" and "ranges" properties. In two nodes also move vendor-prefixed props down. Signed-off-by:
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Rafał Miłecki authored
Acelink EW-7886CAX is an MT7986A (AKA Filogic 830) based access point. It has 512 MiB of RAM, one 2.5 Gbps PoE (802.3at) Ethernet port and on-SoC Wi-Fi. Signed-off-by:
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Rafał Miłecki authored
Acelink EW-7886CAX is an MT7986A (AKA Filogic 830) based access point. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231207080512.3688-2-zajec5@gmail.comSigned-off-by:
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Rafał Miłecki authored
Acelink is a Taiwan company providing network products (routers, access points, switches, cameras and more). Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a device tree for the Radxa NIO 12L SBC, powered by the MediaTek MT8395 Genio 1200 SoC. This board features: * MT6359 + MT6360 PMICs at I2C-6 - Regulators, battery charger, TypeC Port Controller Interface - Audio through 3.5mm jack (2CH out, 1CH in) * Two MT6315 PMICs over SPMI - CPU-Big and GPU Core regulators * Network Connectivity - Realtek RTL8211FD MDIO PHY/Transceiver, 10/100/1000M Ethernet - MT7921E WiFi (PCIe1) / Bluetooth (USB 2.0) combo chip * Storage - On-board UFS storage - On-board eMMC on MMC0 controller - MicroSD card slot on MMC1 controller * Other connectivity - 1x USB Type-C Charging/Power only port - 1x USB 3.2 SuperSpeed Type-C OTG+DisplayPort mode - Muxed by ITE IT5205 Alternate Mode Passive MUX - 4x USB 3.0 Type-A ports on VL805 USB Hub (PCIe0) - 1x HDMI IN port - 1x HDMI OUT port - 1x MIPI DSI (Display) port - 2x MIPI CSI (Camera) ports * 40-pin Expansion Header - Two UART ports - I2C, SPI busses - I2S for external audio chips - ADC - GPIOs Link: https://lore.kernel.org/r/20240202114821.79227-3-angelogioacchino.delregno@collabora.comSigned-off-by: -
AngeloGioacchino Del Regno authored
Add a board compatible for the Radxa NIO 12L, based on the MediaTek MT8395 SoC. Acked-by:
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Yunfei Dong authored
Add mt8186 video decoder device nodes. Signed-off-by:
Yunfei Dong <yunfei.dong@mediatek.com> Signed-off-by:
Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by:
Hsin-Yi Wang <hsinyi@chromium.org> [eugen.hristev@collabora.com: minor cleanup] Signed-off-by:
Eugen Hristev <eugen.hristev@collabora.com> Link: https://lore.kernel.org/r/20231220133302.39411-1-eugen.hristev@collabora.comSigned-off-by:
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AngeloGioacchino Del Regno authored
The MT8195 SoC has four USB controllers: only one is a direct path to a XHCI controller, while the other three (0, 2 and 3) are behind the MTU3 DRD controller instead! Add the missing MTU3 nodes, default disabled, for controllers 0, 2 and 3 and move the related XHCI nodes to be children of their MTU3 DRD to correctly describe the SoC. In order to retain USB functionality on all of the MT8195 and MT8395 boards, also move the vusb33 supply and enable the relevant MTU3 nodes with special attention to the MT8195 Cherry Chromebook, where it was necessary to set the dr_mode of all MTU3 controllers to host to avoid interfering with the EC performing DRD on its own. Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20240115084336.938426-1-angelogioacchino.delregno@collabora.comSigned-off-by:
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Chen-Yu Tsai authored
Add entries for the MT8186 based Chromebooks, also collectively known as the Lenovo IdeaPad Slim 3 Chromebook (14M868). It is also based on the "Steelix" design. Being a laptop instead of a convertible device, there is no stylus, which is similar to Rusty. However Magneton does not have ports on the right side of the device. Three variants are listed separately. These use different touchscreen controllers, or lack a touchscreen altogether. Signed-off-by:
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Chen-Yu Tsai authored
MT8186 Rusty, otherwise known as the Lenovo 100e Chromebook Gen 4, is an MT8186 based laptop. It is based on the "Steelix" design. Being a laptop instead of a convertible device, there is no touchscreen or stylus. Signed-off-by:
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Chen-Yu Tsai authored
The MT8186 Steelix, also known as the Lenovo 300e Yoga Chromebook Gen 4, is a convertible device based on a common design of the same name. The device comes in different variants. Of them, whether a world facing camera is integrated is the only differentiating factor between the two device trees added. The different SKU IDs describe this alone. The other device difference is the trackpad component used. This is simply handled by having both possible components described in the device tree, and letting the implementation figure out which one is actually available. The system bootloader / firmware does not differentiate this in that they share the same SKU IDs. Signed-off-by:
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Chen-Yu Tsai authored
Tentacruel and Tentacool are MT8186 based Chromebooks based on the Krabby design. Tentacruel, also known as the ASUS Chromebook CM14 Flip CM1402F, is a convertible device with touchscreen and stylus. Tentacool, also known as the ASUS Chromebook CM14 CM1402C, is a laptop device. It does not have a touchscreen or stylus. The two devices both have two variants. The difference is a second source trackpad controller that shares the same address as the original, but is incompatible. The extra SKU IDs for the Tentacruel devices map to different sensor components attached to the Embedded Controller. These are not visible to the main processor. Signed-off-by:
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Chen-Yu Tsai authored
Add entries for the MT8186 based Chromebooks, also collectively known as the Lenovo IdeaPad Slim 3 Chromebook (14M868). It is also based on the "Steelix" design. Being a laptop instead of a convertible device, there is no touchscreen or stylus, which is similar to Rusty. However Magneton does not have ports on the right side of the device. Three variants are listed separately. These use different touchscreen controllers, or lack a touchscreen altogether. Signed-off-by:
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Chen-Yu Tsai authored
Add an entry for the MT8186 based Rusty Chromebook, also known as the Lenovo 100e Chromebook Gen 4. Signed-off-by:
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Chen-Yu Tsai authored
Add an entry for the MT8186 based Steelix Chromebook, also known as the Lenovo 300e Yoga Chromebook Gen 4. Signed-off-by:
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Chen-Yu Tsai authored
Add entries for MT8186 based Tentacruel / Tentacool Chromebooks. The two are based on the same board design: the former is a convertible device with a touchscreen, stylus, and some extra buttons; the latter is a clamshell device and lacks these additional features. The two devices both have two variants. The difference is a second source trackpad controller that shares the same address as the original, but is incompatible. The extra SKU IDs for the Tentacruel devices map to different sensor components attached to the Embedded Controller. These are not visible to the main processor. Signed-off-by:
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Chen-Yu Tsai authored
Some of the new MediaTek board entries were inserted in a chronological order, or just randomly. This makes it harder to search for an entry. Sort the entries by first grouping by SoC, then sorting by board compatible strings. Also add a comment at the top asking people to do the same. Signed-off-by:
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Allen-KH Cheng authored
Add JPEG encoder node. Signed-off-by:
Max Staudt <mstaudt@chromium.org> Tested-by:
Ricardo Ribalda <ribalda@chromium.org> [eugen.hristev@collabora.com: minor cleanup] Signed-off-by:
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Eugen Hristev authored
MT8186 has 4 iommus in the list, to cope with this situation, adjust the maxItems to 4 (instead of previous 2). Add also minItems as 2 to keep compatibility with current devices. Signed-off-by:
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Kyrie Wu authored
Add video encoder node. Signed-off-by:
Kyrie Wu <kyrie.wu@mediatek.com> Signed-off-by:
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Eugen Hristev authored
The larb clock is in fact a subsys clock, so it must be prefixed by 'subsys-' to be correctly identified in the driver. Fixes: d9e43c1e ("arm64: dts: mt8186: Add power domains controller") Signed-off-by:
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Eugen Hristev authored
Add compatible for the mt8186 encoder which currently works in the same way as mt8183. Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
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Eugen Hristev authored
Clock name should be `venc_sel` as per binding. Fix the warning message : arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dtb: vcodec@17020000: clock-names:0: 'venc_sel' was expected from schema $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml# Fixes: aa8f3711 ("arm64: dts: mt8192: Add H264 venc device node") Signed-off-by: -
Eugen Hristev authored
Looking at the binding it makes sense that the `-vp8` compatible has the `venc_lt_sel` while the other bindings have the `venc_sel` as name for the clock. This was also mentioned in the txt version of the binding before the conversion: ` clock-names: avc encoder must contain "venc_sel", vp8 encoder must contain "venc_lt_sel", decoder must contain "vcodecpll", "univpll_d2", ` So it is easier to check for compatible that includes vp8, since that's just one, to have the requirement for the clock name property as `venc_lt_sel`, rather than for all the others, some of which are missing, thus for them, the requirement is wrongly `venc_lt_sel`. Reordered the if/then/else to match `-vp8` and have all the rest of the compatibles using the other clock name (`venc_sel`). Signed-off-by:
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William-tw Lin authored
Add efuse nodes for socinfo retrieval for MT8173, MT8183, MT8186, MT8192 and MT8195. Signed-off-by:
William-tw Lin <william-tw.lin@mediatek.com> Reviewed-by:
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Mark Hasemeyer authored
The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by:
Mark Hasemeyer <markhas@chromium.org> Reviewed-by:
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Mark Hasemeyer authored
The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by:
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Mark Hasemeyer authored
The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by:
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Mark Hasemeyer authored
The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined. Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake. Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source. Signed-off-by:
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Rafał Miłecki authored
Add bindings of on-SoC clocks. Signed-off-by:
Daniel Golle <daniel@makrotopia.org> Link: https://lore.kernel.org/r/20240108085228.4727-4-zajec5@gmail.comSigned-off-by:
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Rafał Miłecki authored
MT7988A (AKA MediaTek Filogic 880) is a quad-core ARM Cortex-A73 platform designed for Wi-Fi 7 devices (there is no wireless on SoC though). The first public MT7988A device is Banana Pi BPI-R4. Many SoC parts remain to be added (they need their own bindings or depend on missing clocks). Those present block however are correct and having base .dtsi will help testing & working on missing stuff. Signed-off-by:
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Rafał Miłecki authored
MT7988A is another MediaTek's SoC with just 1 device available right now: Banana Pi BPI-R4. Signed-off-by:
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