- 10 Feb, 2023 3 commits
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Jianlong Huang authored
Add pinctrl driver for StarFive JH7110 SoC sys pinctrl controller. Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-4-hal.feng@starfivetech.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jianlong Huang authored
Add pinctrl bindings for StarFive JH7110 SoC aon pinctrl controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-3-hal.feng@starfivetech.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jianlong Huang authored
Add pinctrl bindings for StarFive JH7110 SoC sys pinctrl controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-2-hal.feng@starfivetech.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 08 Feb, 2023 1 commit
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Linus Walleij authored
Merge tag 'qcom-pinctrl-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel Qualcomm pinctrl Devicetree bindings changes for v6.3, part two Several minor cleanups and fixes on Qualcomm pin controller Devicetree bindings - add missing input-disable, correct GPIO pin name patterns in bindings, correct number of GPIOs in gpio-ranges property.
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- 07 Feb, 2023 4 commits
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Daniel Golle authored
Add pinctrl driver for the MediaTek MT7981 SoC, based on the driver which can also be found the SDK. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/ef5112946d16cacc67e65e439ba7b52a9950c1bb.1674693008.git.daniel@makrotopia.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Daniel Golle authored
Add bindings for the MT7981 pinctrl driver. As MT7981 has most features in common with MT7986 (but has a different layout in terms on pinctrl and clocks), the existing mediatek,mt7986-pinctrl.yaml was used as an example to create a similar document covering MT7981. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/3f0fd0becc338eef66caeb7244c3c432b8d1ef7a.1674693008.git.daniel@makrotopia.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Johan Jonker authored
Mark gpio sub nodes of pinctrl as deprecated. Gpio nodes are now placed in the root of the device tree. The relation to pinctrl is now described with the "gpio-ranges" property. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/137b56f0-8e86-f705-4ba7-d5dfe3c0b477@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Kathiravan T authored
The IPQ5332 SoC comes with a TLMM block, like all other Qualcomm platforms, so add a driver for it. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230206071217.29313-3-quic_kathirav@quicinc.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 06 Feb, 2023 5 commits
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Kathiravan T authored
Add device tree bindings for IPQ5332 TLMM block. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230206071217.29313-2-quic_kathirav@quicinc.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Krzysztof Kozlowski authored
Narrow the pattern of possible GPIO names for pin controllers: - SC7280 LPASS: GPIOs 0-14 - SM8250 LPASS: GPIOs 0-13 - SM8450 LPASS: GPIOs 0-22 - SC8280XP LPASS: GPIOs 0-18 Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230203164854.390080-1-krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20230203164854.390080-2-krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20230203164854.390080-3-krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20230203164854.390080-4-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Add druver for pin controller in Low Power Audio SubSystem (LPASS). The driver is similar to SM8450 LPASS pin controller, with differences in few pin groups (qua_mi2s -> i2s0). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230203174645.597053-2-krzysztof.kozlowski@linaro.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Krzysztof Kozlowski authored
Add bidings for pin controller in Low Power Audio SubSystem (LPASS). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230203174645.597053-1-krzysztof.kozlowski@linaro.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Claudiu Beznea authored
Use devm_kasprintf() instead of kasprintf() to avoid any potential leaks. At the moment drivers have no remove functionality thus there is no need for fixes tag. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230203132714.1931596-1-claudiu.beznea@microchip.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 03 Feb, 2023 8 commits
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Krzysztof Kozlowski authored
Correct the number of GPIOs in gpio-ranges to match reality. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230202104452.299048-8-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The MSM8994 TLMM pin controller has GPIOs 0-145, so narrow the pattern and reduce sizes of arrays with pins. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230202104452.299048-7-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The SDX55 TLMM pin controller has GPIOs 0-107, so narrow the pattern. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230202104452.299048-6-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The MSM8953 TLMM pin controller has GPIOs 0-141, so narrow the pattern. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20230202104452.299048-5-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The SM6375 TLMM pin controller has GPIOs 0-155, so narrow the pattern and gpio-ranges in the example. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230202104452.299048-4-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The MSM8909 TLMM pin controller has GPIOs 0-112, so narrow the pattern and gpio-ranges in the example. Fixes: c249ec7b ("dt-bindings: pinctrl: Add DT schema for qcom,msm8909-tlmm") Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230202104452.299048-3-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The MSM8226 TLMM pin controller has GPIOs 0-116, so correct the pattern to bring back missing 107-109. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20230202104452.299048-2-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The SM8350 HDK8350 board uses input-disable property, so allow it: sm8350-hdk.dtb: pinctrl@f100000: lt9611-state: 'oneOf' conditional failed, one must be fixed: ... 'input-disable' does not match any of the regexes: 'pinctrl-[0-9]+' Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230201154321.276419-3-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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- 01 Feb, 2023 2 commits
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Yadu MG authored
Add support for Lemans TLMM configuration and control via the pinctrl framework. Signed-off-by: Yadu MG <quic_ymg@quicinc.com> Signed-off-by: Prasad Sodagudi <quic_psodagud@quicinc.com> [Bartosz: made the driver ready for upstream] Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230201150011.200613-3-brgl@bgdev.plSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
Add DT bindings for the TLMM controller on sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230201150011.200613-2-brgl@bgdev.plSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 30 Jan, 2023 2 commits
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Linus Walleij authored
Merge tag 'intel-pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v6.3-1 * Add ~4kOhm bias support to Intel pin control drivers * Convert Intel pin control drivers to use INTEL_COMMUNITY_*() * Add struct pinfunction and use it in Intel pin control drivers * Make pin control documentation up to date * Miscellaneous cleanups The following is an automated git shortlog grouped by driver: pinctrl: - Proofreading and updating the documentation accordingly - Proofreading and updating the documentation (part 2) alderlake: - Replace ADL_COMMUNITY() by INTEL_COMMUNITY_GPPS() baytrail: - Convert to use new memeber in struct intel_function broxton: - Replace BXT_COMMUNITY() by INTEL_COMMUNITY_SIZE() cannonlake: - Replace CNL_COMMUNITY() by INTEL_COMMUNITY_GPPS() cedarfork: - Replace CDF_COMMUNITY() by INTEL_COMMUNITY_GPPS() cherryview: - Convert to use new memeber in struct intel_function denverton: - Replace DNV_COMMUNITY() by INTEL_COMMUNITY_GPPS() elkhartlake: - Replace EHL_COMMUNITY() by INTEL_COMMUNITY_GPPS() emmitsburg: - Replace EBG_COMMUNITY() by INTEL_COMMUNITY_GPPS() geminilake: - Replace GLK_COMMUNITY() by INTEL_COMMUNITY_SIZE() icelake: - Replace ICL_COMMUNITY() by INTEL_COMMUNITY_GPPS() intel: - Get rid of unused members in struct intel_function - Make use of struct pinfunction and PINCTRL_PINFUNCTION() - Define maximum pad number in the group - Use same order of bit fields for PADCFG2 - Add ~4k bias support - Add definitions to all possible biases - Deduplicate some code in intel_config_set_pull() - Add default case to intel_config_set_pull() - Convert to generic_handle_domain_irq() - Always use gpp_num_padown_regs in the main driver - Introduce INTEL_COMMUNITY_*() to unify community macros Introduce struct pinfunction and PINCTRL_PINFUNCTION() macro: - Introduce struct pinfunction and PINCTRL_PINFUNCTION() macro jasperlake: - Replace JSL_COMMUNITY() by INTEL_COMMUNITY_GPPS() lakefield: - Replace LKF_COMMUNITY() by INTEL_COMMUNITY_GPPS() lewisburg: - Replace LBG_COMMUNITY() by INTEL_COMMUNITY_SIZE() lynxpoint: - Convert to use new memeber in struct intel_function merrifield: - Convert to use new memeber in struct intel_function meteorlake: - Replace MTL_COMMUNITY() by INTEL_COMMUNITY_GPPS() moorefield: - Convert to use new memeber in struct intel_function sunrisepoint: - Replace SPT_COMMUNITY() by INTEL_COMMUNITY_*() tigerlake: - Replace TGL_COMMUNITY() by INTEL_COMMUNITY_GPPS()
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.3 - Add pin groups for Video-In channels 4 and 5 on R-Car H3 ES1.x, - Miscellaneous fixes and improvements.
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- 27 Jan, 2023 4 commits
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Linus Walleij authored
Merge tag 'qcom-pinctrl-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel Qualcomm pinctrl Devicetree bindings changes for v6.3 Set of cleanups and fixes for Qualcomm pin controller bindings, to match existing DTS and correct the schema.
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Rob Herring authored
AT91 pinctrl deferred probing support is broken if the GPIO devices haven't probed first and set gpio_banks to non-zero. The later condition that only some GPIO devices haven't probed can't actually happen as either all the GPIO devices have probed first or none of them have. Plus the pinctrl driver has already returned -EINVAL, so it's not on the deferred list to retry probing. Fix this by consolidating the checking that all GPIO devices are probed. Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com> # on sama5d3 xplained Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20180712192222.32481-1-robh@kernel.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Rob Herring authored
The child node name patterns in Mediatek pinctrl bindings don't match reality. I don't know where '-[0-9]+$' came from, but I don't see any nodes with a matching pattern. Also, patterns such as 'pins' or 'mux' are ambiguous because any prefix or suffix is allowed. If that's desired, it should be explicit. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230120020536.3229300-1-robh@kernel.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Tag the suspend/resume callbacks as __maybe_unused to silence complaints from the build robots. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 26 Jan, 2023 11 commits
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Geert Uytterhoeven authored
Add pins, groups, and functions for channels 4 and 5 of the Video Input Module (VIN) on the Renesas R-Car H3 ES1.x (R8A77950) SoC, based on the version for the R-Car H3 ES2.0+ (R8A77951) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/92c9b3b535d27ea7fcc0aa73d298783d710c214a.1673425207.git.geert+renesas@glider.be
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Lad Prabhakar authored
Add BUILD_BUG_ON() checks to avoid overflows for GPIO configs for each supported SoC. While at it, for readability set n_port_pins based on the GPIO pin configs and not on GPIO names for r9a07g044_data as done for r9a07g043_data. Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230102221815.273719-4-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Lad Prabhakar authored
On the RZ/G2UL SoC we have less number of pins compared to RZ/G2L and also the pin configs are completely different. This patch makes sure we use the appropriate pin configs for each SoC (which is passed as part of the OF data) while configuring the GPIO pin as interrupts instead of using rzg2l_gpio_configs[] for all the SoCs. Fixes: bfc69bdb ("pinctrl: renesas: rzg2l: Add RZ/G2UL support") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230102221815.273719-3-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Geert Uytterhoeven authored
The alignment of the second column in the definitions of the GPSR[678]_* macros does not match the alignment used in other definitions. Fix this to improve uniformity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/9424a0e7f6d66a94d333df9fdc5cdf3b7defb8f5.1669036423.git.geert+renesas@glider.be
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Bernhard Rosenkränzer authored
Add devicetree bindings for Mediatek MT8365 pinctrl driver. Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230125143503.1015424-5-bero@baylibre.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Guodong Liu authored
Coverity spotted that *buf is not initialized to zero in mtk_pctrl_dbg_show. Using uninitialized variable *buf as argument to %s when calling seq_printf. Fix this coverity by initializing *buf as zero. Fixes: 184d8e13 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Signed-off-by: Guodong Liu <Guodong.Liu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230118062036.26258-3-Guodong.Liu@mediatek.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Guodong Liu authored
Coverity spotted that pullen and pullup is not initialized to zero in mtk_pctrl_show_one_pin. The uninitialized variable pullen is used in assignment statement "rsel = pullen;" in mtk_pctrl_show_one_pin, and Uninitialized variable pullup is used when calling scnprintf. Fix this coverity by initializing pullen and pullup as zero. Fixes: 184d8e13 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Signed-off-by: Guodong Liu <Guodong.Liu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230118062036.26258-2-Guodong.Liu@mediatek.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
The device fwnode can be get via dev_fwnode() getter. Use it where it makes sense. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230113220703.45686-1-andriy.shevchenko@linux.intel.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
This reverts commit 3550bba2. No users for this one, revert it for good. The ->add_pin_ranges() can be used instead. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20230113215352.44272-5-andriy.shevchenko@linux.intel.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Yeah, while the ->add_pin_ranges() shouldn't be used by DT drivers, this one requires it to support quite old firmware descriptions that do not have gpio-ranges property. The change allows to clean up GPIO library from OF specifics. There is no functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20230113215352.44272-4-andriy.shevchenko@linux.intel.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Remove wrong of_node_put() in bcm2835_of_gpio_ranges_fallback(), there is no counterpart of_node_get() for it. Fixes: d2b67744 ("pinctrl: bcm2835: implement hook for missing gpio-ranges") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20230113215352.44272-3-andriy.shevchenko@linux.intel.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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