- 01 Jul, 2013 15 commits
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Florian Fainelli authored
Add support for the Netgear CVG834G and enable the two UARTs, Ethernet on the first MAC, PCI and the two leds. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5502/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
Some boards may need to reset their external PHY or switch they are attached to, add a hook for doing this along with providing custom linux/gpio.h flags for doing this. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5501/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
The BCM3368 SoC uses a NVRAM format which is not compatible with the one used by CFE, provide a default MAC address which is suitable for use and which is the default one also being used by the bootloader on these chips. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5498/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
Add the firmware header format which is used by Broadcom Cable Modem SoCs such as the BCM3368 SoC. We export the bcm_hcs firmware format structure because it is used by user-land tools to create firmware images for these SoCs and will later be used by a corresponding MTD parser. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5496/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
The Broadcom BCM3368 Cable Modem SoC is extremely similar to the existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort in the existing code base is required to get it supported. This patch adds support for the following on-chip peripherals: - two UARTS - GPIO - Ethernet - SPI - PCI - NOR Flash The most noticeable difference with 3368 is that it has its peripheral register at 0xfff8_0000 we check that separately in ioremap.h. Since 3368 is identical to 6358 for its clock and reset bits, we use them verbatim. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5499/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
Enabling BOOT_RAW is mandatory to get a binary image (objcopy from ELF to binary) to work. This does not affect the ELF kernels which are used by CFE on BCM63XX DSL platforms, but is going to be necessary to support BCM63XX on Cable Modem chips such as BCM3368. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5500/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Gortmaker authored
This board has been EOL for many years now; lets not burden people doing build coverage and other tree wide work with working on essentially dead files. [ralf@linux-mips.org: Also remove arch/mips/include/asm/mach-wrppmc/war.h.] Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Patchwork: http://patchwork.linux-mips.org/patch/5503/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jonas Gorski authored
Commit 610019ba ("[MIPS] Remove unused function alloc_pci_controller.") removed the function, but left the prototype in the header file. Remove it as well so people don't get tempted to use it and wonder why it doesn't work. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5473/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jonas Gorski authored
All BCM63XX SoCs starting with BCM6358 have a BMIPS4350 instead of a BMIPS3300, so select it unless support for any of the older SoCs is selected. All BMIPS4350 have only two CPUs, so select the appropriate default. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/5355/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Kevin Cernekee authored
MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI) on BMIPS SMP. Make the board support code aware of them. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> [jogo@openwrt.org: move sw irqs behind timer irq] Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5354/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Gregory Fong authored
For non-SMP, uses the new random canary value that is stored in the task struct whenever a new task is forked. Based on ARM version in df0698be and subject to the same limitations: the variable GCC expects, __stack_chk_guard, is global, so this will not work on SMP. Quoting Nicolas Pitre <nico@fluxnic.net>: "One way to overcome this GCC limitation would be to locate the __stack_chk_guard variable into a memory page of its own for each CPU, and then use TLB locking to have each CPU see its own page at the same virtual address for each of them." Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5488/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Gregory Fong authored
Implements basic stack protector support based on ARM version in c743f380 , with Kconfig option, constant canary value set at boot time, and script to check if compiler actually supports stack protector. Tested by creating a kernel module that writes past end of char[]. Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Cc: linux-mips@linux-mips.org Cc: Filippo Arcidiacono <filippo.arcidiacono@st.com> Cc: Carmelo Amoroso <carmelo.amoroso@st.com> Patchwork: https://patchwork.linux-mips.org/patch/5448/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Markos Chandras authored
When building with -fstack-protector, gcc emits the __stack_chk_guard and __stack_chk_fail symbols to check for stack stability. These symbols are defined in vmlinux but the generated vmlinux.bin that is used to create the compressed vmlinuz image has no symbol table so the linker can't find these symbols during the final linking phase. As a result of which, we need either to redefine these symbols just for the compressed image or drop the -fstack-protector option when building the compressed image. This patch implements the latter of two options. Fixes the following linking problem: dbg.c:(.text+0x7c): undefined reference to `__stack_chk_guard' dbg.c:(.text+0x80): undefined reference to `__stack_chk_guard' dbg.c:(.text+0xd4): undefined reference to `__stack_chk_guard' dbg.c:(.text+0xec): undefined reference to `__stack_chk_fail' [ralf@linux-mips.org: I'm applying this before the patch that actually adds stack protector support for MIPS. This means, it will not be possible to trigger above error message with any commit from the tree but rather they are what one would hit without this commit.] Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/5575/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- 17 Jun, 2013 4 commits
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Grant Likely authored
The MIPS interrupt controllers are all registering their own irq_domains now. Drop the MIPS specific code because it is no longer needed. Signed-off-by: Grant Likely <grant.likely@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5458/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Joe Perches authored
This typedef is unnecessary and should just be removed. Signed-off-by: Joe Perches <joe@perches.com> Cc: Jiri Kosina <trivial@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5460/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Bolle authored
The PMC MSP71XX gpio drivers were added in v2.6.28, see commit 9fa32c6b ("MIPS: PMC MSP71XX gpio drivers"). They are only built if CONFIG_HAVE_GPIO_LIB is set. But the Kconfig symbol HAVE_GPIO_LIB was already removed in v2.6.27, see commit 7444a72e ("gpiolib: allow user-selection"). So these drivers were never buildable. Perhaps no-one noticed because there are no in tree users of msp71xx_init_gpio() and msp71xx_init_gpio_extended(). Anyhow, these drivers can safely be removed. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5345/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Bolle authored
promcon.o is built if CONFIG_PROM_CONSOLE is set. But there's no Kconfig symbol PROM_CONSOLE, so promcon.c is unbuildable. Remove it. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5344/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- 13 Jun, 2013 21 commits
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Jayachandran C authored
The invalid value for scratch register is -1, so update the checks of the form (scratch_reg > 0) to be (scratch_reg >= 0). This will fix the case in Netlogic XLP where the scratch_reg can be 0. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5444/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
XLR/XLP COP0 scratch is register 22, sel 0-7. Add a function c0_kscratch() which returns the scratch register for the platform, and use the return value while generating TLB handlers. Setup kscratch_mask to 0xf for XLR/XLP since the config4 register does not exist. This allows the kernel to allocate scratch registers 0-3 if needed. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5445/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Fix an issue in plat_irq_dispatch due to which it can call do_IRQ with a PIC irq that is not mapped. When a per-cpu interrupt and a PIC interrupt are both active, the check 'eirr & PERCPU_IRQ_MASK' will be true, but the interrupt in 'i' will be the number of the PIC interrupt. In this case, we will call do_IRQ on the PIC interrupt without mapping it with nlm_irq_to_xirq(). Fix this by using __ffs64 instead of __ilog2_u64 and using the interrupt number instead of mask to identify per-cpu interrupts. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5432/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
The XLPs in production do not need these workarounds. Remove the code and the associated ifdef. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5430/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Fix a cache error found in stress test, caused by the prefetch instruction going beyond valid memory when acessing the last page of a region. Add the pref_backup logic similar to XLR in XLP too. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5431/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Earlier we just waited for the first thread of the CPU to come online before proceeding to wake up others. Update it to wait for all the CPUs in the core. This will be useful when the boot-up is slow, like while debugging or when running in a simulator. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5429/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
This does not cause a problem yet, but we do not want to write 1 to reserved bits. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5424/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Fix an issue in the reset code. Since this code is copied to the reset vector, using 'j' for looping is not correct. Use relative branch 'b'. Update the usage of 'j' in smpboot.S to be consistent although it is not a bug there. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5427/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Move the nlm_cpu_ready[] array used by the cpu wakeup code to the boot area, along with rest of the boot parameter code. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5425/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
This moves the calculation and casting needed to access the CPU initialization data to a function nlm_get_boot_data() Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5426/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
The core initialization and reset vector setup needs to be done even when booting uniprocessor. Move this code from smp.c to setup.c Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5428/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
The reset and core initialization code should be available for uniprocessor as well. This changes is just to take out the code into a different file, without any change to the logic. The change for uniprocessor initialization code is in a later patch. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5423/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Create new flle arch/mips/netlogic/xlp/dt.c and move the device tree related code there. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5422/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Add SYS_SUPPORTS_ZBOOT and SYS_SUPPORTS_ZBOOT_UART16550 config options for XLR and XLP. Update boot/compressed/uart-16550.c to add UART port for XLR and XLP. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5417/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Fix uart-16550.c for adding XLR/XLP support, changes are: * Make register read/write use volatile pointers * Support 32 bit IO read/write * Increase timeout in waiting for UART LSR Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5416/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Add COP2 register state structure and functions for Netlogic XLP. The RX and TX buffers and status registers are to be saved. Since the registers are 64-bit, do the implementation in inline assembly which works on both 32-bit and 64-bit kernels. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5413/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Rename macro nlm_cop2_enable() to nlm_cop2_enable_irqsave() and the macro nlm_cop2_restore to nlm_cop2_disable_irqrestore(). The new names will reflect the functionality better, and will make nlm_cop2_restore() available to be used later in COP2 save/restore patch. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5412/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
The sel argument os nlm_read_c2_status() was not used and the macro returned the sel 0 in all cases. Fix this by defining two macros: nlm_read_c2_status0() and nlm_read_c2_status1() to return the two status registers. Add functions to write to the status registers as well. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5414/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Kernel threads should be able to use COP2 if the platform needs it. Do not call die_if_kernel() for a coprocessor unusable exception if the exception due to COP2 usage. Instead, the default notifier for COP2 exceptions is updated to call die_if_kernel. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5415/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Jayachandran C authored
Move the common code for saving and restoring platform specific COP2 registers to switch_to(). This will make supporting new platforms (like Netlogic XLP) easier. The platform specific COP2 definitions are to be specified in asm/processor.h and in asm/cop2.h. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5411/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ganesan Ramalingam authored
Add SWIOTLB config option and related files to Netlogic platform. Some XLP SoC components like the SD/MMC interface cannot do DMA beyond 32-bit physical address. The SD/MMC driver can use memory outside this range for IO, to support this we have to add bounce buffers implemented by SWIOTLB. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: Ganesan Ramalingam <ganesanr@broadcom.com> Patchwork: https://patchwork.linux-mips.org/patch/5410/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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