- 23 Sep, 2016 4 commits
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Mika Westerberg authored
It turns out that for north and southwest communities, they can only generate GPIO interrupts for lower 8 interrupts (IntSel value). The upper part (8-15) can only generate GPEs (General Purpose Events). Now the reason why EC events such as pressing hotkeys does not work if we mask all the interrupts is that in order to generate either interrupts or GPEs the INTMASK register must have that particular interrupt unmasked. In case of GPEs the CPU does not trigger normal interrupt (and thus the GPIO driver does not see it) but instead it causes SCI (System Control Interrupt) to be triggered with the GPE in question set. To make this all work as expected we only add those GPIOs to the IRQ domain that can actually generate interrupts (IntSel value 0-7) and skip others. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Linux 4.8-rc6
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Linus Walleij authored
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Mika Westerberg authored
When using GPIO irqchip helpers to setup irqchip for a gpiolib based driver, it is not possible to select which GPIOs to add to the IRQ domain. Instead it just adds all GPIOs which is not always desired. For example there might be GPIOs that for some reason cannot generated normal interrupts at all. To support this we add a flag irq_need_valid_mask to struct gpio_chip. When this flag is set the core allocates irq_valid_mask that holds one bit for each GPIO the chip has. By default all bits are set but drivers can manipulate this using set_bit() and clear_bit() accordingly. Then when gpiochip_irqchip_add() is called, this mask is checked and all GPIOs with bit is set are added to the IRQ domain created for the GPIO chip. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 19 Sep, 2016 1 commit
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Linus Walleij authored
There is no point in adding any default trigger for these GPIO interrupts: the device tree should contain all trigger information and the platforms using the driver boots exclusively from device tree. Also the boot log is nagging me to fix this: [ 0.771057] ------------[ cut here ]------------ [ 0.775695] WARNING: CPU: 0 PID: 1 at ../drivers/gpio/gpiolib.c:1622 _gpiochip_irqchip_add+0x138/0x160 [ 0.785034] /soc/gpio@8012e000: Ignoring 2 default trigger (...) [ 0.942962] gpio 8012e000.gpio: at address e08f8000 (etc ad nauseam) Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 15 Sep, 2016 6 commits
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Peter Griffin authored
STiH415/6 SoC support is being removed from the kernel. This patch updates the ST pinctrl dt doc and removes references to these obsolete platforms. It also updates the dt example to the currently supported STiH407 platform. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Cc: <linus.walleij@linaro.org> Cc: <robh+dt@kernel.org> Cc: <linux-gpio@vger.kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Peter Griffin authored
STiH415/6 SoC support is being removed from the kernel. This patch updates the ST pinctrl driver and removes references to these obsolete platforms. As some structures referenced by STiH407 based configuration were shared with STiH416 we update these names to match the remaining supported platform. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Cc: <linus.walleij@linaro.org> Cc: <linux-gpio@vger.kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jerome Brunet authored
Add EE domains pins for the i2c devices A,B,C Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jerome Brunet authored
Add EE domains pins for the NAND flash controller. Even tough we have no driver for the NAND flash controller yet, we need to have these pins in pinctrl as the actual pin are shared with the spifc controller. The bootloader on the S905-P200 setup pinmux for the NAND controller so we need the kernel to properly deactivate this if necessary. Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Arnd Bergmann authored
The newly added irqchip support for the stm32 pinctrl driver uses hierarchical IRQ domains as provided by the NVIC primary irqchip. This works great for any configuration that may be relevant on stm32, but when doing compile-testing (randconfig), we can enable it without NVIC or any other primary irqchip that enables IRQ_DOMAIN_HIERARCHY: drivers/pinctrl/stm32/pinctrl-stm32.c:212:13: error: 'irq_chip_eoi_parent' undeclared here (not in a function) drivers/pinctrl/stm32/pinctrl-stm32.c:213:20: error: 'irq_chip_mask_parent' undeclared here (not in a function) drivers/pinctrl/stm32/pinctrl-stm32.c:214:20: error: 'irq_chip_unmask_parent' undeclared here (not in a function) drivers/pinctrl/stm32/pinctrl-stm32.c:215:20: error: 'irq_chip_set_type_parent' undeclared here (not in a function) This adds a Kconfig dependency to limit compile-testing to configurations that have IRQ_DOMAIN_HIERARCHY already enabled. It's not obvious whether we should use 'depends on' or 'select' here, I think either one works, with 'depends on' being more intuitive, while 'select' would be less likely to cause dependency loops. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 0eb9f683 ("pinctrl: Add IRQ support to STM32 gpios") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jerome Brunet authored
Add EE domains pins for the SPI flash controller Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 14 Sep, 2016 4 commits
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Linus Walleij authored
Merge tag 'sh-pfc-for-v4.9-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.9 (take three) - Return pinconf with arguments in packed format, - MSIOF and QSPI pin groups on R-Car V2H, - Voltage switching for SDHI on R-Car M2-W, E2, and M3-W.
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Simon Horman authored
All the SHDIs can operate with either 3.3V or 1.8V signals, depending on negotiation with the card. Based on work by Wolfram Sang for the r8a7790. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Simon Horman authored
All the SHDIs can operate with either 3.3V or 1.8V signals, depending on negotiation with the card. Based on work by Wolfram Sang for the r8a7790. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Simon Horman authored
This follows the style of existing PORT_GP_X macros and will be used by a follow-up patch for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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- 13 Sep, 2016 9 commits
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Alexandre TORGUE authored
"st,syscfg" entry was bad described. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Deepak authored
strict pin controller returns -EINVAL in case of pin request which is already claimed by somebody else. Following is the sequence of calling pin_request() from pinctrl_bind_pins():- pinctrl_bind_pins()->pinctrl_select_state()->pinmux_enable_setting()-> pin_request() But pinctrl_bind_pins() only returns -EPROBE_DEFER which makes device driver probe successful even if the pin request is rejected by the pin controller subsystem. This commit modifies pinctrl_bind_pins() to return error if the pin is rejected by pin control subsystem. Signed-off-by: Deepak Das <deepak_das@mentor.com> [Rewrote to be cleaner] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Martin Blumenstingl authored
This adds the SDIO interrupt pin which can be used by sd_emmc_a. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Suggested-by: Neil Armstrong <narmstrong@baylibre.com> Fixes: 29885a65 ("pinctrl: meson-gxbb: add the pins for the SDIO/sd_emmc_a controller") Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Arnd Bergmann authored
The newly added aspeed driver tries to check for a negative return value from a pinctrl function, but stores the intermediate value in a 'bool' variable, which cannot work: drivers/pinctrl/aspeed/pinctrl-aspeed.c: In function 'aspeed_sig_expr_set': drivers/pinctrl/aspeed/pinctrl-aspeed.c:192:11: error: comparison of constant '0' with boolean expression is always false [-Werror=bool-compare] This slightly reworks the logic to use an explicit comparison with zero before assigning to the temporary variable. Reported-by: Colin King <colin.king@canonical.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Julia Lawall authored
These structures are only used to copy into other structures, so declare them as const. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Julia Lawall authored
These structures are only used to copy into other structures, so declare them as const. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Agrawal, Nitesh-kumar authored
The earlier patch can be simplified by using a bool to indicate level trigger. Reviewed-by: Pankaj Sen <Pankaj.Sen@amd.com> Signed-off-by: Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com> [Fixup to earlier manually applied patch] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Alexandre TORGUE authored
This patch adds IRQ support to STM32 gpios. The EXTI controller has 16 lines dedicated to GPIOs. EXTI line n can be connected to only line n of one of the GPIO ports, for example EXTI0 can be connected to either PA0, or PB0, or PC0... This port selection is done by specifying the port number into System Config registers. Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Alexandre TORGUE authored
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 12 Sep, 2016 9 commits
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Vladimir Zapolskiy authored
If a GPIO controller description in board DTB contains information about mappings between GPIOs and pads under IOMUX control use it to request and free GPIOs with respect to pinctrl/pinmux subsystems. One of immediate positive functional changes is inability to request non-existing GPIOs, i.e. if there is no pad such. Also pinctrl/pinmux may now properly account pads occupied by requested GPIOs. The change has no effect, if "gpio-ranges" property is not found including the case if a board has no DTB firmware. Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Vladimir Zapolskiy authored
In general situation on-SoC GPIO controller drivers should be probed after pinctrl/pinmux controller driver, because on-SoC GPIOs utilize a pin/pad as a resource provided and controlled by pinctrl subsystem. This is stated in multiple places, e.g. from drivers/Makefile: GPIO must come after pinctrl as gpios may need to mux pins etc Looking at Freescale iMX SoC series specifics, imx*_pinctrl_init() functions are called at arch_initcall and postcore_initcall init levels, so the change of initcall level for gpio-mxc driver from postcore_initcall to subsys_initcall level is sufficient. Also note that the most of GPIO controller drivers settled at subsys_initcall level. If pinctrl subsystem manages pads with GPIO functions, the change is needed to avoid unwanted driver probe deferrals during kernel boot. Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Vladimir Zapolskiy authored
While only Freescale Vybrid SoC has settings of GPIO capabilities done by iomux controller, it is only a matter of GPIO controller driver implementation for the rest of Freescale/NXP SoCs from iMX series. As a practical example on GPIO request a pad function should be switched to GPIO, but because this requires updates to all particular iMX pinctrl drivers, for simplicity at the moment add only a proper connection between shared pinctrl-imx and pinctrl/pinmux core, namely .gpio_request_enable/.gpio_disable_free/.gpio_set_direction callbacks should return success to a caller. This change allows to progress by adding request/free callbacks into gpio-mxc.c driver. Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Marc Zyngier authored
at91 used to set a default trigger type for GPIO interrupts in order to cope with the old board files. These days are long gone, and it all gets probed through DT. Andras Szemzo reported that the Ethernet device on his board was bailing to be probed, due to a conflict in interrupt trigger. Surely enough, this is due to this default trigger still being present, and turning this into a IRQ_TYPE_NONE fixes the issue. Reported-by: Andras Szemzo <szemzo.andras@gmail.com> Tested-by: Andras Szemzo <szemzo.andras@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Simon Horman authored
This patch supports the {get,set}_io_voltage operations of SDHI. This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v voltage switch. Based on work by Takeshi Kihara and Wolfram Sang. Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Niklas Söderlund authored
The pinconf-generic code expects configurations with arguments to be returned in a packed format in order to be displayed properly by pinconf_generic_dump_one(). Reading /sys/kernel/debug/pinctrl/e6060000.pfc/pinconf-pins on r8a7795/salvator-x now shows: pin 101 (GP_3_5): output drive strength (9 mA), pin power source (3300 selector) Instead of: pin 101 (GP_3_5): output drive strength (0 mA), pin power source (0 selector) Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Sergei Shtylyov authored
Add MSIOF0/1 pin groups to the R8A7792 PFC driver. Based on the original (and large) patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Sergei Shtylyov authored
Add QSPI pin groups to the R8A7792 PFC driver. Based on the original (and large) patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Linus Torvalds authored
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- 11 Sep, 2016 3 commits
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Linus Torvalds authored
Commit aa719874 ("nvme: fabrics drivers don't need the nvme-pci driver") removed the dependency on BLK_DEV_NVME, but the cdoe does depend on the block layer (which used to be an implicit dependency through BLK_DEV_NVME). Otherwise you get various errors from the kbuild test robot random config testing when that happens to hit a configuration with BLOCK device support disabled. Cc: Christoph Hellwig <hch@lst.de> Cc: Jay Freyensee <james_p_freyensee@linux.intel.com> Cc: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/stagingLinus Torvalds authored
Pull IIO fixes from Greg KH: "Here are a few small IIO fixes for 4.8-rc6. Nothing major, full details are in the shortlog, all of these have been in linux-next with no reported issues" * tag 'staging-4.8-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: iio:core: fix IIO_VAL_FRACTIONAL sign handling iio: ensure ret is initialized to zero before entering do loop iio: accel: kxsd9: Fix scaling bug iio: accel: bmc150: reset chip at init time iio: fix pressure data output unit in hid-sensor-attributes tools:iio:iio_generic_buffer: fix trigger-less mode
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usbLinus Torvalds authored
Pull USB fixes from Greg KH: "Here are some small USB gadget, phy, and xhci fixes for 4.8-rc6. All of these resolve minor issues that have been reported, and all have been in linux-next with no reported issues" * tag 'usb-4.8-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: usb: chipidea: udc: fix NULL ptr dereference in isr_setup_status_phase xhci: fix null pointer dereference in stop command timeout function usb: dwc3: pci: fix build warning on !PM_SLEEP usb: gadget: prevent potenial null pointer dereference on skb->len usb: renesas_usbhs: fix clearing the {BRDY,BEMP}STS condition usb: phy: phy-generic: Check clk_prepare_enable() error usb: gadget: udc: renesas-usb3: clear VBOUT bit in DRD_CON Revert "usb: dwc3: gadget: always decrement by 1"
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- 10 Sep, 2016 4 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimmLinus Torvalds authored
Pull libnvdimm fixes from Dan Williams: "nvdimm fixes for v4.8, two of them are tagged for -stable: - Fix devm_memremap_pages() to use track_pfn_insert(). Otherwise, DAX pmd mappings end up with an uncached pgprot, and unusable performance for the device-dax interface. The device-dax interface appeared in 4.7 so this is tagged for -stable. - Fix a couple VM_BUG_ON() checks in the show_smaps() path to understand DAX pmd entries. This fix is tagged for -stable. - Fix a mis-merge of the nfit machine-check handler to flip the polarity of an if() to match the final version of the patch that Vishal sent for 4.8-rc1. Without this the nfit machine check handler never detects / inserts new 'badblocks' entries which applications use to identify lost portions of files. - For test purposes, fix the nvdimm_clear_poison() path to operate on legacy / simulated nvdimm memory ranges. Without this fix a test can set badblocks, but never clear them on these ranges. - Fix the range checking done by dax_dev_pmd_fault(). This is not tagged for -stable since this problem is mitigated by specifying aligned resources at device-dax setup time. These patches have appeared in a next release over the past week. The recent rebase you can see in the timestamps was to drop an invalid fix as identified by the updated device-dax unit tests [1]. The -mm touches have an ack from Andrew" [1]: "[ndctl PATCH 0/3] device-dax test for recent kernel bugs" https://lists.01.org/pipermail/linux-nvdimm/2016-September/006855.html * 'libnvdimm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm: libnvdimm: allow legacy (e820) pmem region to clear bad blocks nfit, mce: Fix SPA matching logic in MCE handler mm: fix cache mode of dax pmd mappings mm: fix show_smap() for zone_device-pmd ranges dax: fix mapping size check
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git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linuxLinus Torvalds authored
Pull i2c fixes from Wolfram Sang: "Mostly driver bugfixes, but also a few cleanups which are nice to have out of the way" * 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: rk3x: Restore clock settings at resume time i2c: Spelling s/acknowedge/acknowledge/ i2c: designware: save the preset value of DW_IC_SDA_HOLD Documentation: i2c: slave-interface: add note for driver development i2c: mux: demux-pinctrl: run properly with multiple instances i2c: bcm-kona: fix inconsistent indenting i2c: rcar: use proper device with dma_mapping_error i2c: sh_mobile: use proper device with dma_mapping_error i2c: mux: demux-pinctrl: invalidate properly when switching fails
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git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4Linus Torvalds authored
Pull fscrypto fixes fromTed Ts'o: "Fix some brown-paper-bag bugs for fscrypto, including one one which allows a malicious user to set an encryption policy on an empty directory which they do not own" * tag 'for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4: fscrypto: require write access to mount to set encryption policy fscrypto: only allow setting encryption policy on directories fscrypto: add authorization check for setting encryption policy
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Eric Biggers authored
Since setting an encryption policy requires writing metadata to the filesystem, it should be guarded by mnt_want_write/mnt_drop_write. Otherwise, a user could cause a write to a frozen or readonly filesystem. This was handled correctly by f2fs but not by ext4. Make fscrypt_process_policy() handle it rather than relying on the filesystem to get it right. Signed-off-by: Eric Biggers <ebiggers@google.com> Cc: stable@vger.kernel.org # 4.1+; check fs/{ext4,f2fs} Signed-off-by: Theodore Ts'o <tytso@mit.edu> Acked-by: Jaegeuk Kim <jaegeuk@kernel.org>
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