- 19 Jun, 2023 1 commit
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Dave Airlie authored
Merge tag 'drm-misc-next-fixes-2023-06-15' of git://anongit.freedesktop.org/drm/drm-misc into drm-next Short summary of fixes pull: * Fix fbdev initializer macros Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230615114009.GA27261@linux-uq9g
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- 15 Jun, 2023 5 commits
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Dave Airlie authored
Merge tag 'mediatek-drm-next-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next Mediatek DRM Next for Linux 6.5 1. Add display binding document for MT6795 Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
drm/i915 feature pull #2 for v6.5: Features and functionality: - Meteorlake PM demand (Vinod, Mika) - Switch to dedicated workqueues to stop using flush_scheduled_work() (Luca) Refactoring and cleanups: - Move display runtime init under display/ (Matt) - Async flip error message clarifications (Arun) Fixes: - Remove 10bit gamma on desktop gen3 parts, they don't support it (Ville) - Fix driver probe error handling if driver creation fails (Matt) - Fix all -Wunused-but-set-variable warnings, and enable it for i915 (Jani) - Stop using edid_blob_ptr (Jani) - Fix log level for "CDS interlane align done" (Khaled) - Fix an unnecessary include prefix (Matt) Merges: - Backmerge drm-next to sync with drm-intel-gt-next (Jani) Signed-off-by:
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Thomas Zimmermann authored
Use /* */ in initializer macro to avoid out-commenting the comma at the end of the line. Reported-by:
Christian König <ckoenig.leichtzumerken@gmail.com> Closes: https://lore.kernel.org/dri-devel/20230530150253.22758-1-tzimmermann@suse.de/T/#m356cda2679c17d7a01f30ce2b5282cd9046ea6d4 Fixes: f1061fa6 ("fbdev: Add initializer macros for struct fb_ops") Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Helge Deller <deller@gmx.de> Cc: linux-fbdev@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230614131253.10208-1-tzimmermann@suse.de
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Thomas Zimmermann authored
Backmerging to sync drm-misc-next-fixes with drm-misc-next. Signed-off-by: -
https://gitlab.freedesktop.org/agd5f/linuxDave Airlie authored
amd-drm-next-6.5-2023-06-02: amdgpu: - SR-IOV fixes - Warning fixes - Misc code cleanups and spelling fixes - DCN 3.2 updates - Improved DC FAMS support for better power management - Improved DC SubVP support for better power management - DCN 3.1.x fixes - Max IB size query - DC GPU reset fixes - RAS updates - DCN 3.0.x fixes - S/G display fixes - CP shadow buffer support - Implement connector force callback - Z8 power improvements - PSP 13.0.10 vbflash support - Mode2 reset fixes - Store MQDs in VRAM to improve queue switch latency - VCN 3.x fixes - JPEG 3.x fixes - Enable DC_FP on LoongArch - GFXOFF fixes - GC 9.4.3 partition support - SDMA 4.4.2 partition support - VCN/JPEG 4.0.3 partition support - VCN 4.0.3 updates - NBIO 7.9 updates - GC 9.4.3 updates - Take NUMA into account when allocating memory - Handle NUMA for partitions - SMU 13.0.6 updates - GC 9.4.3 RAS updates - Stop including unused swiotlb.h - SMU 13.0.7 fixes - Fix clock output ordering on some APUs - Clean up DC FPGA code - GFX9 preemption fixes - Misc irq fixes - S0ix fixes - Add new DRM_AMDGPU_WERROR config parameter to help with CI - PCIe fix for RDNA2 - kdoc fixes - Documentation updates amdkfd: - Query TTM mem limit rather than hardcoding it - GC 9.4.3 partition support - Handle NUMA for partitions radeon: - Fix possible double free - Stop including unused swiotlb.h - Fix possible division by zero ttm: - Add query for TTM mem limit - Add NUMA awareness to pools - Export ttm_pool_fini() UAPI: - Add new ctx query flag to better handle GPU resets Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22290 - Add new interface to query and set shadow buffer for RDNA3 Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21986 - Add new INFO query for max IB size Proposed userspace: https://gitlab.freedesktop.org/bnieuwenhuizen/mesa/-/commits/ib-rejection-v3 amd-drm-next-6.5-2023-06-09: amdgpu: - S0ix fixes - Initial SMU13 Overdrive support - kdoc fixes - Misc clode cleanups - Flexible array fixes - Display OTG fixes - SMU 13.0.6 updates - Revert some broken clock counter updates - Misc display fixes - GFX9 preemption fixes - Add support for newer EEPROM bad page table format - Add missing radeon secondary id - Add support for new colorspace KMS API - CSA fix - Stable pstate fixes for APUs - make vbl interface admin only - Handle PCI accelerator class amdkfd: - Add debugger support for gdb radeon: - Fix possible UAF drm: - Add Colorspace functionality UAPI: - Add debugger interface for enabling gdb Proposed userspace: https://github.com/ROCm-Developer-Tools/ROCdbgapi/tree/wip-dbgapi - Add KMS colorspace API Discussion: https://lists.freedesktop.org/archives/dri-devel/2023-June/408128.html From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230609174817.7764-1-alexander.deucher@amd.com
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- 12 Jun, 2023 12 commits
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's OverDrive (OD) block: this is the same as MT8173. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Matthias Brugger <matthias.bgg@gmail.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20230412112739.160376-15-angelogioacchino.delregno@collabora.com/Signed-off-by:
Chun-Kuang Hu <chunkuang.hu@kernel.org>
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's UFOE block: this is the same as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's SPLIT block: this is the same as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's MERGE block: this is the same as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's GAMMA block: this is the same as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's COLOR block: this is the same as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's WDMA block: this is the same as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's RDMA block: this is the same as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795's OVL block: this is the same as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795, using the same DSI block as MT8173. Signed-off-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for MediaTek Helio X10 MT6795: similarly to MT8173, this SoC has the gamma LUT registers in DISP_AAL. Signed-off-by:
Alexandre Mergnat <amergnat@baylibre.com> Acked-by:
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AngeloGioacchino Del Regno authored
Add a compatible string for the MediaTek Helio X10 MT6795 SoC, using the same parameters as MT8183. Signed-off-by:
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- 10 Jun, 2023 4 commits
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Jani Nikula authored
Sync up with changes from drm-intel-gt-next. Signed-off-by:Jani Nikula <jani.nikula@intel.com>
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Luca Coelho authored
Instead of using a global workqueue for the SW fence selftest, allocate a separate one temporarily only while running the test. Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by:
Luca Coelho <luciano.coelho@intel.com> Signed-off-by:
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Luca Coelho authored
In order to avoid flush_scheduled_work() usage, add a dedicated workqueue in the drm_i915_private structure. In this way, we don't need to use the system queue anymore. This change is mostly mechanical and based on Tetsuo's original patch[1]. v6 by Jani: - Also create unordered_wq for mock device Link: https://patchwork.freedesktop.org/series/114608/ [1] Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Luca Coelho authored
Currently a pointer to an intel_runtime_pm structure is stored in the wake reference structures so the runtime data can be accessed. We can save the entire device information (drm_i915_private) instead, since we'll need to reference the new workqueue we'll add in subsequent patches. Reviewed-by:
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- 09 Jun, 2023 18 commits
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Austin Zheng authored
Why: Limit maximum clock speeds to DC mode limits for DC mode systems How: Store DC mode limits when individual clocks are initialized and cap the values when building the clock table Acked-by:
Stylon Wang <stylon.wang@amd.com> Signed-off-by:
Austin Zheng <austin.zheng@amd.com> Reviewed-by:
Alvin Lee <Alvin.Lee2@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Sridevi authored
[Why] Programming register delta for DSC sub-block [How] Change DSC, resource files for programming register delta. Acked-by:
Sridevi <sarvinde@amd.com> Reviewed-by:
Chris Park <Chris.Park@amd.com> Tested-by:
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Leo Ma authored
Revert commit 257e9891 ("drm/amd/display: cache trace buffer size") to fix regression found in tests. Acked-by:
Leo Ma <hanghong.ma@amd.com> Reviewed-by:
Josip Pavic <Josip.Pavic@amd.com> Tested-by:
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Kenneth Feng authored
On smu 13.0.0, the compute workload type cannot be set on all the skus due to some other problems. This workaround is to make sure compute workload type can also run on some specific skus. v2: keep the variable consistent Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Acked-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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Charlene Liu authored
[why] check dmub_Srv exist or not before accessing dmub. Acked-by:
Charlene Liu <charlene.liu@amd.com> Reviewed-by:
Zhan Liu <Zhan.Liu@amd.com> Tested-by:
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shikaguo authored
This patch enables following UMD stable Pstates profile levels for power_dpm_force_performance_level interface. - profile_peak - profile_min_mclk - profile_min_sclk - profile_standard Signed-off-by:
shikaguo <shikai.guo@amd.com> Reviewed-by:
Tim Huang <Tim.Huang@amd.com> Signed-off-by:
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Chong Li authored
enforce process isolation between graphics and compute via using the same reserved vmid. v2: remove params "struct amdgpu_vm *vm" from amdgpu_vmid_alloc_reserved and amdgpu_vmid_free_reserved. Signed-off-by:Chong Li <chongli2@amd.com> Reviewed-by:
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Nathan Chancellor authored
-Wunused-but-set-variable was only supported in clang starting with 13.0.0, so earlier versions will emit a warning, which is turned into a hard error for the kernel to mirror GCC: error: unknown warning option '-Wunused-but-set-variable'; did you mean '-Wunused-const-variable'? [-Werror,-Wunknown-warning-option] The minimum supported version of clang for building the kernel is 11.0.0, so match the rest of the kernel and wrap -Wunused-but-set-variable in a cc-option call, so that it is only used when supported by the compiler. Closes: https://github.com/ClangBuiltLinux/linux/issues/1869 Fixes: 1b320ad3 ("drm/amd/amdgpu: introduce DRM_AMDGPU_WERROR") Signed-off-by:
Nathan Chancellor <nathan@kernel.org> Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
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Shiwu Zhang authored
Add the accelerator PCIe class and match the class in amdgpu for 0x1002 devices of that class. From PCI spec: "PCI Code and ID Assignment, r1.9, sec 1, 1.19" Signed-off-by:
Shiwu Zhang <shiwu.zhang@amd.com> Acked-by:
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Aurabindo Pillai authored
This reverts commit 4243c84a. Enables freesync video by default, since the hang and corruption issue on eDP panels are now fixed. Acked-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by:
Rodrigo Siqueira <rjordrigo@amd.com> Tested-by:
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Jonathan Kim authored
There are a couple of fixes required to enable gfx11 debugging. First, ADD_QUEUE.trap_en is an inappropriate place to toggle a per-process register so move it to SET_SHADER_DEBUGGER.trap_en. When ADD_QUEUE.skip_process_ctx_clear is set, MES will prioritize the SET_SHADER_DEBUGGER.trap_en setting. Second, to preserve correct save/restore priviledged wave states in coordination with the trap enablement setting, resume suspended waves early in the disable call. Signed-off-by:
Jonathan Kim <jonathan.kim@amd.com> Reviewed-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
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Mario Limonciello authored
Non-root users shouldn't be able to try to trigger a VBIOS flash or query the flashing status. This should be reserved for users with the appropriate permissions. Cc: stable@vger.kernel.org Fixes: 8424f2cc ("drm/amdgpu/psp: Add vbflash sysfs interface support") Reviewed-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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Mario Limonciello authored
The VBIOS image update flow requires userspace to: 1) Write the image to `psp_vbflash` 2) Read `psp_vbflash` 3) Poll `psp_vbflash_status` to check for completion If userspace reads `psp_vbflash` before writing an image, it's possible that it causes problems that can put the dGPU into an invalid state. Explicitly check that an image has been written before letting a read succeed. Cc: stable@vger.kernel.org Fixes: 8424f2cc ("drm/amdgpu/psp: Add vbflash sysfs interface support") Reviewed-by:
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Tim Huang authored
This patch enables following UMD stable Pstates profile levels for power_dpm_force_performance_level interface. - profile_peak - profile_min_mclk - profile_min_sclk - profile_standard Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
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Tim Huang authored
Add the ability to control the vclk and dclk frequency by power_dpm_force_performance_level interface. Signed-off-by:
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Tim Huang authored
PMFW use the left-shifted 16 bits argument to set the VCLK DPM frequency for SMU v13.0.4. Signed-off-by:
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Yang Wang authored
skip to resume rlcg, because rlcg is already enabled in pf side. Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
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Yang Wang authored
virtual display is not support on APP device. Signed-off-by:
Gavin Wan <gavin.wan@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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