- 27 May, 2016 1 commit
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Baruch Siach authored
Commit 32698aaf (Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value, 2016-04-22) deprecated "soft_bch". Update the example to match. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 26 May, 2016 1 commit
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Wenyou Yang authored
This reverts commit 5ddc7bd4 ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy line edge status bit. It is a datasheet bug. Cc: <stable@vger.kernel.org> Fixes: commit 5ddc7bd4 ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 10 May, 2016 1 commit
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Brian Norris authored
Also note the GigaDevice JEDEC ID. No write-protect support yet, since this flash uses a different status register layout. Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
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- 06 May, 2016 2 commits
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Brian Norris authored
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Brian Norris authored
Updates from Boris Brezillon: This pull request contains the following infrastructure changes: * introduction of the ECC algo concept to extend the ECC mode one * replacement of the nand_ecclayout infrastructure by something more future-proof. * addition of an mtd-activity led trigger to replace the nand-activity one And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: * rework of the OMAP GPMC and NAND drivers * prepare the sunxi NAND driver to receive DMA support * handle bitflips in erased pages on GPMI revisions that do not support this in hardware. * tag 'nand/for-4.7' of github.com:linux-nand/linux: (152 commits) mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c mtd: nand: sh_flctl: rely on generic DT parsing done in nand_scan_ident() mtd: nand: mxc: rely on generic DT parsing done in nand_scan_ident() ...
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- 05 May, 2016 35 commits
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Brian Norris authored
This is more obvious than guessing based on ECC strength. It allows using NAND on devices with BCH-1 (e.g. D-Link DIR-885L). This maintains DT backward compatibility by defaulting to Hamming if a 1-bit ECC algorithm is specified without a corresponding algorithm selection. i.e., to use BCH-1, you must specify: nand-ecc-strength = <1>; nand-ecc-step-size = <512>; nand-ecc-algo = "bch"; Also adds a check to ensure we haven't allowed someone to get by with SW ECC. If we want to support SW ECC, we need to refactor some other pieces of this driver. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Markus Pargmann authored
ECC is only calculated for written pages. As erased pages are not actively written the ECC is always invalid. For this purpose the Hardware BCH unit is able to check for erased pages and does not raise an ECC error in this case. This behaviour can be influenced using the BCH_MODE register which sets the number of allowed bitflips in an erased page. Unfortunately the unit is not capable of fixing the bitflips in memory. To avoid complete software checks for erased pages, we can simply check buffers with uncorrectable ECC errors because we know that any erased page with errors is uncorrectable by the BCH unit. This patch adds the generic nand_check_erased_ecc_chunk() to gpmi-nand to correct erased pages. To have the valid data in the buffer before using them, this patch moves the read_page_swap_end() call before the ECC status checking for-loop. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> [Squashed patches by Stefan and Boris to check ECC area] Tested-by: Stefan Christ <s.christ@phytec.de> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
Now that we support nand-ecc-algo property it should be used together with "soft" to specify software BCH ECC. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This value should not be part of nand_ecc_modes_t as it specifies algorithm not a mode. We successfully managed to introduce new "algo" field which is respected now. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
There isn't any difference between handling NAND_ECC_SOFT and NAND_ECC_SOFT_BCH now. What matters is the new field called "algo". Please note we're keeping backward DT compatibility. We are still treating "soft_bch" value as the one setting Hamming algorithm, it's just handled in of_get_nand_ecc_algo now. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
Now we have all drivers properly setting this new field we can start using it. For a very short period of time we should support both values: NAND_ECC_SOFT and NAND_ECC_SOFT_BCH treating them the same. It's because of_get_nand_ecc_mode may still be setting NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
NAND core sets ECC algorithm in algo field now and it should be preferred over the mode field. This also prepares driver for dropping NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Mikael Starvik <starvik@axis.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Cooper Jr., Franklin authored
Based on DMA documentation and testing using high memory buffer when doing dma transfers can lead to various issues including kernel panics. To workaround this simply use cpu copy. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Cooper Jr., Franklin authored
The prefetch engine sends a dma request once a FIFO threshold has been met. No other requests are received until the previous request is handled. Starting a dma transfer (dma_async_issue_pending) results in any previous event for the dma channel to be cleared. Therefore, starting the prefetch engine before initiating the dma transfer may result in the prefetch triggering a dma request but instead of it being handled it can end up being cleared. This will result in a hang since the code will continue to wait for the dma request to complete. By initiating the dma request before enabling the prefetch engine this race condition is avoided and no dma request are missed/cleared. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Julia Lawall authored
Add __init attribute on functions that are only called from other __init functions and that are not inlined, at least with gcc version 4.8.4 on an x86 machine with allyesconfig. Currently, the functions are put in the .text.unlikely segment. Declaring them as __init will cause them to be put in the .init.text and to disappear after initialization. The result of objdump -x on the functions before the change is as follows: 000000000000059a l F .text.unlikely 0000000000000239 alloc_device 000000000000034e l F .text.unlikely 000000000000002e get_partition_name 00000000000007d3 l F .text.unlikely 00000000000005da init_nandsim And after the change it is as follows: 0000000000000029 l F .init.text 0000000000000234 alloc_device 0000000000000000 l F .init.text 0000000000000029 get_partition_name 000000000000025d l F .init.text 00000000000005d5 init_nandsim Done with the help of Coccinelle. The semantic patch checks for local static non-init functions that are called from an __init function and are not called from any other function. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
Now that all drivers go through nand_set_flash_node() to parse the generic NAND properties, we can move all of_get_nand_xxx() helpers in to nand_base.c, make them static and remove of_mtd.c and of_mtd.h. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Boris Brezillon authored
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Han xu <han.xu@nxp.com>
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Julia Lawall authored
Move constants to the right of binary operators. Generated by: scripts/coccinelle/misc/compare_const_fl.cocci CC: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Maarten ter Huurne authored
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Acked-by: Harvey Hunt <harvey.hunt@imgtec.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Rafał Miłecki authored
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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