1. 21 Aug, 2014 1 commit
  2. 17 Aug, 2014 4 commits
    • Julia Lawall's avatar
      gpio: delete unneeded test before of_node_put · 8a691550
      Julia Lawall authored
      Of_node_put supports NULL as its argument, so the initial test is not
      necessary.
      
      Suggested by Uwe Kleine-König.
      
      The semantic patch that fixes this problem is as follows:
      (http://coccinelle.lip6.fr/)
      
      // <smpl>
      @@
      expression e;
      @@
      
      -if (e)
         of_node_put(e);
      // </smpl>
      Signed-off-by: default avatarJulia Lawall <Julia.Lawall@lip6.fr>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      8a691550
    • Lars-Peter Clausen's avatar
      gpio: zynq: Fix IRQ handlers · 6dd85950
      Lars-Peter Clausen authored
      The Zynq GPIO interrupt handling code as two main issues:
      1) It does not support IRQF_ONESHOT interrupt since it uses handle_simple_irq()
      for the interrupt handler. handle_simple_irq() does not do masking and unmasking
      of the IRQ that is required for this chip to be able to support IRQF_ONESHOT
      IRQs, causing the CPU to lock up in a interrupt storm if such a interrupt is
      requested.
      2) Interrupts are acked after the primary interrupt handlers for all asserted
      interrupts in a bank have been called. For edge triggered interrupt this is to
      late and may cause a interrupt to be missed. For level triggered oneshot
      interrupts this is to early and causes the interrupt handler to run twice per
      interrupt.
      
      This patch addresses the issue by updating the driver to use the correct IRQ
      chip handler functions that are appropriate for this kind of IRQ controller.
      
      The following diagram gives an overview of how the interrupt detection circuit
      works, it is not necessarily a accurate depiction of the real hardware though.
      
           INT_POL/INT_ON_ANY
                 |
                 | +---+                       INT_STATUS
                 `-|   |                            |
                   | E |-.                          |
               ,---|   |  \     |\          +----+  |  +---+
               |   +---+   `----| | ,-------|S   | ,*--|   |
      GPIO_IN -*                | |-        |   Q|-    | & |-- IRQ_OUT
               |   +---+  ,-----| |       ,-|R   |   ,o|   |
               `---|   | /      |/       |  +----+  |  +---+
                   | = |-        |       |          |
                 ,-|   |    INT_TYPE    ACK     INT_MASK
                 | +---+
                 |
              INT_POL
      
      GPIO_IN is the raw signal level connected to the hardware pin. This signal is
      routed to a edge detector and to a level detector. The edge detector can be
      configured to either detect a rising or falling edge or both edges. The level
      detector can detect either a level high or level low event. Depending on the
      setting of the INT_TYPE register either the edge or level event will be
      propagated to the INT_STATUS register. As long as a interrupt condition is
      detected the INT_STATUS register will be set to 1. It can be cleared to 0 if
      (and only if) the interrupt condition is no longer detected and software
      acknowledges the interrupt by writing a 1 to the address of the INT_STATUS
      register. There is also the INT_MASK register which can be used to disable the
      propagation of the INT_STATUS signal to the upstream IRQ controller. What is
      important to note is that the interrupt detection logic itself can not be
      disabled, only the propagation of the INT_STATUS register can be delayed. This
      means that for level type interrupts the interrupt must only be acknowledged
      after the interrupt source has been cleared otherwise it will stay asserted and
      the interrupt handler will be run a second time. For IRQF_ONESHOT interrupts
      this means that the IRQ must only be acknowledged after the threaded interrupt
      has finished running. If a second interrupt comes in between handling the first
      interrupt and acknowledging it the external interrupt will be asserted, which
      means trying to acknowledge the first interrupt will not clear the INT_STATUS
      register and the interrupt handler will be run a second time when the IRQ is
      unmasked, so no interrupts will be lost. The handle_fasteoi_irq() handler in
      combination with the IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED flags will
      have the desired behavior. For edge triggered interrupts a slightly different
      strategy is necessary. For edge triggered interrupts the interrupt condition is
      only true when the edge itself is detected, this means this is the only time the
      INT_STATUS register is set, acknowledging the interrupt any time after that will
      clear the INT_STATUS register until the next interrupt happens. This means in
      order to not loose any interrupts the interrupt needs to be acknowledged before
      running the interrupt handler. If a second interrupt occurs after the first
      interrupt handler has finished but before the interrupt is unmasked the
      INT_STATUS register will be re-asserted and the interrupt handler runs a second
      time once the interrupt is unmasked. This means with this flow handling strategy
      no interrupts are lost for edge triggered interrupts. The handle_level_irq()
      handler will have the desired behavior. (Note: The handle_edge_irq() only needs
      to be used for edge triggered interrupts where the controller stops detecting
      the interrupt event when the interrupt is masked, for this controller the
      detection logic still works, while only the propagation is delayed when the
      interrupt is masked.)
      Signed-off-by: default avatarLars-Peter Clausen <lars@metafoo.de>
      Acked-by: default avatarSoren Brinkmann <soren.brinkmann@xilinx.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      6dd85950
    • Julia Lawall's avatar
      gpiolib: devres: use correct structure type name in sizeof · 0f05a3ae
      Julia Lawall authored
      Correct typo in the name of the type given to sizeof.  Because it is the
      size of a pointer that is wanted, the typo has no impact on compilation or
      execution.
      
      This problem was found using Coccinelle (http://coccinelle.lip6.fr/).  The
      semantic patch used can be found in message 0 of this patch series.
      Signed-off-by: default avatarJulia Lawall <Julia.Lawall@lip6.fr>
      Acked-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      0f05a3ae
    • Markus Mayer's avatar
      MAINTAINERS: Change maintainer for gpio-bcm-kona.c · 5e163903
      Markus Mayer authored
      Since I no longer have access to the hardware, Ray Jui will take over
      maintaining the Kona GPIO driver.
      
      In addition, my former e-mail addresses mmayer@broadcom.com and
      markus.mayer@linaro.org will cease to function shortly. So, I used an
      address I can still be reached at as the "author" addess here.
      Signed-off-by: default avatarMarkus Mayer <code@mmayer.net>
      Signed-off-by: default avatarMarkus Mayer <markus.mayer@linaro.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      5e163903
  3. 16 Aug, 2014 35 commits