- 11 Jun, 2024 8 commits
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Mitul Golani authored
Compute vrr vsync params in case of FAVT as well instead of only to AVT mode of operation. --v2: - Remove redundant computation for vrr_vsync_start and vrr_vsync_end(Ankit). --v3: - vrr.enable and cmrr.enable check together is not required as both will be true at the same point in time. (Ankit) - Replace vrr.enable flag to cmrr.enable, mistakenly added. (Ankit) Signed-off-by:
Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by:
Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by:
Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240610072203.24956-9-mitulkumar.ajitkumar.golani@intel.com
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Mitul Golani authored
Compute params for Adaptive Sync SDP when Fixed Average Vtotal mode is enabled. --v2: Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit). --v3: - Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit). - check cmrr.enable when CMRR flags are set during intel_dp_compute_as_sdp. --v4: - Use drm_mode_vrefresh instead of manual calculation (Ankit). Signed-off-by:
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Mitul Golani authored
Add support of pack and unpack for target_rr_divider. --v2: - Set Target Refresh Rate Divider bit when related AS SDP bit is set (Ankit). --v3: - target_rr_divider is bools so set accordingly (Ankit). Signed-off-by:
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Mitul Golani authored
Add target_rr_divider to structure representing AS SDP. It is valid only in FAVT mode, sink device ignores the bit in AVT mode. --v2: - Update commit header and send patch to dri-devel. Signed-off-by:
Arun R Murthy <arun.r.murthy@intel.com> Acked-by:
Maxime Ripard <mripard@kernel.org> Signed-off-by:
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Mitul Golani authored
Add/update trans_vrr_ctl flag when crtc_state->cmrr.enable is set, With this commit setting the stage for subsequent CMRR enablement. --v2: - Check pipe active state in cmrr enabling. [Jani] - Remove usage of bitwise OR on booleans. [Jani] - Revert unrelated changes. [Jani] - Update intel_vrr_enable, vrr and cmrr enable conditions. [Jani] - Simplify whole if-ladder in intel_vrr_enable. [Jani] - Revert patch restructuring mistakes in intel_vrr_get_config. [Jani] --v3: - Check pipe active state in cmrr disabling.[Jani] - Correct messed up condition in intel_vrr_enable. [Jani] --v4: - Removing RFC tag. --v5: - CMRR handling in co-existatnce of LRR and DRRS. --v7: - Rebase on top of AS SDP merge. --v8: - Remove cmrr_enabling/disabling and update commit message. (Ankit) --v9: - Revert removed line(Ankit). Signed-off-by:
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Mitul Golani authored
Add register definitions for Transcoder Fixed Average Vtotal mode/CMRR function, with the necessary bitfields. Compute these registers when CMRR is enabled, extending Adaptive refresh rate capabilities. --v2: - Use intel_de_read64_2x32 in intel_vrr_get_config. [Jani] - Fix indent and order based on register offset. [Jani] --v3: - Removing RFC tag. --v4: - Update place holder for CMRR register definition. (Jani) --v5: - Add CMRR register definitions to a separate file intel_vrr_reg.h. --v6: - Fixed indentation. (Jani) - Add dependency header intel_display_reg_defs.h. (Jani) - Rename file name to intel_vrr_regs.h instead of reg.h (Jani) --v7: - Remove adding CMRR flag to vrr_ctl register during set_transcoder_timing, as it is already being done during intel_vrr_enable. (Ankit) Signed-off-by:
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Mitul Golani authored
Move VRR related register definitions to a separate file called intel_vrr_regs.h. Signed-off-by:
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Mitul Golani authored
Update the indentation for the VRR register definition and its bits, and fix checkpatch issues to ensure smooth movement of registers and bits. --v2: - Keep XELPD_VRR_CTL_VRR_GUARDBAND(x) to avoid readability (Ankit). - Fix all indentation related VRR registers and bits instead of checkpatch one. Signed-off-by:
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- 07 Jun, 2024 32 commits
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Balasubramani Vivekanandan authored
Platform descriptor defined and PCI IDs added for Battlemage. Signed-off-by:
Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Reviewed-by:
Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the HSW_STEREO_3D_CTL register macro. Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/76f980f5ed3638746c6b58dec7d0bd8c43a37987.1717514638.git.jani.nikula@intel.com
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Ville Syrjälä authored
Since BDB version 211 block 46 has included more luminance and gamma related information. Define it fully. The data is semi-based on DisplayID v2.0 apparently. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240605134756.17099-2-ville.syrjala@linux.intel.comReviewed-by:
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Ville Syrjälä authored
The VBT spec does a very poor job of defining how the chromaticity coordinates in block 46 are laid out. After double checking the Windows implementation it turns out these more or less match the EDID definition, where the 10bit values are split into 2bit + 8bit chunks. Adjust our struct definition to reflect that. Signed-off-by:
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Jani Nikula authored
We stopped using ACPI button in commit 05c72e77 ("drm/i915: Nuke the LVDS lid notifier"). Also stop force enabling the ACPI_BUTTON config. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Closes: https://lore.kernel.org/r/ZmGsJsXhHcPV48XJ@intel.comReviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the MTL_CLKGATE_DIS_TRANS register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_SET_CONTEXT_LATENCY register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_MSA_MISC register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TGL_DP_TP_STATUS register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TGL_DP_TP_CTL register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_DDI_FUNC_CTL2 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_DDI_FUNC_CTL register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_LINK_N2 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_LINK_M2 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_LINK_N1 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_LINK_M1 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_DATA_N2 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_DATA_M2 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_DATA_N1 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_DATA_M1 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the SWF3 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the SWF1 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the SWF0 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CHV_CANVAS register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CHV_BLEND register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_FLIPCOUNT_G4X register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_FRMCOUNT_G4X register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the DSPFW3 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the DSPFW2 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the DSPFW1 register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the DSPARB register macro. Reviewed-by:
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Jani Nikula authored
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the ICL_PIPESTATUS register macro. Reviewed-by:
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