- 23 Dec, 2021 2 commits
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https://gitlab.freedesktop.org/drm/tegraDave Airlie authored
drm/tegra: Changes for v5.17-rc1 This contains a fairly large rework that makes the buffer objects behave more according to what the DMA-BUF infrastructure expects. A buffer object cache is implemented on top of that to make certain operations such as page-flipping more efficient by avoiding needless map/unmap operations. This in turn is useful to implement asynchronous commits to support legacy cursor updates. Another fairly big addition is the NVDEC driver. This uses the updated UABI introduced in v5.15-rc1 to provide access to the video decode engines found on Tegra210 and later. This also includes some power management improvements that are useful on older devices in particular because they, together with a bunch of other changes across the kernel, allow the system to scale down frequency and voltages when mostly idle and prevent these devices from becoming excessively hot. The remainder of these changes is an assortment of cleanups and minor fixes. Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211217142912.558095-1-thierry.reding@gmail.com
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Dave Airlie authored
Merge tag 'amd-drm-next-5.17-2021-12-16' of https://gitlab.freedesktop.org/agd5f/linux into drm-next amdgpu: - Add some display debugfs entries - RAS fixes - SR-IOV fixes - W=1 fixes - Documentation fixes - IH timestamp fix - Misc power fixes - IP discovery fixes - Large driver documentation updates - Multi-GPU memory use reductions - Misc display fixes and cleanups - Add new SMU debug option amdkfd: - SVM fixes radeon: - Fix typo in comment From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211216202731.5900-1-alexander.deucher@amd.com
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- 17 Dec, 2021 3 commits
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Dave Airlie authored
Merge tag 'mediatek-drm-next-5.17' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next Mediatek DRM Next for Linux 5.16 1. Add support for MT8192 2. CMDQ refinement. 3. Miscellaneous clean up and reorder. 4. Set the default value of rotation to DRM_MODE_ROTATE_0 Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for 5.17: UAPI Changes: * vmwgfx: Version bump to 2.20 Cross-subsystem Changes: * of: Create simple-framebuffer devices in of_platform_default_init() Core Changes: * Replace include <linux/kernel.h> with more fine-grained includes * Document DRM_IOCTL_MODE_GETFB2 * format-helper: Support XRGB2101010 source buffers Driver Changes: * amdgpu: Fix runtime PM on some configs * ast: Fix I2C initialization * bridge: ti-sn65dsi86: Set regmap max_register * panel: Add Team Source Display TST043015CMHX plus DT bindings * simpledrm: Add support for Apple M1 * sprd: Add various drivers plus DT bindings * vc4: Support 10-bit YUV 4:2:0 output; Fix clock-rate updates * vmwgfx: Implement GEM support; Implement GL 4.3 support Signed-off-by:
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ssh://git.freedesktop.org/git/drm/drm-intelDave Airlie authored
drm/i915 feature pull #2 for v5.17: Features and functionality: - Add eDP privacy screen support (Hans) - Add Raptor Lake S (RPL-S) support (Anusha) - Add CD clock squashing support (Mika) - Properly support ADL-P without force probe (Clint) - Enable pipe color support (10 bit gamma) for display 13 platforms (Uma) - Update ADL-P DMC firmware to v2.14 (Madhumitha) Refactoring and cleanups: - More FBC refactoring preparing for multiple FBC instances (Ville) - Plane register cleanups (Ville) - Header refactoring and include cleanups (Jani) - Crtc helper and vblank wait function cleanups (Jani, Ville) - Move pipe/transcoder/abox masks under intel_device_info.display (Ville) Fixes: - Add a delay to let eDP source OUI write take effect (Lyude) - Use div32 version of MPLLB word clock for UHBR on SNPS PHY (Jani) - Fix DMC firmware loader overflow check (Harshit Mogalapalli) - Fully disable FBC on FIFO underruns (Ville) - Disable FBC with double wide pipe as mutually exclusive (Ville) - DG2 workarounds (Matt) - Non-x86 build fixes (Siva) - Fix HDR plane max width for NV12 (Vidya) - Disable IRQ for selftest timestamp calculation (Anshuman) - ADL-P VBT DDC pin mapping fix (Tejas) Merges: - Backmerge drm-next for privacy screen plumbing (Jani) Signed-off-by:
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- 16 Dec, 2021 35 commits
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Thomas Zimmermann authored
Backmerging for v5.16-rc5. Resolves a conflict between drm-misc-next and drm-misc-fixes in the vc4 driver. Signed-off-by:Thomas Zimmermann <tzimmermann@suse.de>
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Dmitry Osipenko authored
DMA buffers of 2D/3D engines aren't mapped properly when CONFIG_ARM_DMA_USE_IOMMU=y. The memory management code of Tegra DRM driver has a longstanding overhaul overdue and it's not obvious where the problem is in this case. Hence let's add back the old workaround which we already had sometime before. It explicitly detaches DRM devices from the offending implicit IOMMU domain. This fixes a completely broken 2d/3d drivers in case of ARM32 multiplatform kernel config. Cc: stable@vger.kernel.org Fixes: fa6661b7 ("drm/tegra: Optionally attach clients to the IOMMU") Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
Host1x DMA buffer isn't mapped properly when CONFIG_ARM_DMA_USE_IOMMU=y. The memory management code of Host1x driver has a longstanding overhaul overdue and it's not obvious where the problem is in this case. Hence let's add back the old workaround which we already had sometime before. It explicitly detaches Host1x device from the offending implicit IOMMU domain. This fixes a completely broken Host1x DMA in case of ARM32 multiplatform kernel config. Cc: stable@vger.kernel.org Fixes: af1cbfb9 ("gpu: host1x: Support DMA mapping of buffers") Signed-off-by:
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Dmitry Osipenko authored
Move runtime PM management of older UAPI code paths into the common place. This removes boilerplate code from client drivers. Signed-off-by:
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Dmitry Osipenko authored
Runtime PM is now universally available, make it mandatory by removing the pm_runtime_enabled() checks. Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
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Dmitry Osipenko authored
CDMA must be stopped before hardware is suspended. Add channel stopping to RPM suspend callback. Add system level suspend-resume callbacks. Runtime PM initialization is moved to host1x client init phase because RPM callback now uses host1x channel that is available only when host1x client is registered. Reviewed-by:
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Dmitry Osipenko authored
CDMA must be stopped before hardware is suspended. Add channel stopping to RPM suspend callback. Add system level suspend-resume callbacks. Runtime PM initialization is moved to host1x client init phase because RPM callback now uses host1x channel that is available only when host1x client is registered. Reviewed-by:
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Dmitry Osipenko authored
Add runtime power management and support generic power domains. Reviewed-by:
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Dmitry Osipenko authored
Add runtime power management and support generic power domains. Reviewed-by:
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Dmitry Osipenko authored
The HDMI on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now HDMI driver must use OPP API for driving the controller's clock rate because OPP API takes care of reconfiguring the domain's performance state based on HDMI clock rate. Add OPP support to the HDMI driver. Reviewed-by:
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Dmitry Osipenko authored
Add OPP and SoC core voltage scaling support to the display controller driver. This is required for enabling system-wide DVFS on pre-Tegra186 SoCs. Reviewed-by:
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Dmitry Osipenko authored
Runtime PM auto-suspension doesn't work without pm_runtime_mark_last_busy(), add it. Cc: <stable@vger.kernel.org> Reviewed-by:
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Dmitry Osipenko authored
Add host1x_channel_stop() which waits till channel becomes idle and then stops the channel hardware. This is needed for supporting suspend/resume by host1x drivers since the hardware state is lost after power-gating, thus the channel needs to be stopped before client enters into suspend. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Signed-off-by:
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Dmitry Osipenko authored
Add runtime PM and OPP support to the Host1x driver. For the starter we will keep host1x always-on because dynamic power management require a major refactoring of the driver code since lot's of code paths are missing the RPM handling and we're going to remove some of these paths in the future. Reviewed-by:
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Thierry Reding authored
This function can return one of several errors in an ERR_PTR()-encoded pointer, so make sure to propogate those on failure. Suggested-by:
Robin Murphy <robin.murphy@arm.com> Signed-off-by:
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Robin Murphy authored
Host1x seems to be relying on picking up dma-mapping.h transitively from iova.h, which has no reason to include it in the first place. Fix the former issue before we totally break things by fixing the latter one. CC: Thierry Reding <thierry.reding@gmail.com> CC: Mikko Perttunen <mperttunen@nvidia.com> CC: dri-devel@lists.freedesktop.org Signed-off-by:
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Robin Murphy authored
Upon failure, dma_alloc_coherent() returns NULL. If that does happen, passing some uninitialised stack contents to dma_mapping_error() - which belongs to a different API in the first place - has precious little chance of detecting it. Also include the correct header, because the fragile transitive inclusion currently providing it is going to break soon. Fixes: 20e7dce2 ("drm/tegra: Remove memory allocation from Falcon library") CC: Thierry Reding <thierry.reding@gmail.com> CC: Mikko Perttunen <mperttunen@nvidia.com> CC: dri-devel@lists.freedesktop.org Signed-off-by:
Christoph Hellwig <hch@lst.de> Signed-off-by:
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Dmitry Osipenko authored
Tegra20 SoC supports only S/PDIF source for HDMI audio. Register ASoC HDMI S/PDIF CODEC for Tegra20, it will be linked with the S/PDIF CPU DAI. Signed-off-by:
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Dmitry Osipenko authored
Add missing error unwinding to tegra_hdmi_init(), for consistency. Signed-off-by:
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Arnd Bergmann authored
The resume helper is called conditionally and causes a harmless warning when stubbed out: drivers/gpu/drm/tegra/nvdec.c:240:12: error: 'nvdec_runtime_resume' defined but not used [-Werror=unused-function] 240 | static int nvdec_runtime_resume(struct device *dev) Mark both suspend and resume as __maybe_unused for consistency to avoid this warning. Fixes: e76599df354d ("drm/tegra: Add NVDEC driver") Signed-off-by:Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Arnd Bergmann authored
Without CONFIG_IOMMU_API, the nvdec_writel() function is unused, causing a warning: drivers/gpu/drm/tegra/nvdec.c:48:13: error: 'nvdec_writel' defined but not used [-Werror=unused-function] 48 | static void nvdec_writel(struct nvdec *nvdec, u32 value, unsigned int offset) | ^~~~~~~~~~~~ As this is a trivial wrapper around an inline function, mark it as inline itself, which avoids the warning as well. Fixes: e76599df354d ("drm/tegra: Add NVDEC driver") Signed-off-by: -
Dmitry Osipenko authored
Asus Transformer TF700T is a Tegra30 tablet device which uses RGB->DSI bridge that requires a precise clock rate in order to operate properly. Tegra30 has a dedicated PLL for each display controller, hence the PLL rate can be changed freely. Allow PLL rate changes on Tegra30+ for RGB output. Configure the clock rate before display controller is enabled since DC itself may be running off this PLL and it's not okay to change the rate of the active PLL that doesn't support dynamic frequency switching since hardware will hang. Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T Signed-off-by:
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Wan Jiabing authored
struct tegra_dc is declared at 13rd line. The declaration here is unnecessary. Remove it. Signed-off-by:
Wan Jiabing <wanjiabing@vivo.com> Signed-off-by:
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Mikko Perttunen authored
When going idle, it's not unlikely that more work will follow. As such, use autosuspend with a 500ms suspend delay. Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by:
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Thierry Reding authored
As of commit 4782c0a5 ("clk: tegra: Don't deassert reset on enabling clocks"), module resets are no longer automatically deasserted when the module clock is enabled. To make sure that the gr2d module continues to work, we need to explicitly control the module reset. Fixes: 4782c0a5 ("clk: tegra: Don't deassert reset on enabling clocks") Signed-off-by:
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Arnd Bergmann authored
Linking fails when dma-buf is disabled: ld.lld: error: undefined symbol: dma_fence_release >>> referenced by fence.c >>> gpu/host1x/fence.o:(host1x_syncpt_fence_enable_signaling) in archive drivers/built-in.a >>> referenced by fence.c >>> gpu/host1x/fence.o:(host1x_fence_signal) in archive drivers/built-in.a >>> referenced by fence.c >>> gpu/host1x/fence.o:(do_fence_timeout) in archive drivers/built-in.a Fixes: 687db220 ("gpu: host1x: Add DMA fence implementation") Signed-off-by:
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Randy Dunlap authored
Fix kernel-doc warning in host1x: ../drivers/gpu/host1x/bus.c:774: warning: Excess function parameter 'key' description in '__host1x_client_register' Fixes: 0cfe5a6e ("gpu: host1x: Split up client initalization and registration") Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-tegra@vger.kernel.org Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by:
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Dmitry Osipenko authored
Asus TF700T tablet uses TC358768 DPI->DSI bridge that sits between Tegra's DPI output and display panel input. Bridge requires to have stable PCLK output before RGB encoder is enabled because it uses PCLK by itself to clock internal logic and bridge is programmed before Tegra's encoder is enabled. Hence the PCLK clock shifter must be programmed when CRTC is enabled, otherwise clock is unstable and bridge hangs because of it. Move the shifter programming from RGB encoder into CRTC. Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T Signed-off-by:
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Mikko Perttunen authored
To get full performance out of these engines, bump their clock rates to maximum. In the future we may want something smarter but this should be fine for now. Signed-off-by:
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Mikko Perttunen authored
Add support for booting and using NVDEC on Tegra210, Tegra186 and Tegra194 to the Host1x and TegraDRM drivers. Booting in secure mode is not currently supported. Signed-off-by:
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Thierry Reding authored
This adds support for asynchronously updating the cursor plane, which enables support for the legacy cursor IOCTLs. Signed-off-by: -
Thierry Reding authored
Currently this function doesn't return an error, but that may change in the future, so make sure to propagate any error codes that it might return. Signed-off-by: -
Thierry Reding authored
Instead of referencing the tegra_plane_funcs struct directly, use each plane's vtable instead. This makes it more future-proof in case any of the planes ever use a different set of functions. Signed-off-by: -
Thierry Reding authored
This cache is used to avoid mapping and unmapping buffer objects unnecessarily. Mappings are cached per client and stay hot until the buffer object is destroyed. Signed-off-by: -
Thierry Reding authored
DMA-BUF requires that each device that accesses a DMA-BUF attaches to it separately. To do so the host1x_bo_pin() and host1x_bo_unpin() functions need to be reimplemented so that they can return a mapping, which either represents an attachment or a map of the driver's own GEM object. Signed-off-by:
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