1. 05 Jun, 2023 1 commit
    • Maxime Chevallier's avatar
      net: mdio: Introduce a regmap-based mdio driver · 642af0f9
      Maxime Chevallier authored
      There exists several examples today of devices that embed an ethernet
      PHY or PCS directly inside an SoC. In this situation, either the device
      is controlled through a vendor-specific register set, or sometimes
      exposes the standard 802.3 registers that are typically accessed over
      MDIO.
      
      As phylib and phylink are designed to use mdiodevices, this driver
      allows creating a virtual MDIO bus, that translates mdiodev register
      accesses to regmap accesses.
      
      The reason we use regmap is because there are at least 3 such devices
      known today, 2 of them are Altera TSE PCS's, memory-mapped, exposed
      with a 4-byte stride in stmmac's dwmac-socfpga variant, and a 2-byte
      stride in altera-tse. The other one (nxp,sja1110-base-tx-mdio) is
      exposed over SPI.
      Signed-off-by: default avatarMaxime Chevallier <maxime.chevallier@bootlin.com>
      Reviewed-by: default avatarSimon Horman <simon.horman@corigine.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      642af0f9
  2. 04 Jun, 2023 1 commit
  3. 03 Jun, 2023 12 commits
  4. 02 Jun, 2023 11 commits
  5. 01 Jun, 2023 15 commits