- 17 Apr, 2008 40 commits
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Paolo Ciarrocchi authored
Before: total: 37 errors, 16 warnings, 366 lines checked After: total: 0 errors, 15 warnings, 369 lines checked No code changed: arch/x86/kernel/cpu/intel.o: text data bss dec hex filename 1534 452 0 1986 7c2 intel.o.before 1534 452 0 1986 7c2 intel.o.after md5: 1ca348a06de6eb354c4b6ea715a57db5 intel.o.before.asm 1ca348a06de6eb354c4b6ea715a57db5 intel.o.after.asm Signed-off-by:
Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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Paolo Ciarrocchi authored
Before: total: 20 errors, 17 warnings, 180 lines checked After: total: 0 errors, 17 warnings, 183 lines checked No code changed: arch/x86/kernel/summit_32.o: text data bss dec hex filename 932 192 0 1124 464 summit_32.o.before 932 192 0 1124 464 summit_32.o.after md5: 217aa5f002f217e56ef9d8e5c74b60e0 summit_32.o.before.asm 217aa5f002f217e56ef9d8e5c74b60e0 summit_32.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
Before: total: 1 errors, 0 warnings, 178 lines checked After: total: 0 errors, 0 warnings, 178 lines checked No code changed: arch/x86/boot/pm.o: text data bss dec hex filename 351 0 6 357 165 pm.o.before 351 0 6 357 165 pm.o.after md5: 81de3616bceb29691bf835bb62a84ff1 pm.o.before.asm 81de3616bceb29691bf835bb62a84ff1 pm.o.after.asm Signed-off-by: -
Yinghai Lu authored
when comparing the e820 direct from BIOS, and the one by kexec: BIOS-provided physical RAM map: - BIOS-e820: 0000000000000000 - 0000000000097400 (usable) + BIOS-e820: 0000000000000100 - 0000000000097400 (usable) BIOS-e820: 0000000000097400 - 00000000000a0000 (reserved) BIOS-e820: 00000000000e6000 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 00000000dffa0000 (usable) - BIOS-e820: 00000000dffae000 - 00000000dffb0000 type 9 + BIOS-e820: 00000000dffae000 - 00000000dffb0000 (reserved) BIOS-e820: 00000000dffb0000 - 00000000dffbe000 (ACPI data) BIOS-e820: 00000000dffbe000 - 00000000dfff0000 (ACPI NVS) BIOS-e820: 00000000dfff0000 - 00000000e0000000 (reserved) BIOS-e820: 00000000fec00000 - 00000000fec01000 (reserved) - BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) =======> that is the local apic address... somewhere we lost it BIOS-e820: 00000000ff700000 - 0000000100000000 (reserved) BIOS-e820: 0000000100000000 - 0000004020000000 (usable) found one entry about reserved is missing for the kernel by kexec. it turns out init_apic_mappings is called before e820_reserve_resources in setup_arch. but e820_reserve_resources is using request_resource. it will not handle the conflicts. there are three ways to fix it: 1. change request_resource in e820_reserve_resources to to insert_resource 2. move init_apic_mappings after e820_reserve_resources 3. use late_initcall to insert lapic resource. this patch is using method 3, that is less intrusive. in later version could consider to use method 1. before patch fed20000-ffffffff : PCI Bus #00 fee00000-fee00fff : Local APIC fefff000-feffffff : pnp 00:09 ff700000-ffffffff : reserved with patch will get map in first kernel fed20000-ffffffff : PCI Bus #00 fee00000-fee00fff : Local APIC fee00000-fee00fff : reserved fefff000-feffffff : pnp 00:09 ff700000-ffffffff : reserved Signed-off-by:Yinghai Lu <yinghai.lu@sun.com> Signed-off-by:
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Yinghai Lu authored
e820_resource_resources could use insert_resource instead of request_resource also move code_resource, data_resource, bss_resource, and crashk_res out of e820_reserve_resources. Signed-off-by:
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Eric W. Biederman authored
Copy x86_64 and add a head32.c so we can start moving early architecture initialization out of assembly. [ Sam Ravnborg <sam@ravnborg.org>: updated it to x86 ] Signed-off-by:
Eric W. Biederman <ebiederm@xmission.com> Signed-off-by:
Sam Ravnborg <sam@ravnborg.org> Cc: H. Peter Anvin <hpa@zytor.com> Signed-off-by:
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Yinghai Lu authored
quad core 8 socket system will have apic id lifting.the apic id range could be [4, 0x23]. and apic_is_clustered_box will think that need to three clusters and that is large than 2. So it is treated as clustered_box. and will get Marking TSC unstable due to TSCs unsynchronized even the CPUs have X86_FEATURE_CONSTANT_TSC set. this patch will check if the cpu is from AMD. Signed-off-by:
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Ingo Molnar authored
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Ingo Molnar authored
Before: total: 7 errors, 8 warnings, 471 lines checked After: total: 5 errors, 5 warnings, 479 lines checked ( the rest cannot be eliminated due to zlib interface cruftiness. ) No code changed: arch/x86/boot/compressed/misc.o: text data bss dec hex filename 10716 8 2152 12876 324c misc.o.before 10716 8 2152 12876 324c misc.o.after md5: 2c20c903986a3c9bca44306c6646067e misc.o.before.asm 2c20c903986a3c9bca44306c6646067e misc.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
Fix lots of style errors and warnings. Before: total: 58 errors, 9 warnings, 469 lines checked After: total: 7 errors, 8 warnings, 471 lines checked No code changed: arch/x86/boot/compressed/misc.o: text data bss dec hex filename 10716 8 2152 12876 324c misc.o.before 10716 8 2152 12876 324c misc.o.after md5: 2c20c903986a3c9bca44306c6646067e misc.o.before.asm 2c20c903986a3c9bca44306c6646067e misc.o.after.asm Signed-off-by:
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Paolo Ciarrocchi authored
Before: total: 3 errors, 1 warnings, 23 lines checked After: total: 0 errors, 0 warnings, 25 lines checked No code changed: arch/x86/kernel/cpu/umc.o: text data bss dec hex filename 24 616 0 640 280 umc.o.before 24 616 0 640 280 umc.o.after md5: e8daa3eaed0963a0cdd2e83c2e1f9823 umc.o.before.asm e8daa3eaed0963a0cdd2e83c2e1f9823 umc.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
Before: total: 16 errors, 13 warnings, 122 lines checked After: total: 0 errors, 0 warnings, 122 lines checked No code changed: arch/x86/kernel/cpu/mcheck/p6.o: text data bss dec hex filename 1082 0 8 1090 442 p6.o.before 1082 0 8 1090 442 p6.o.after md5: 4e283fbc1b68240f1724d9725007d379 p6.o.before.asm 4e283fbc1b68240f1724d9725007d379 p6.o.after.asm Signed-off-by:
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Ingo Molnar authored
basic style cleanup to flush out years of neglect: - consistent indentation - whitespace fixes - consistent comments Signed-off-by: -
Hiroshi Shimamoto authored
Now cpu/proc.c and cpu/proc_64.c are same. So cpu/proc_64.c can be removed. Signed-off-by:
Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by:
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Hiroshi Shimamoto authored
make cpu/proc.c and cpu/proc_64.c same. Signed-off-by:
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Hiroshi Shimamoto authored
Change /proc/cpuinfo on 32-bit, it will look like on 64-bit. 'power management' line is added and power management information will be printed at the line. Signed-off-by:
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Hiroshi Shimamoto authored
clean up for unification. Signed-off-by:
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Hiroshi Shimamoto authored
x86 /proc/cpuinfo code can be unified. This is the first step of unification. Signed-off-by:
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Paolo Ciarrocchi authored
arch/x86/mach-generic/bigsmp.o: text data bss dec hex filename 1271 144 4 1419 58b bigsmp.o.before 1271 144 4 1419 58b bigsmp.o.after md5: b83aad375294c002c79b03c3a2e4be35 bigsmp.o.before.asm b83aad375294c002c79b03c3a2e4be35 bigsmp.o.after.asm Signed-off-by:
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Paolo Ciarrocchi authored
arch/x86/kernel/cpu/nexgen.o: text data bss dec hex filename 111 316 0 427 1ab nexgen.o.before 111 316 0 427 1ab nexgen.o.after md5: e796efefea9ebc6644338bad226599ee nexgen.o.before.asm e796efefea9ebc6644338bad226599ee nexgen.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
File is now error/warning free. arch/x86/mach-generic/summit.o: text data bss dec hex filename 1481 140 0 1621 655 summit.o.before 1481 140 0 1621 655 summit.o.after md5: 7b7dc1cbd381af7b9393da989da5b0fd summit.o.before.asm 7b7dc1cbd381af7b9393da989da5b0fd summit.o.after.asm Signed-off-by:
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Paolo Ciarrocchi authored
Just whitespace cleanups. total: 0 errors, 0 warnings, 26 lines checked arch/x86/mach-generic/default.c has no obvious style problems and is ready for submission. arch/x86/mach-generic/default.o: text data bss dec hex filename 1036 140 0 1176 498 default.o.before 1036 140 0 1176 498 default.o.after md5: f283c53022c568f3162bbcde44f65762 default.o.before.asm f283c53022c568f3162bbcde44f65762 default.o.after.asm Signed-off-by:
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Paolo Ciarrocchi authored
The patch kills 20 errors and a few warnings. arch/x86/mach-generic/probe.o: text data bss dec hex filename 578 45 0 623 26f probe.o.before 578 45 0 623 26f probe.o.after md5: 86eb1c3e3cf37f81d37bcd9a0c9f14ad probe.o.before.asm 86eb1c3e3cf37f81d37bcd9a0c9f14ad probe.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
The patch fixes 33 errors and a few warnings reported by checkpatch.pl arch/x86/oprofile/op_model_athlon.o: text data bss dec hex filename 1691 0 32 1723 6bb op_model_athlon.o.before 1691 0 32 1723 6bb op_model_athlon.o.after md5: c354bc2d7140e1e626c03390eddaa0a6 op_model_athlon.o.before.asm c354bc2d7140e1e626c03390eddaa0a6 op_model_athlon.o.after.asm Signed-off-by:
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Paolo Ciarrocchi authored
no code changed: arch/x86/oprofile/op_model_ppro.o: text data bss dec hex filename 1765 0 16 1781 6f5 op_model_ppro.o.before 1765 0 16 1781 6f5 op_model_ppro.o.after md5: 71c7f68d2197d686e3d1121bc18a6b6e op_model_ppro.o.before.asm 71c7f68d2197d686e3d1121bc18a6b6e op_model_ppro.o.after.asm Signed-off-by:
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Paolo Ciarrocchi authored
arch/x86/kernel/x8664_ksyms_64.o: text data bss dec hex filename 0 0 0 0 0 x8664_ksyms_64.o.before 0 0 0 0 0 x8664_ksyms_64.o.after md5: 2dd2d82a2b440a3c29b9ac9ce3221994 x8664_ksyms_64.o.before.asm 2dd2d82a2b440a3c29b9ac9ce3221994 x8664_ksyms_64.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
The patch make the file errors free. Only 4 "WARNING: line over 80 characters" left. arch/x86/kernel/cpu/mcheck/p5.o: text data bss dec hex filename 452 0 4 456 1c8 p5.o.before 452 0 4 456 1c8 p5.o.after md5: 50c945ef150aa95bf0481cc3e1dc3315 p5.o.before.asm 50c945ef150aa95bf0481cc3e1dc3315 p5.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
The patch kills 45 errors and a few warnings. The file is now error/warning free: total: 0 errors, 0 warnings, 237 lines checked arch/x86/lib/string_32.c has no obvious style problems and is ready for submission. no code changed: arch/x86/lib/string_32.o: text data bss dec hex filename 639 0 0 639 27f string_32.o.before 639 0 0 639 27f string_32.o.after md5: 2db1c48187cf5113bb595153ee1fc73d string_32.o.before.asm 2db1c48187cf5113bb595153ee1fc73d string_32.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
After the patch: total: 0 errors, 1 warnings, 29 lines checked no code changed: arch/x86/kernel/syscall_64.o: text data bss dec hex filename 2304 0 0 2304 900 syscall_64.o.before 2304 0 0 2304 900 syscall_64.o.after md5: 0fdbb875cde8892296585226b92f4333 syscall_64.o.before.asm 0fdbb875cde8892296585226b92f4333 syscall_64.o.after.asm Signed-off-by:
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Paolo Ciarrocchi authored
After the patch: total: 0 errors, 0 warnings, 21 lines checked no code changed: arch/x86/lib/memmove_64.o: text data bss dec hex filename 116 0 0 116 74 memmove_64.o.before 116 0 0 116 74 memmove_64.o.after md5: 2d6b0951cafb86a11a222cdd70f6104f memmove_64.o.before.asm 2d6b0951cafb86a11a222cdd70f6104f memmove_64.o.after.asm Signed-off-by: -
Ian Campbell authored
Also update field names to simply payload_{offset,length} so as to not rule out uncompressed images. Signed-off-by:Ian Campbell <ijc@hellion.org.uk> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: virtualization@lists.linux-foundation.org Signed-off-by:
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David P. Reed authored
x86: define outb_pic and inb_pic to stop using outb_p and inb_p The delay between io port accesses to the PIC is now defined using outb_pic and inb_pic. This fix provides the next step, using udelay(2) to define the *PIC specific* timing requirements, rather than on bus-oriented timing, which is not well calibrated. Again, the primary reason for fixing this is to use proper delay strategy, and in particular to fix crashes that can result from using port 80 writes on machines that have resources on port 80, such as the ENE chips used by Quanta in latops it designs and sells to, e.g. HP. Signed-off-by:
David P. Reed <dpreed@reed.com> Signed-off-by:
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Ian Campbell authored
> Don't we have a special section for page-aligned data so it doesn't > waste most of two pages? We have .bss.page_aligned and it seems appropriate to use it. text data bss dec hex filename - 3388 8236 4 11628 2d6c ../build-32/arch/x86/mm/ioremap.o + 3388 48 4100 7536 1d70 ../build-32/arch/x86/mm/ioremap.o Signed-off-by:Thomas Gleixner <tglx@linutronix.de>
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Ingo Molnar authored
no code changed: arch/x86/kernel/cpu/centaur.o: text data bss dec hex filename 1031 324 0 1355 54b centaur.o.before 1031 324 0 1355 54b centaur.o.after md5: 4f306a7f980b58eb69c4bdcfcde565f1 centaur.o.before.asm 4f306a7f980b58eb69c4bdcfcde565f1 centaur.o.after.asm Signed-off-by: -
Paolo Ciarrocchi authored
Kills more than 150 errors/warnings Signed-off-by:
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Ingo Molnar authored
checkpatch.pl --file cleanups: before: total: 74 errors, 3 warnings, 386 lines checked after: total: 0 errors, 0 warnings, 377 lines checked no code changed: arch/x86/lib/mmx_32.o: text data bss dec hex filename 1323 0 8 1331 533 mmx_32.o.before 1323 0 8 1331 533 mmx_32.o.after md5: 4cc39f1017dc40a5ebf02ce0ff7312bc mmx_32.o.before.asm 4cc39f1017dc40a5ebf02ce0ff7312bc mmx_32.o.after.asm Signed-off-by: -
David P. Reed authored
fix code to access CMOS rtc registers so that it does not use inb_p and outb_p routines, which are deprecated. Extensive research on all known CMOS RTC chipset timing shows that there is no need for a delay in accessing the registers of these chips even on old machines. These chipa are never on an expansion bus, but have always been "motherboard" resources, either in the processor chipset or explicitly on the motherboard, and they are not part of the ISA/LPC or PCI buses, so delays should not be based on bus timing. The reason to fix it: 1) port 80 writes often hang some laptops that use ENE EC chipsets, esp. those designed and manufactured by Quanta for HP; 2) RTC accesses are timing sensitive, and extra microseconds may matter; 3) the new "io_delay" function is calibrated by expansion bus timing needs, thus is not appropriate for access to CMOS rtc registers. Signed-off-by:Alan Cox <alan@redhat.com> Signed-off-by:
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Thomas Petazzoni authored
Replace the hardcoded list of initialization functions for each CPU vendor by a list in an ELF section, which is read at initialization in arch/x86/kernel/cpu/cpu.c to fill the cpu_devs[] array. The ELF section, named .x86cpuvendor.init, is reclaimed after boot, and contains entries of type "struct cpu_vendor_dev" which associates a vendor number with a pointer to a "struct cpu_dev" structure. This first modification allows to remove all the VENDOR_init_cpu() functions. This patch also removes the hardcoded calls to early_init_amd() and early_init_intel(). Instead, we add a "c_early_init" member to the cpu_dev structure, which is then called if not NULL by the generic CPU initialization code. Unfortunately, in early_cpu_detect(), this_cpu is not yet set, so we have to use the cpu_devs[] array directly. This patch is part of the Linux Tiny project, and is needed for further patch that will allow to disable compilation of unused CPU support code. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
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Glauber Costa authored
Signed-off-by:
Glauber Costa <gcosta@redhat.com> Signed-off-by:
Ravikiran Thirumalai <kiran@scalemp.com> Acked-by:
Shai Fultheim <shai@scalemp.com> Signed-off-by:
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Glauber Costa authored
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