- 11 Feb, 2022 33 commits
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Marcel Ziswiler authored
This patch adds the device tree to support Toradex Verdin iMX8M Mini a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8M Mini family SoC (either i.MX 8M Mini Quad or 8M Mini DualLite), a PCA9450A PMIC, a Gigabit Ethernet PHY, 1 or 2 GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC, an I2C EEPROM, an RX8130 RTC, an optional SPI CAN controller plus an optional Bluetooth/ Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The device tree for the Dahlia includes the module's device tree and enables the supported peripherals of the carrier board. The device tree for the Verdin Development Board includes the module's device tree as well as the Dahlia one as it is a superset and supports almost all peripherals available. So far there is no display functionality supported at all but basic console UART, PCIe, USB host, eMMC and Ethernet and PCIe functionality work fine. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Hugo Villeneuve authored
Add interrupt controller mode for the pca6416 on i.MX8MP EVK board's. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Shawn Guo authored
With commit 15d16d6d ("kbuild: Add generic rule to apply fdtoverlay"), overlay target can be used to simplify the build of DTB overlays. It also performs a cross check to ensure base DT and overlay actually match. Signed-off-by: Shawn Guo <shawnguo@kernel.org> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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Shawn Guo authored
As suggested by commit 9ae8578b ("of: Documentation: change overlay example to use current syntax"), there is no need to have overlay syntax be hard coded in the device tree source file any more. Signed-off-by: Shawn Guo <shawnguo@kernel.org> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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Marcel Ziswiler authored
Fix strange hex notation with mixed lower-case and upper-case letters. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Reinhold Mueller authored
This patch adds support for the emtrion GmbH emCON-MX8M Mini modules. They are available with NXP i.MX 8M Mini equipped with 2 or 4 GB Memory. The devicetree imx8mm-emcon.dtsi is the common part providing all module components and the basic support for the SoC. The support for the avari baseboard in the developer-kit configuration is provided by the emcon-avari dts files. Signed-off-by: Reinhold Mueller <reinhold.mueller@emtrion.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alexander Stein authored
Add PCIe support to TQMa8MxML series. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
There are two decoders on the i.MX8M Mini controlled by the vpu-blk-ctrl. The G1 supports H264 and VP8 while the G2 support HEVC and VP9. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
With the Hantro G1 and G2 now setup to run independently, update the device tree to allow both to operate. This requires the vpu-blk-ctrl node to be configured. Since vpu-blk-ctrl needs certain clock enabled to handle the gating of the G1 and G2 fuses, the clock-parents and clock-rates for the various VPU's to be moved into the pgc_vpu because they cannot get re-parented once enabled, and the pgc_vpu is the highest in the chain. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Shawn Guo authored
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Adam Ford authored
The vpu is enabled by default, so there is no need to manually enable it. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Li Yang authored
The ls1028a QDS board support different pluggable PHY cards. Define the nodes for these slots to be updated at boot time with overlay according to board setup. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Add gpio-line-names for the various GPIO's used on Gateworks Venice boards. Note that these GPIO's are typically 'configured' in Boot Firmware via gpio-hog therefore we only configure line names to keep the boot firmware configuration from changing on kernel init. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Since commit 9a0f3b15 ("arm64: dts: imx8mn: Enable GPU") imx8mn-venice-gw7902 will hang during kernel init because it uses a MIMX8MN5CVTI which does not have a GPU. Disable pgc_gpumix to work around this. We also disable the GPU devices that depend on the gpumix power domain and pgc_gpu to avoid them staying in a probe deferred state forever. Cc: Adam Ford <aford173@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Fixes: 9a0f3b15 ("arm64: dts: imx8mn: Enable GPU") Reviewed-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marek Vasut authored
The i.MX8M Mini Application Processor Reference Manual, Rev. 3, 11/2020 documents AF MX8MM_IOMUXC_NAND_READY_B_SD3_RESET_B , add it into the pinmux tables. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
Like usb3_phy0 the default state of the usb3_phy1 should be disabled, so it is only enabled on boards exposing this USB port. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Abel Vesa authored
The driver differs from clocks point of view, so the i.MX8QXP is not backwards compatible with i.MX7ULP. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
Add mu5/6 for i.MX8QXP/QM, these two mu will be used for communicating with general purpose Cortex-M4 cores. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Abel Vesa authored
Add SCU RTC node to support SC RTC driver. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
The slew rate and drive-strength of the i2c3 pads were much too high. Bring them down to avoid signal quality issues. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
This adds support for the internal display of the Reform2 Laptop, which is connected to the i.MX8MQ via a MIPI-DSI->eDP bridge chip. Clocking is derived from a system PLL, which provides quite good rate matching for the single supported display mode and keeps the video PLL free for usage with the external display, which isn't supported yet. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
Without a OPP table or a downstream TF-A running on the system the DDRC will fail to probe, as it has no means to scale the DRAM frequency in that case. This however will block the bus scaling driver to come up and this in turn prevents other devices that hook into the interconnect from probing. If the DDRC is disabled, the interconnect driver will simply ignore it. As most systems don't want to scale the DRAM frequency, disable the node by default and only enable it on the systems that actually uses this capability and provides a valid OPP table in the DT. Signed-off-by: Lucas Stach <dev@lynxeye.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Acked-by: Martin Kepplinger <martin.kepplinger@puri.sm> Reviewed-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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David Jander authored
The Protonic PRT8MM is a low-cost agricultural Virtual Terminal. This commit adds most of the board functionality sans the display output, as the i.MX8MM display support isn't ready yet. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Rob Herring authored
The CPU 'arm,armv8' compatible is only for s/w models, so remove it from i.MX8QM CPU nodes. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Add PCIe support to GW71xx/GW72xx/GW73xx/GW7901/GW7902 Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
The i.MX8M-Nano features a GC7000. The Etnaviv driver detects it as: etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6203 Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
Add the DT node for the DISP blk-ctrl. With this in place the display/mipi power domains should be functional. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
Now that we have support for the power domain controller on the i.MX8MN, we can put the USB controller in the respective power domain to allow it to power down the PHY when possible. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
Add the DT node for the GPC, including all the PGC power domains, some of them are not fully functional yet, as they require interaction with the blk-ctrls to properly power up/down the peripherals. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Richard Zhu authored
Add the PCIe support on iMX8MM EVK boards. And set the default reference clock mode. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Richard Zhu authored
Add the PCIe support on i.MX8MM platforms. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Richard Zhu authored
Add the PCIe PHY support on iMX8MM platforms. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
This adds the defines for the power domains provided by the VPU blk-ctrl on the i.MX8MQ. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 23 Jan, 2022 6 commits
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Linus Torvalds authored
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Linus Torvalds authored
Merge tag 'perf-tools-for-v5.17-2022-01-22' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux Pull more perf tools updates from Arnaldo Carvalho de Melo: - Fix printing 'phys_addr' in 'perf script'. - Fix failure to add events with 'perf probe' in ppc64 due to not removing leading dot (ppc64 ABIv1). - Fix cpu_map__item() python binding building. - Support event alias in form foo-bar-baz, add pmu-events and parse-event tests for it. - No need to setup affinities when starting a workload or attaching to a pid. - Use path__join() to compose a path instead of ad-hoc snprintf() equivalent. - Override attr->sample_period for non-libpfm4 events. - Use libperf cpumap APIs instead of accessing the internal state directly. - Sync x86 arch prctl headers and files changed by the new set_mempolicy_home_node syscall with the kernel sources. - Remove duplicate include in cpumap.h. - Remove redundant err variable. * tag 'perf-tools-for-v5.17-2022-01-22' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: perf tools: Remove redundant err variable perf test: Add parse-events test for aliases with hyphens perf test: Add pmu-events test for aliases with hyphens perf parse-events: Support event alias in form foo-bar-baz perf evsel: Override attr->sample_period for non-libpfm4 events perf cpumap: Remove duplicate include in cpumap.h perf cpumap: Migrate to libperf cpumap api perf python: Fix cpu_map__item() building perf script: Fix printing 'phys_addr' failure issue tools headers UAPI: Sync files changed by new set_mempolicy_home_node syscall tools headers UAPI: Sync x86 arch prctl headers with the kernel sources perf machine: Use path__join() to compose a path instead of snprintf(dir, '/', filename) perf evlist: No need to setup affinities when disabling events for pid targets perf evlist: No need to setup affinities when enabling events for pid targets perf stat: No need to setup affinities when starting a workload perf affinity: Allow passing a NULL arg to affinity__cleanup() perf probe: Fix ppc64 'perf probe add events failed' case
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git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-traceLinus Torvalds authored
Pull ftrace fix from Steven Rostedt: "Fix s390 breakage from sorting mcount tables. The latest merge of the tracing tree sorts the mcount table at build time. But s390 appears to do things differently (like always) and replaces the sorted table back to the original unsorted one. As the ftrace algorithm depends on it being sorted, bad things happen when it is not, and s390 experienced those bad things. Add a new config to tell the boot if the mcount table is sorted or not, and allow s390 to opt out of it" * tag 'trace-v5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace: ftrace: Fix assuming build time sort works for s390
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Steven Rostedt (Google) authored
To speed up the boot process, as mcount_loc needs to be sorted for ftrace to work properly, sorting it at build time is more efficient than boot up and can save milliseconds of time. Unfortunately, this change broke s390 as it will modify the mcount_loc location after the sorting takes place and will put back the unsorted locations. Since the sorting is skipped at boot up if it is believed that it was sorted at run time, ftrace can crash as its algorithms are dependent on the list being sorted. Add a new config BUILDTIME_MCOUNT_SORT that is set when BUILDTIME_TABLE_SORT but not if S390 is set. Use this config to determine if sorting should take place at boot up. Link: https://lore.kernel.org/all/yt9dee51ctfn.fsf@linux.ibm.com/ Fixes: 72b3942a ("scripts: ftrace - move the sort-processing in ftrace_init") Reported-by: Sven Schnelle <svens@linux.ibm.com> Tested-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
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Linus Torvalds authored
Merge tag 'kbuild-fixes-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull Kbuild fixes from Masahiro Yamada: - Bring include/uapi/linux/nfc.h into the UAPI compile-test coverage - Revert the workaround of CONFIG_CC_IMPLICIT_FALLTHROUGH - Fix build errors in certs/Makefile * tag 'kbuild-fixes-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: certs: Fix build error when CONFIG_MODULE_SIG_KEY is empty certs: Fix build error when CONFIG_MODULE_SIG_KEY is PKCS#11 URI Revert "Makefile: Do not quote value for CONFIG_CC_IMPLICIT_FALLTHROUGH" usr/include/Makefile: add linux/nfc.h to the compile-test coverage
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git://github.com/norov/linuxLinus Torvalds authored
Pull bitmap updates from Yury Norov: - introduce for_each_set_bitrange() - use find_first_*_bit() instead of find_next_*_bit() where possible - unify for_each_bit() macros * tag 'bitmap-5.17-rc1' of git://github.com/norov/linux: vsprintf: rework bitmap_list_string lib: bitmap: add performance test for bitmap_print_to_pagebuf bitmap: unify find_bit operations mm/percpu: micro-optimize pcpu_is_populated() Replace for_each_*_bit_from() with for_each_*_bit() where appropriate find: micro-optimize for_each_{set,clear}_bit() include/linux: move for_each_bit() macros from bitops.h to find.h cpumask: replace cpumask_next_* with cpumask_first_* where appropriate tools: sync tools/bitmap with mother linux all: replace find_next{,_zero}_bit with find_first{,_zero}_bit where appropriate cpumask: use find_first_and_bit() lib: add find_first_and_bit() arch: remove GENERIC_FIND_FIRST_BIT entirely include: move find.h from asm_generic to linux bitops: move find_bit_*_le functions from le.h to find.h bitops: protect find_first_{,zero}_bit properly
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- 22 Jan, 2022 1 commit
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Minghao Chi authored
Return value from perf_event__process_tracing_data() directly instead of taking this in another redundant variable. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Link: http://lore.kernel.org/lkml/20220112080109.666800-1-chi.minghao@zte.com.cnSigned-off-by: CGEL ZTE <cgel.zte@gmail.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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