- 22 Feb, 2024 13 commits
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Duy Nguyen authored
Add operating points for running the Cortex-A76 CPU cores on R-Car V4M at various speeds, up to the Normal (1.0 GHz). Signed-off-by:
Duy Nguyen <duy.nguyen.rh@renesas.com> Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/736b5836ec2b54e8b36712866309dc1b7ee1fc48.1706796979.git.geert+renesas@glider.be
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Duy Nguyen authored
Describe the clocks for the four Cortex-A76 CPU cores. CA76 CPU cores 0,1,2,3 are clocked by ZC0,ZC1,ZC2,ZC3. Signed-off-by:
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Duy Nguyen authored
Support CPUIdle for ARM Cortex-A76 on R-Car V4M. Signed-off-by:
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Duy Nguyen authored
Complete the description of the Cortex-A76 CPU cores and L3 cache controllers on the Renesas R-Car V4M (R8A779H0) SoC, including CPU topology and PSCI support for enabling CPU cores. Signed-off-by:
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Duy Nguyen authored
Describe the cache configuration for the first Cortex-A76 CPU core on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
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Cong Dang authored
Add device nodes for the General Purpose Input/Output (GPIO) blocks on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
Cong Dang <cong.dang.xn@renesas.com> Signed-off-by:
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Geert Uytterhoeven authored
Enable the I2C0 bus on the Gray Hawk Single board, and describe the I2C EEPROMs present. Based on patches for Gray Hawk in the BSP by Hai Pham. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/960595394a274b675f1ec9ec1c324e4cc1ac1f77.1706796660.git.geert+renesas@glider.be
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Hai Pham authored
Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
Hai Pham <hai.pham.ud@renesas.com> Signed-off-by:
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Wolfram Sang authored
Sound uses the standard 5V supply, so rename the fixed regulator as such. Also add properties documenting it is always on, also during boot. Signed-off-by:
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Wolfram Sang authored
It is named T1.8V in the schematics. Also add properties documenting it is always on, also during boot. Signed-off-by:
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Wolfram Sang authored
Without them, no power, so cards do not get recognized. Signed-off-by:
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Geert Uytterhoeven authored
Complete the descriptions of the serial console and the external serial clock by adding pin control. Based on patches for Gray Hawk in the BSP by Hai Pham and Nghia Nguyen. Signed-off-by:
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Hai Pham authored
Add a device node for the Pin Function Controller on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
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- 06 Feb, 2024 4 commits
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Geert Uytterhoeven authored
Enable the watchdog timer on the Gray Hawk Single board. Signed-off-by:
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Minh Le authored
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
Minh Le <minh.le.aj@renesas.com> Signed-off-by:
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Geert Uytterhoeven authored
Add the input capture interrupt on Timer Unit instances that have it. Add "interrupt-names" properties for clarity. Signed-off-by:
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Geert Uytterhoeven authored
Add the input capture interrupt on Timer Unit instances that have it. Add "interrupt-names" properties for clarity. Signed-off-by:
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- 31 Jan, 2024 9 commits
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Biju Das authored
Add CSI and CRU nodes r9a07g043 (RZ/G2UL) SoC DTSI. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
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Geert Uytterhoeven authored
Add initial support for the Renesas Gray Hawk Single board, which is based on the R-Car V4M (R8A779H0) SoC: - Memory, - Crystal oscillators, - Serial console. Based on the White Hawk Single DTS, and on a patch for the Gray Hawk board stack in the BSP by Hai Pham. Signed-off-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be
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Hai Pham authored
Add initial support for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
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Geert Uytterhoeven authored
Renesas R-Car V4M DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car V4M (R8A779H0) SoC, shared by driver and DT source files.
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Claudiu Beznea authored
Enable the watchdog interface (accessible by Cortex-A of RZ/G3S SoC) on RZ/G3S SMARC SoM. Signed-off-by:
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by:
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Claudiu Beznea authored
Add the DT node for the watchdog IP accessible by Cortex-A of RZ/G3S SoC (R9108G045). Signed-off-by:
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Geert Uytterhoeven authored
R-Car V4H actually has two SCIF_CLK pins. The second pin provides the SCIF_CLK signal for HSCIF2 and SCIF4. Fixes: a4c31c56 ("arm64: dts: renesas: r8a779g0: Add SCIF nodes") Fixes: 39d9dfc6 ("arm64: dts: renesas: r8a779g0: Add remaining HSCIF nodes") Signed-off-by:
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Duy Nguyen authored
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be
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Geert Uytterhoeven authored
Document support for the Clock Pulse Generator (CPG) and Module Standby Software Reset (MSSR) module on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
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- 30 Jan, 2024 2 commits
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Duy Nguyen authored
Add power domain indices for the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Duy Nguyen authored
Document support for the System Controller (SYSC) in the R-Car V4M (R8A779H0) SoC. Signed-off-by:
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- 29 Jan, 2024 10 commits
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Geert Uytterhoeven authored
The White Hawk Single board is a single-board integration of the Renesas White Hawk CPU and Breakout board stack, based on the R-Car V4H ES2.0 (R8A779G2) SoC. For now, the only visible differences compared to the board stack are: - The SoC is an updated version of R-Car V4H (R8A779G0), - The serial console uses an FT2232H instead of a CP2102 USB-UART bridge, with CTS/RTS wired. Signed-off-by: -
Geert Uytterhoeven authored
Add support for the Renesas R-Car V4H ES2.0 (R8A779G2) SoC, which is an updated version of the R-Car V4H (R8A779G0) SoC. Signed-off-by:
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Geert Uytterhoeven authored
Factor out the parts on the White Hawk BreakOut board that are also present on the White Hawk Single board, so they can be reused when introducing support for the latter. Signed-off-by:
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Geert Uytterhoeven authored
Factor out the parts on the White Hawk CPU board that are also present on the White Hawk Single board, so they can be reused when introducing support for the latter. Signed-off-by:
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Geert Uytterhoeven authored
The White Hawk CPU and BreakOut board DTS is specific to R-Car V4H. Document it in the top-level comment. Signed-off-by:
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Geert Uytterhoeven authored
The White Hawk CSI/DSI and RAVB/Ethernet(1000Base-T1) sub boards are not specific to R-Car V4H. Hence rename their DTS file names to drop the "r8a779g0-" prefix, and remove any references to R-Car V4H. Signed-off-by:
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Geert Uytterhoeven authored
Alphabetical by node name. Signed-off-by:
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Geert Uytterhoeven authored
The White Hawk CPU board can be used standalone, without connecting it to the White Hawk BreakOut board. Add a DTS file for supporting this use case. Signed-off-by:
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Wolfram Sang authored
Signed-off-by:
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Wolfram Sang authored
Schematics say that all these 3.3v sources are driven by "D3.3V". We have a regulator for it already in ulcb.dtsi. Use it instead. Signed-off-by:
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- 22 Jan, 2024 2 commits
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Geert Uytterhoeven authored
Numerical by unit address, alphabetical by node name. Signed-off-by:
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Geert Uytterhoeven authored
According to Table 8.1, "Summary of Module Power, Reset condition and Clock assignment" of the R-Mobile APE6 Hardware Manual Rev. 0.7, the parent clock of the thermal sensor clock is the Common Peripheral (CP) clock, which runs at 13 MHz (main clock / 2). As the R-Car Thermal driver does not use the clock rate, this change has no functional impact. Signed-off-by:
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