1. 05 May, 2017 1 commit
    • Ville Syrjälä's avatar
      drm/i915: Fix rawclk readout for g4x · 6f38123e
      Ville Syrjälä authored
      Turns out our skills in decoding the CLKCFG register weren't good
      enough. On this particular elk the answer we got was 400 MHz when
      in reality the clock was running at 266 MHz, which then caused us
      to program a bogus AUX clock divider that caused all AUX communication
      to fail.
      
      Sadly the docs are now in bit heaven, so the fix will have to be based
      on empirical evidence. Using another elk machine I was able to frob
      the FSB frequency from the BIOS and see how it affects the CLKCFG
      register. The machine seesm to use a frequency of 266 MHz by default,
      and fortunately it still boot even with the 50% CPU overclock that
      we get when we bump the FSB up to 400 MHz.
      
      It turns out the actual FSB frequency and the register have no real
      link whatsoever. The register value is based on some straps or something,
      but fortunately those too can be configured from the BIOS on this board,
      although it doesn't seem to respect the settings 100%. In the end I was
      able to derive the following relationship:
      
      BIOS FSB / strap | CLKCFG
      -------------------------
      200              | 0x2
      266              | 0x0
      333              | 0x4
      400              | 0x4
      
      So only the 200 and 400 MHz cases actually match how we're currently
      decoding that register. But as the comment next to some of the defines
      says, we have been just guessing anyway.
      
      So let's fix things up so that at least the 266 MHz case will work
      correctly as that is actually the setting used by both the buggy
      machine and my test machine.
      
      The fact that 333 and 400 MHz BIOS settings result in the same register
      value is a little disappointing, as that means we can't tell them apart.
      However, according to the gmch datasheet for both elk and ctg 400 Mhz is
      not even a supported FSB frequency, so I'm going to make the assumption
      that we should decode it as 333 MHz instead.
      
      Cc: stable@vger.kernel.org
      Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
      Reported-by: default avatarTomi Sarvela <tomi.p.sarvela@intel.com>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100926Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170504181530.6908-1-ville.syrjala@linux.intel.comAcked-by: default avatarJani Nikula <jani.nikula@intel.com>
      Tested-by: default avatarTomi Sarvela <tomi.p.sarvela@intel.com>
      6f38123e
  2. 04 May, 2017 4 commits
  3. 03 May, 2017 22 commits
  4. 02 May, 2017 3 commits
  5. 01 May, 2017 1 commit
  6. 29 Apr, 2017 5 commits
  7. 28 Apr, 2017 4 commits
    • Dave Airlie's avatar
      Merge tag 'drm-intel-next-fixes-2017-04-27' of... · 73ba2d5c
      Dave Airlie authored
      Merge tag 'drm-intel-next-fixes-2017-04-27' of git://anongit.freedesktop.org/git/drm-intel into drm-next
      
      drm/i915 and gvt fixes for drm-next/v4.12
      
      * tag 'drm-intel-next-fixes-2017-04-27' of git://anongit.freedesktop.org/git/drm-intel:
        drm/i915: Confirm the request is still active before adding it to the await
        drm/i915: Avoid busy-spinning on VLV_GLTC_PW_STATUS mmio
        drm/i915/selftests: Allocate inode/file dynamically
        drm/i915: Fix system hang with EI UP masked on Haswell
        drm/i915: checking for NULL instead of IS_ERR() in mock selftests
        drm/i915: Perform link quality check unconditionally during long pulse
        drm/i915: Fix use after free in lpe_audio_platdev_destroy()
        drm/i915: Use the right mapping_gfp_mask for final shmem allocation
        drm/i915: Make legacy cursor updates more unsynced
        drm/i915: Apply a cond_resched() to the saturated signaler
        drm/i915: Park the signaler before sleeping
        drm/i915/gvt: fix a bounds check in ring_id_to_context_switch_event()
        drm/i915/gvt: Fix PTE write flush for taking runtime pm properly
        drm/i915/gvt: remove some debug messages in scheduler timer handler
        drm/i915/gvt: add mmio init for virtual display
        drm/i915/gvt: use directly assignment for structure copying
        drm/i915/gvt: remove redundant ring id check which cause significant CPU misprediction
        drm/i915/gvt: remove redundant platform check for mocs load/restore
        drm/i915/gvt: Align render mmio list to cacheline
        drm/i915/gvt: cleanup some too chatty scheduler message
      73ba2d5c
    • Dave Airlie's avatar
      Merge branch 'drm-vmwgfx-next' of git://people.freedesktop.org/~syeh/repos_linux into drm-next · 53cecf1b
      Dave Airlie authored
      trivial patch.
      
      * 'drm-vmwgfx-next' of git://people.freedesktop.org/~syeh/repos_linux:
        drm/vmwgfx: Convert macro to octal representation
      53cecf1b
    • Dave Airlie's avatar
      Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-next · 97643d75
      Dave Airlie authored
      Latest updates on Mali DP, adding support for colour management,
      plane scaling and power management.
      
      (these have been in -next for a while).
      
      * 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld:
        drm: mali-dp: use div_u64 for expensive 64-bit divisions
        drm: mali-dp: Check the mclk rate and allow up/down scaling
        drm: mali-dp: Enable image enhancement when scaling
        drm: mali-dp: Add plane upscaling support
        drm/mali-dp: Add core_id file to the sysfs interface
        drm: mali-dp: Add CTM support
        drm: mali-dp: enable gamma support
        drm: mali-dp: add malidp_crtc_state struct
        drm: mali-dp: add custom reset hook for planes
        drm: mali-dp: remove unused variable
        drm: mali-dp: add atomic_print_state for planes
        drm: mali-dp: Enable power management for the device.
        drm: mali-dp: Update the state of all planes before re-enabling active CRTCs.
      97643d75
    • Ander Conselvan de Oliveira's avatar
      drm/i915/glk: Fix DSI "*ERROR* ULPS is still active" messages · 3acbec03
      Ander Conselvan de Oliveira authored
      The sequence in glk_dsi_device_ready() enters ULPS then waits until it is
      *not* active to then disable it. The correct sequence according to the
      spec is to enter ULPS then wait until the GLK_ULPS_NOT_ACTIVE bit is
      zero, i.e., ULPS is active, and then disable ULPS.
      
      Fixing the condition gets rid of the following spurious error messages:
      
      [drm:glk_dsi_device_ready [i915]] *ERROR* ULPS is still active
      
      Fixes: 46448483 ("drm/i915/glk: Add MIPIIO Enable/disable sequence")
      Cc: Deepak M <m.deepak@intel.com>
      Cc: Madhav Chauhan <madhav.chauhan@intel.com>
      Cc: Jani Nikula <jani.nikula@intel.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: intel-gfx@lists.freedesktop.org
      Cc: <drm-intel-fixes@lists.freedesktop.org>
      Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
      Reviewed-by: default avatarMadhav Chauhan <madhav.chauhan@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170428080222.6147-1-ander.conselvan.de.oliveira@intel.com
      3acbec03