- 01 Jun, 2017 37 commits
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LABBE Corentin authored
The dwmac-sun8i hardware is present on the NanoPi Neo. It uses the internal PHY. This patch create the needed emac node. Signed-off-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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LABBE Corentin authored
On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet port were changed from active low to active high. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
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LABBE Corentin authored
The dwmac-sun8i hardware is present on the Orange PI 2. It uses the internal PHY. This patch create the needed emac node. Signed-off-by:
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LABBE Corentin authored
The dwmac-sun8i hardware is present on the Orange PI One. It uses the internal PHY. This patch create the needed emac node. Signed-off-by:
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LABBE Corentin authored
The dwmac-sun8i hardware is present on the Orange PI Zero. It uses the internal PHY. This patch create the needed emac node. Signed-off-by:
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LABBE Corentin authored
The dwmac-sun8i hardware is present on the Orange PI PC. It uses the internal PHY. This patch create the needed emac node. Signed-off-by:
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LABBE Corentin authored
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed. This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree. SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. Signed-off-by:
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LABBE Corentin authored
This patch add the dt node for the syscon register present on the Allwinner H3/H5 Only two register are present in this syscon and the only one useful is the one dedicated to EMAC clock.. Signed-off-by:
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LABBE Corentin authored
The dwmac-sun8i is a heavy hacked version of stmmac hardware by allwinner. In fact the only common part is the descriptor management and the first register function. Signed-off-by:
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LABBE Corentin authored
This patch adds documentation for Device-Tree bindings for the syscon present in allwinner devices. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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LABBE Corentin authored
This patch adds documentation for Device-Tree bindings for the Allwinner dwmac-sun8i driver. Signed-off-by:
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LABBE Corentin authored
Instead of adding more ifthen logic for adding a new mac_device_info setup function, it is easier to add a function pointer to the function needed. Signed-off-by:
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LABBE Corentin authored
Thoses symbol will be needed for the dwmac-sun8i ethernet driver. For letting it to be build as module, they need to be exported. Signed-off-by:
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Stephen Rothwell authored
asm-generic/socket.h already has an exception for the differences that powerpc needs, so just include it after defining the differences. Signed-off-by:
Stephen Rothwell <sfr@canb.auug.org.au> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Yotam Gigi authored
Add callback to the ethtool flash_device op. This callback uses the mlxfw module to flash the new firmware file to the device. As the firmware flash process takes about 20 seconds and ethtool takes the rtnl lock during the flash_device callback, release the rtnl lock at the beginning of the flash process and take it again before leaving the callback. This way, the rtnl is not held during the process. To make sure the device does not get deleted during the flash process, take a reference to it before releasing the rtnl lock. Signed-off-by:
Yotam Gigi <yotamg@mellanox.com> Reviewed-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
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David S. Miller authored
Yuval Mintz says: ==================== qed: Status block changes The device maintains a CAM mapping of the internal status blocks and the various PF/VF MSI-x vector mappings. During initialization, the driver reads the HW memory and constructs a shadow SW implementation which it would later use for manipulation of interrupts. E.g., when enabling VFs and setting their MSI-x tables. The driver currently has some very strict assumptions on the order the entries are placed in the CAM. Specifically, it assumes that all entries belonging to a PF would be consecutive and in-order in the CAM, and that the VF entries would then follow. But there's no actual HW constraint enforcing this assumption [although management firmware does set it accordingly to same assumption initially]. Since the CAM is re-configurable, there are now SW flows employeed by other OSes that might cause the assumption to be invalid. Such flows allow the PF to forfeit some of it's available interrupts in favor of its VFs or vice versa. While those are not employeed today by qed, we want to relax the assumptions as much as we can - both to allow functionality after PDA as well as allowing future compatibility where the driver would be loaded after a newer one has 'dirtied' the CAM configuration. In addition to patches meant for the above relaxation, the series also contains various cleanups & refactoring for interrupt logic [most of which is !semantic]. ==================== Signed-off-by: -
Mintz, Yuval authored
Since we're resetting the IGU CAM each time we initialize the PF device, there's no need to reset the VF SBs again when initializing IOV. Signed-off-by:
Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by:
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Mintz, Yuval authored
The IGU CAM contains an assocaition between hardware SBs and interrupt lines, and it can be dynamically configured to allow more interrupts in one entity over another, specifically for Re-distibution of SBs between a PF and its child VFs. While we don't yet use this functionality, there are other clients that do and as such its possible the information passed from management firmware during initialization in regard to the possible number of SBs doesn't accurately reflect the current HW configuration. The following changes are going to apply to the driver init sequence: a. PF is going to re-configure all entries belonging to itself and its child VFs in IGU CAM based on the management firmware info regarding the number of SBs that are supposed to exist there. b. PF is going to stop using the SB resource [management firmware provided information] for anything but the initialization. Instead, it would use the live-time counters it maintains for the numbers. Signed-off-by: -
Mintz, Yuval authored
A PF today holds 2 different arrays - one holding information about the HW configuration and one holding information about the SBs that are used by the protocol drivers. These arrays aren't really connected - e.g., protocol driver initializing a given SB would not mark the same SB as occupied in the HW shadow array. Move into a single array [at least for PFs] - hold the mapping of the driver-protocol SBs on the HW entry which they configure. Signed-off-by:
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Mintz, Yuval authored
IOV code is very intrusive in its manipulation of the status block database. Add a new auxiliary function to allow the PF to find an available unused status block to configure for a specific VF's MSI-x vector. Signed-off-by:
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Mintz, Yuval authored
Current code assumes there's a known layout for SBs in the IGU, where all the SBs of a single entity would be laid in consecutive order of vectors. While the assumption is still kept by management firmware, we already have the necessary information to eliminate it, so no reason to keep it in code. Signed-off-by:
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Mintz, Yuval authored
We already have an API struct that contains interrupt-related numbers. Use it to encapsulate all information relating to the status of SBs as (used|free). Signed-off-by:
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Mintz, Yuval authored
An additional step for relaxing the IGU order assumption, we now add an auxiliary function that can be used for finding the HW status block that's associated with a given MSI-x vector. Signed-off-by:
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Mintz, Yuval authored
In qed code, sb_id means 2 different things: - An interrupt vector [usually when received as a parameter from a protocol driver, but not only] that's associated with a status block. - An index to a status block entity existing in HW. This patch renames the references to the HW entity, adding an 'igu_' prefix to allow an easier distinction. Signed-off-by: -
Mintz, Yuval authored
As a first step for relaxing various assumptions done by driver about the IGU mapping, the driver is now going to read the entire IGU into a shadow copy, and mark in its database each status block that's relevant for it. Signed-off-by:
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Mintz, Yuval authored
Separate the portions controlling interrupt enablement form those controlling the ability of HW to generate attentions. Signed-off-by:
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Mintz, Yuval authored
Signed-off-by:
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Colin Ian King authored
function ksz_rcv can be made static as it does not need to be in global scope. Reformat arguments to make it checkpatch warning free too. Cleans up sparse warning: "symbol 'ksz_rcv' was not declared. Should it be static?" Signed-off-by:
Colin Ian King <colin.king@canonical.com> Reviewed-by:
Woojung Huh <Woojung.Huh@microchip.com> Signed-off-by:
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Gao Feng authored
Since the commit 55454a56 ("ppp: avoid dealock on recursive xmit"), the PPP xmit path is protected by wrapper functions which disable the bh already. So it is unnecessary to disable the bh again in the real xmit path. Signed-off-by:
Gao Feng <gfree.wind@vip.163.com> Acked-by:
Guillaume Nault <g.nault@alphalink.fr> Signed-off-by:
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Roopa Prabhu authored
recent updates to inet_rtm_getroute dropped skb_dst_set in inet_rtm_getroute. This patch restores it because it is needed to release the dst correctly. Fixes: 3765d35e ("net: ipv4: Convert inet_rtm_getroute to rcu versions of route lookup") Reported-by:
John Fastabend <john.fastabend@gmail.com> Signed-off-by:
David Ahern <dsahern@gmail.com> Signed-off-by:
Roopa Prabhu <roopa@cumulusnetworks.com> Signed-off-by:
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David S. Miller authored
Signed-off-by: -
David S. Miller authored
Woojung Huh says: ==================== dsa: add Microchip KSZ9477 DSA driver This series of patches is for Microchip KSZ9477 DSA driver. KSZ9477 is 7 ports GigE switch with numerous advanced features. 5 ports are 10/100/1000 Mbps internal PHYs and 2 ports have Interfaces to SGMII, RGMII, MII or RMII. This patch supports VLAN, MDB, FDB and port mirroring offloads. Welcome reviews and comments from community. Note: Tests are performed on internal development board. V5 - add missing MODULE_LICENSE V4 - update per review comments - cosmetic changes - net/dsa/tag_ksz.c * skb_put() & memset() are changed to skb_put_padto() - drivers/net/dsa/microchip/ksz_common. * vlan access mutex is updated * mib_names[] is changed to static const V3 - update per review comments - cosmetic changes - drivers/net/dsa/microchip/ksz_common.c * clean up ksz_switch_chips[] * consolidate checking loops into functions * update mutex for better locking * replace devm_kmalloc_array() to devm_kcalloc() - MAINTAINERS * add missing net/dsa/tag_ksz.c V2 - update per review comments - several cosmetic changes - net/dsa/tag_ksz.c * constants are changed to defines * remove skb_linearize() in ksz_rcv() * ksz_xmit()checks skb tailroom before allocate new skb - drivers/net/phy/micrel.c * remove PHY_HAS_MAGICANEG from ksphy_driver[] - drivers/net/dsa/microchip/ksz_common.c * add timeout to avoid endless loop * port initialization is move to ksz_port_enable() instead of ksz_setup_ports() - Documentation/devicetree/bindings/net/dsa/ksz.txt * fix typo and indentations ==================== Signed-off-by: -
Woojung Huh authored
Adding maintainer of Microchip KSZ switches. Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Woojung Huh authored
A sample SPI configuration for Microchip KSZ switches. Reviewed-by:
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Woojung Huh authored
The KSZ9477 is a fully integrated layer 2, managed, 7 ports GigE switch with numerous advanced features. 5 ports incorporate 10/100/1000 Mbps PHYs. The other 2 ports have interfaces that can be configured as SGMII, RGMII, MII or RMII. Either of these may connect directly to a host processor or to an external PHY. The SGMII port may interface to a fiber optic transceiver. This driver currently supports vlan, fdb, mdb & mirror dsa switch operations. Reviewed-by:
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Woojung Huh authored
Adding Microchip 9477 Phy included in KSZ9477 Switch. Reviewed-by:
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Woojung Huh authored
Adding support for the Microchip KSZ switch family tail tagging. Reviewed-by:
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- 31 May, 2017 3 commits
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David S. Miller authored
Alexei Starovoitov says: ==================== bpf: stack depth tracking Introduce tracking of bpf program stack depth in the verifier and use that info to reduce bpf program stack consumption in the interpreter and x64 JIT. Other JITs can take advantage of it as well in the future. Most of the programs consume very little stack, so it's good optimization in general and it's the first step toward bpf to bpf function calls. Also use internal opcode for bpf_tail_call() marking to make clear that jmp|call|x opcode is not uapi and may be used for actual indirect call opcode in the future. ==================== Signed-off-by: -
Alexei Starovoitov authored
Take advantage of stack_depth tracking in x64 JIT. Round up allocated stack by 8 bytes to make sure it stays aligned for functions called from JITed bpf program. Signed-off-by:
Alexei Starovoitov <ast@kernel.org> Acked-by:
Daniel Borkmann <daniel@iogearbox.net> Signed-off-by:
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Alexei Starovoitov authored
in order to JIT programs with different stack sizes we need to make epilogue and exception path to be stack size independent, hence move auxiliary stack space from the bottom of the stack to the top of the stack. Nice side effect is that JITed function prologue becomes shorter due to imm8 offset encoding vs imm32. Signed-off-by:
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