- Drop unused struct pci_driver.node member (Mathias Krause)

- Fix documentation typos (Attreyee Mukherjee)

- Use a unique test pattern for each BAR in the pci_endpoint_test to make
  it easier to debug address translation issues (Niklas Cassel)

- Fix kernel-doc issues (Bjorn Helgaas)

* pci/misc:
  PCI: Fix kernel-doc issues
  misc: pci_endpoint_test: Use a unique test pattern for each BAR
  docs: PCI: Fix typos
  PCI: Remove unused 'node' member from struct pci_driver

- Increase qcom iommu-map maxItems to accommodate SDX55 (five entries) and
  SDM845 (sixteen entries) (Krzysztof Kozlowski)

- Describe qcom,pcie-sc8180x clocks and resets accurately (Krzysztof
  Kozlowski)

- Describe qcom,pcie-sm8150 clocks and resets accurately (Krzysztof
  Kozlowski)

- Correct the qcom "reset-name" property, previously incorrectly called
  "reset-names" (Krzysztof Kozlowski)

- Document rockchip optional PCIe reference clock input (Heiko Stuebner)

- Document qcom,pcie-sm8650, based on qcom,pcie-sm8550 (Neil Armstrong)

* pci/dt-bindings:
  dt-bindings: PCI: qcom: Document the SM8650 PCIe Controller
  dt-bindings: PCI: dwc: rockchip: Document optional PCIe reference clock input
  dt-bindings: PCI: qcom: Correct reset-names property
  dt-bindings: PCI: qcom: Correct clocks for SM8150
  dt-bindings: PCI: qcom: Correct clocks for SC8180x
  dt-bindings: PCI: qcom: Adjust iommu-map for different SoC

- In dw-xdata-pcie, pci_endpoint_test, and vmd, replace usage of deprecated
  ida_simple_*() API with ida_alloc() and ida_free() (Christophe JAILLET)

* pci/remove-old-api:
  dw-xdata: Remove usage of the deprecated ida_simple_*() API
  misc: pci_endpoint_test: Remove usage of the deprecated ida_simple_*() API
  PCI: vmd: Remove usage of the deprecated ida_simple_*() API

- Make struct pci_epc_event_ops and struct pci_epf_ops instances const
  (Lars-Peter Clausen)

* pci/endpoint:
  PCI: endpoint: pci-epf-test: Make struct pci_epf_ops const
  PCI: endpoint: pci-epf-vntb: Make struct pci_epf_ops const
  PCI: endpoint: pci-epf-ntb: Make struct pci_epf_ops const
  PCI: endpoint: pci-epf-mhi: Make structs pci_epf_ops and pci_epf_event_ops const
  PCI: endpoint: Make struct pci_epf_ops in pci_epf_driver const

- Rename PCI_IRQ_LEGACY to PCI_IRQ_INTX to be more explicit and match spec
  terminology (Bjorn Helgaas)

- Use existing PCI_IRQ_INTX, PCI_IRQ_MSI, PCI_IRQ_MSIX in artpec6, cadence,
  designware, designware-plat, dra7xx, imx6, keembay, keystone, layerscape,
  mhi, ntb, qcom, rcar, rcar-gen4, rockchip, tegra194, uniphier, vntb; drop
  the redundant pci_epc_irq_type enum with the same values (Damien Le Moal)

- Use "intx" instead of "leg" or "legacy" when describing INTx interrupts
  in endpoint core, endpoint tests, cadence, dra7xx, designware,
  dw-rockchip, dwc core, imx6, keystone, layerscape, qcom, rcar-gen4,
  rockchip, tegra194, uniphier, xilinx-nwl (Damien Le Moal)

* pci/irq-clean-up:
  PCI: xilinx-nwl: Use INTX instead of legacy
  PCI: rockchip-host: Rename rockchip_pcie_legacy_int_handler()
  PCI: rockchip-ep: Use INTX instead of legacy
  PCI: uniphier: Use INTX instead of legacy
  PCI: tegra194: Use INTX instead of legacy
  PCI: dw-rockchip: Rename rockchip_pcie_legacy_int_handler()
  PCI: keystone: Use INTX instead of legacy
  PCI: dwc: Rename dw_pcie_ep_raise_legacy_irq()
  PCI: cadence: Use INTX instead of legacy
  PCI: dra7xx: Rename dra7xx_pcie_raise_legacy_irq()
  misc: pci_endpoint_test: Use INTX instead of LEGACY
  PCI: endpoint: Rename LEGACY to INTX in test function driver
  PCI: endpoint: Use INTX instead of legacy
  PCI: endpoint: Drop PCI_EPC_IRQ_XXX definitions
  PCI: Rename PCI_IRQ_LEGACY to PCI_IRQ_INTX

- Convert exynos, keystone, kirin from .remove() to .remove_new(), which
  returns void instead of int (Uwe Kleine-König)

* pci/controller/remove-void-return:
  PCI: kirin: Convert to platform remove callback returning void
  PCI: keystone: Convert to platform remove callback returning void
  PCI: exynos: Convert to platform remove callback returning void

- Remove redundant dev_err(), since platform_get_irq() and
  platform_get_irq_byname() already log errors (Yang Li)

- Fix uninitialized symbols in xilinx_pl_dma_pcie_setup_irq() (Krzysztof
  Wilczyński)

- Fix xilinx_pl_dma_pcie_init_irq_domain() error return when
  irq_domain_add_linear() fails (Harshit Mogalapalli)

* pci/controller/xilinx:
  PCI: xilinx-xdma: Fix error code in xilinx_pl_dma_pcie_init_irq_domain()
  PCI: xilinx-xdma: Fix uninitialized symbols in xilinx_pl_dma_pcie_setup_irq()
  PCI: xilinx-xdma: Remove redundant dev_err()

- Use ida_alloc() instead of deprecated ida_simple_get() (Christophe JAILLET)

* pci/controller/vmd:
  PCI: vmd: Remove usage of the deprecated ida_simple_xx() API

- Replace of_device.h with explicit of.h include to untangle header usage
  (Rob Herring)

- Add DT and driver support for optional miniPCIe 1.5v and 3.3v regulators
  on KingFisher (Wolfram Sang)

* pci/controller/rcar:
  PCI: rcar-host: Add support for optional regulators
  dt-bindings: PCI: rcar-pci-host: Add optional regulators
  PCI: rcar-gen4: Replace of_device.h with explicit of.h include

- Clear MSI interrupt status before handler to avoid missing MSIs that
  occur after the handler (qizhong cheng)

- Update mediatek-gen3 translation window setup to handle MMIO space that
  is not a power of two in size (Jianjun Wang)

* pci/controller/mediatek:
  PCI: mediatek-gen3: Fix translation window size calculation
  PCI: mediatek: Clear interrupt status before dispatching handler

- Add suspend/resume support for Layerscape LS1043a, including
  software-managed PME_Turn_Off and transitions between L0, L2/L3_Ready
  Link states (Frank Li)

* pci/controller/layerscape:
  PCI: layerscape: Add suspend/resume for ls1043a
  PCI: layerscape(ep): Rename pf_* as pf_lut_*
  PCI: layerscape: Add suspend/resume for ls1021a
  PCI: layerscape: Add function pointer for exit_from_l2()

- Use devm_kasprintf() to dynamically allocate clock names, removing need
  for an intermediate buffer (Christophe JAILLET)

* pci/controller/kirin:
  PCI: kirin: Use devm_kasprintf() to dynamically allocate clock names

- Hold power management references to all PHYs while enabling them to avoid
  a race when one provides clocks to others (Siddharth Vadapalli)

* pci/controller/keystone:
  PCI: keystone: Fix race condition when initializing PHYs

- Convert fu740 CONFIG_PCIE_FU740 dependency from SOC_SIFIVE to ARCH_SIFIVE
  (Conor Dooley)

- Align iATU mapping for endpoint MSI-X (Niklas Cassel)

- Drop "host_" prefix from struct dw_pcie_host_ops members (Yoshihiro
  Shimoda)

- Drop "ep_" prefix from struct dw_pcie_ep_ops members (Yoshihiro Shimoda)

- Rename struct dw_pcie_ep_ops.func_conf_select() to .get_dbi_offset() to
  be more descriptive (Yoshihiro Shimoda)

- Add Endpoint DBI accessors to encapsulate offset lookups (Yoshihiro
  Shimoda)

- Cast iproc and rcar-gen4 of_device_get_match_data() results to uintptr_t
  to avoid clang "cast to smaller integer type" warnings (Justin Stitt,
  Yoshihiro Shimoda)

* pci/controller/dwc:
  PCI: rcar-gen4: Fix -Wvoid-pointer-to-enum-cast error
  PCI: iproc: Fix -Wvoid-pointer-to-enum-cast warning
  PCI: dwc: Add dw_pcie_ep_{read,write}_dbi[2] helpers
  PCI: dwc: Rename .func_conf_select to .get_dbi_offset in struct dw_pcie_ep_ops
  PCI: dwc: Rename .ep_init to .init in struct dw_pcie_ep_ops
  PCI: dwc: Drop host prefix from struct dw_pcie_host_ops members
  PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support
  PCI: dwc: Convert SOC_SIFIVE to ARCH_SIFIVE

- Add j721e DT and driver support for 'num-lanes' for devices that support
  x1, x2, or x4 Links (Matt Ranostay)

- Add j721e DT compatible strings and driver support for j784s4 (Matt Ranostay)

- Make TI J721E Kconfig depend on ARCH_K3 since the hardware is specific to
  those TI SoC parts (Peter Robinson)

* pci/controller/cadence:
  PCI: j721e: Make TI J721E depend on ARCH_K3
  PCI: j721e: Add TI J784S4 PCIe configuration
  PCI: j721e: Add PCIe 4x lane selection support
  PCI: j721e: Add per platform maximum lane settings
  dt-bindings: PCI: ti,j721e-pci-*: Add j784s4-pci-* compatible strings
  dt-bindings: PCI: ti,j721e-pci-*: Add checks for num-lanes

- Add DT property "brcm,clkreq-mode" and driver support for different
  CLKREQ# modes (Jim Quinlan)

* pci/controller/broadcom:
  PCI: brcmstb: Configure HW CLKREQ# mode appropriate for downstream device
  dt-bindings: PCI: brcmstb: Add property "brcm,clkreq-mode"

- Add ACS quirk for more Zhaoxin Root Ports (LeoLiuoc)

* pci/virtualization:
  PCI: Add ACS quirk for more Zhaoxin Root Ports

- Do dma_mrpc cleanup during switchtec_pci_remove() to match its devm
  ioremapping in switchtec_pci_probe().  Previously the cleanup was done in
  stdev_release(), which used stale pointers if stdev->cdev happened to be
  open when the PCI device was removed (Daniel Stodden)

* pci/switchtec:
  PCI: switchtec: Fix stdev_release() crash after surprise hot remove

- Restructure pci_dev_for_each_resource() to avoid computing the address of
  an out-of-bounds array element (the bounds check was performed later so
  the element was never actually *read*, but it's nicer to avoid even
  computing an out-of-bounds address) (Andy Shevchenko)

* pci/resource:
  PCI: Avoid potential out-of-bounds read in pci_dev_for_each_resource()

- Remove documentation for obsolete pci_p2pdma_map_sg() (Tadeusz Struk)

* pci/p2pdma:
  PCI/P2PDMA: Remove reference to pci_p2pdma_map_sg()

- Log device type (Root Port, Switch Port, etc) during enumeration (Bjorn
  Helgaas)

- Log resource names (BAR 0, VF BAR 0, bridge window, etc) consistently
  instead of a mix of names and "reg 0x10" (Puranjay Mohan, Bjorn Helgaas)

- Log bridges before devices below the bridges (Bjorn Helgaas)

* pci/enumeration-logging:
  PCI: Log bridge info when first enumerating bridge
  PCI: Log bridge windows conditionally
  PCI: Supply bridge device, not secondary bus, to read window details
  PCI: Move pci_read_bridge_windows() below individual window accessors
  PCI: Use resource names in PCI log messages
  PCI: Update BAR # and window messages
  PCI: Log device type during enumeration

- Convert pci-host-common.c platform .remove() callback to .remove_new()
  returning 'void' since it's not useful to return error codes here (Uwe
  Kleine-König)

- Log a message about updating AMD USB controller class code (so dwc3, not
  xhci, claims it) only when we actually change it (Guilherme G.  Piccoli)

- Use PCI_HEADER_TYPE_* instead of literals in x86, powerpc, SCSI lpfc
  (Ilpo Järvinen)

- Clean up open-coded PCIBIOS return code mangling (Ilpo Järvinen)

- Fix 64GT/s effective data rate calculation to use 1b/1b encoding rather
  than the 8b/10b or 128b/130b used by lower rates (Ilpo Järvinen)

* pci/enumeration:
  PCI: Fix 64GT/s effective data rate calculation
  x86/pci: Clean up open-coded PCIBIOS return code mangling
  scsi: lpfc: Use PCI_HEADER_TYPE_MFD instead of literal
  powerpc/fsl-pci: Use PCI_HEADER_TYPE_MASK instead of literal
  x86/pci: Use PCI_HEADER_TYPE_* instead of literals
  PCI: Only override AMD USB controller if required
  PCI: host-generic: Convert to platform remove callback returning void

- Reserve ECAM if BIOS didn't include it in PNP0C02 _CRS (Bjorn Helgaas)

- Add MMCONFIG/ECAM debug logging (Bjorn Helgaas)

- Rename 'MMCONFIG' to 'ECAM' to match spec usage (Bjorn Helgaas)

* pci/ecam:
  x86/pci: Reorder pci_mmcfg_arch_map() definition before calls
  x86/pci: Return pci_mmconfig_add() failure early
  x86/pci: Comment pci_mmconfig_insert() obscure MCFG dependency
  x86/pci: Rename pci_mmcfg_check_reserved() to pci_mmcfg_reserved()
  x86/pci: Rename acpi_mcfg_check_entry() to acpi_mcfg_valid_entry()
  x86/pci: Rename 'MMCONFIG' to 'ECAM', use pr_fmt
  x86/pci: Add MCFG debug logging
  x86/pci: Reword ECAM EfiMemoryMappedIO logging to avoid 'reserved'
  x86/pci: Reserve ECAM if BIOS didn't include it in PNP0C02 _CRS

- Log AER errors as "Correctable" (not "Corrected") or "Uncorrectable" to
  match spec terminology (Bjorn Helgaas)

- Decode Requester ID when no error info found instead of printing the raw
  hex value (Bjorn Helgaas)

* pci/aer:
  PCI/AER: Use explicit register sizes for struct members
  PCI/AER: Decode Requester ID when no error info found
  PCI/AER: Use 'Correctable' and 'Uncorrectable' spec terms for errors

Fix kernel-doc issues reported by
"find include -name \*pci\* | xargs scripts/kernel-doc -none":

  include/linux/pci.h:731: warning: Function parameter or member 'pdev' not described in 'pci_is_vga'
  include/linux/pci-epc.h:154: warning: Function parameter or member 'list_lock' not described in 'pci_epc'
  include/linux/pci-epf.h:83: warning: expecting prototype for struct pci_epf_event_ops. Prototype was for struct pci_epc_event_ops instead

Link: https://lore.kernel.org/r/20240111162850.2177655-1-helgaas@kernel.orgTested-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Acked-by: Sui Jingfeng <suijingfeng@loongson.cn>

The Broadcom STB/CM PCIe HW core, which is also used in RPi SOCs, must be
deliberately set by the PCIe RC HW into one of three mutually exclusive
modes:

"safe" -- No CLKREQ# expected or required, refclk is always provided.  This
    mode should work for all devices but is not be capable of any refclk
    power savings.

"no-l1ss" -- CLKREQ# is expected to be driven by the downstream device for
    CPM and ASPM L0s and L1.  Provides Clock Power Management, L0s, and L1,
    but cannot provide L1 substate (L1SS) power savings. If the downstream
    device connected to the RC is L1SS capable AND the OS enables L1SS, all
    PCIe traffic may abruptly halt, potentially hanging the system.

"default" -- Bidirectional CLKREQ# between the RC and downstream device.
    Provides ASPM L0s, L1, and L1SS, but not compliant to provide Clock
    Power Management; specifically, may not be able to meet the T_CLRon max
    timing of 400ns as specified in "Dynamic Clock Control", section
    3.2.5.2.2 of the PCIe Express Mini CEM 2.1 specification.  This
    situation is atypical and should happen only with older devices.

Previously, this driver always set the mode to "no-l1ss", as almost all
STB/CM boards operate in this mode.  But now there is interest in
activating L1SS power savings from STB/CM customers, which requires "aspm"
mode.  In addition, a bug was filed for RPi4 CM platform because most
devices did not work in "no-l1ss" mode.

Note that the mode is specified by the DT property "brcm,clkreq-mode".  If
this property is omitted, then "default" mode is chosen.

Note: Since L1 substates are now possible, a modification was made
regarding an internal bus timeout: During long periods of the PCIe RC HW
being in an L1SS sleep state, there may be a timeout on an internal bus
access, even though there may not be any PCIe access involved.  Such a
timeout will cause a subsequent CPU abort.

Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217276
Link: https://lore.kernel.org/linux-pci/20231113185607.1756-3-james.quinlan@broadcom.comTested-by: Cyril Brulebois <cyril@debamax.com>
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

The Broadcom STB/CM PCIe HW -- a core that is also used by RPi SOCs --
requires the driver to deliberately place the RC HW one of three CLKREQ#
modes.  The "brcm,clkreq-mode" property allows the user to override the
default setting.  If this property is omitted, the default mode shall be
"default".

Link: https://lore.kernel.org/linux-pci/20231113185607.1756-2-james.quinlan@broadcom.comTested-by: Cyril Brulebois <cyril@debamax.com>
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>

When using the fls() helper, the translation table should be a power of
two; otherwise, the resulting value will not be correct.

For example, given fls(0x3e00000) - 1 = 25, the PCIe translation window
size will be set to 0x2000000 instead of the expected size 0x3e00000.

Fix the translation window by splitting the MMIO space into multiple tables
if its size is not a power of two.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231023081423.18559-1-jianjun.wang@mediatek.com
Fixes: d3bf75b5 ("PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192")
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

We found a failure when using the iperf tool during WiFi performance
testing, where some MSIs were received while clearing the interrupt
status, and these MSIs cannot be serviced.

The interrupt status can be cleared even if the MSI status remains pending.
As such, given the edge-triggered interrupt type, its status should be
cleared before being dispatched to the handler of the underling device.

[kwilczynski: commit log, code comment wording]
Link: https://lore.kernel.org/linux-pci/20231211094923.31967-1-jianjun.wang@mediatek.com
Fixes: 43e6409d ("PCI: mediatek: Add MSI support for MT2712 and MT7622")
Signed-off-by: qizhong cheng <qizhong.cheng@mediatek.com>
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
[bhelgaas: rewrap comment]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc:  <stable@vger.kernel.org>

The PCI driver invokes the PHY APIs using the ks_pcie_enable_phy()
function. The PHY in this case is the Serdes. It is possible that the
PCI instance is configured for two lane operation across two different
Serdes instances, using one lane of each Serdes.

In such a configuration, if the reference clock for one Serdes is
provided by the other Serdes, it results in a race condition. After the
Serdes providing the reference clock is initialized by the PCI driver by
invoking its PHY APIs, it is not guaranteed that this Serdes remains
powered on long enough for the PHY APIs based initialization of the
dependent Serdes. In such cases, the PLL of the dependent Serdes fails
to lock due to the absence of the reference clock from the former Serdes
which has been powered off by the PM Core.

Fix this by obtaining reference to the PHYs before invoking the PHY
initialization APIs and releasing reference after the initialization is
complete.

Link: https://lore.kernel.org/linux-pci/20230927041845.1222080-1-s-vadapalli@ti.com
Fixes: 49229238 ("PCI: keystone: Cleanup PHY handling")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>

Currently, if the function irq_domain_add_linear() fails to allocate
a new IRQ domain and returns NULL, we would then still return a success
from the xilinx_pl_dma_pcie_init_irq_domain() function regardless, as
the PTR_ERR(NULL) would return a value of zero.  This is not a desirable
outcome.

Thus, fix the incorrect error code and return the -ENOMEM error code if
the irq_domain_add_linear() fails to allocate a new IRQ domain.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231030072757.3236546-1-harshit.m.mogalapalli@oracle.com
Fixes: 8d786149 ("PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver")
Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

The error paths that follow calls to the devm_request_irq() functions
within the xilinx_pl_dma_pcie_setup_irq() reference an uninitialized
symbol each that also so happens to be incorrect.

Thus, fix this omission and reference the correct variable when invoking
a given dev_err() function following an error.

This problem was found using smatch via the 0-DAY CI Kernel Test service:

  drivers/pci/controller/pcie-xilinx-dma-pl.c:638 xilinx_pl_dma_pcie_setup_irq() error: uninitialized symbol 'irq'.
  drivers/pci/controller/pcie-xilinx-dma-pl.c:645 xilinx_pl_dma_pcie_setup_irq() error: uninitialized symbol 'irq'.

Fixes: 8d786149 ("PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver")
Link: https://lore.kernel.org/oe-kbuild/202312120248.5DblxkBp-lkp@intel.com/Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/r/202312120248.5DblxkBp-lkp@intel.com/Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

When building with clang 18 with the -Werror compiler option enabled,
the following error will be reported:

  drivers/pci/controller/dwc/pcie-rcar-gen4.c:439:15: error: cast to smaller integer type 'enum dw_pcie_device_mode' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast]
    439 |         rcar->mode = (enum dw_pcie_device_mode)of_device_get_match_data(&rcar->pdev->dev);

To fix this issue, cast the data the of_device_get_match_data() helper
returns to uintptr_t rather than the dw_pcie_device_mode enum.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231220053829.1921187-7-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

When building with clang 18, the following warning will be reported:

  drivers/pci/controller/pcie-iproc-platform.c:54:15: warning: cast to smaller integer type 'enum iproc_pcie_type' from 'const void *' [-Wvoid-pointer-to-enum-cast]
     55 |         pcie->type = (enum iproc_pcie_type) of_device_get_match_data(dev);

To fix this issue, cast the data the of_device_get_match_data() helper
returns to uintptr_t rather than the iproc_pcie_type enum.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231220053829.1921187-6-yoshihiro.shimoda.uh@renesas.com
Link: https://github.com/ClangBuiltLinux/linux/issues/1910Reported-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Justin Stitt <justinstitt@google.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

The current code calculated some dbi[2] registers' offset by calling
dw_pcie_ep_get_dbi[2]_offset() in each function. To improve the code
readability, add dw_pcie_ep_{read,write}_dbi[2} and some data-width
related helpers.

Link: https://lore.kernel.org/linux-pci/20231220053829.1921187-5-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

Since the struct member .func_conf_select makes the intentions behind it
difficult to ascertain from its name alone, rename it to .get_dbi_offset
to make the intended usage more obvious.

[kwilczynski: commmit log]
Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/linux-pci/20231220053829.1921187-4-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

Since the name of the dw_pcie_ep_ops struct makes it obvious that it's
for the PCIe Endpoint, rename the struct member .ep_init to .init.

[kwilczynski: commit log]
Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/linux-pci/20231220053829.1921187-3-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Srikanth Thokala <srikanth.thokala@intel.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>

Since the name of the dw_pcie_host_ops struct makes it obvious that it's
for the PCIe Host, drop the host prefix from the struct members.

[kwilczynski: commit log]
Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/linux-pci/20231220053829.1921187-2-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Lei Chuanhua <lchuanhua@maxlinear.com>
Acked-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

Use a unique test pattern for each BAR in. This makes it easier to
detect/debug address translation issues, since a developer can dump
the backing memory on the EP side, using e.g. devmem, to verify that
the address translation for each BAR is actually correct.

Link: https://lore.kernel.org/linux-pci/20231215105952.1531683-1-nks@flawful.orgSigned-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

The J721E PCIe is hardware specific to TI SoC parts so add a dependency
on that so it's available for those SoC parts and for compile testing but
not necessarily everyone who enables the Cadence PCIe controller.

Link: https://lore.kernel.org/linux-pci/20240104213910.1426843-1-pbrobinson@gmail.comSigned-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>