- 30 Aug, 2016 9 commits
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Jon Hunter authored
On Tegra124/132 the pins for I2C6 are shared with the Display Port AUX (DPAUX) channel and on Tegra210 the pins for I2C4 and I2C6 are shared with DPAUX1 and DPAUX0, respectively. The multiplexing of the pins is handled by a register in the DPAUX and so the Tegra DPAUX driver has been updated to register a pinctrl device for managing these pins. The pins for these particular I2C devices are bound to the I2C device prior to probing. However, these I2C devices are in a different power partition to the DPAUX devices that own the pins. Hence, it is desirable to place the pins in the 'idle' state and allow the DPAUX power partition to switch off, when these I2C devices is not in use. Therefore, add calls to place the I2C pins in the 'default' and 'idle' states when the I2C device is runtime resumed and suspended, respectively. Please note that the pinctrl functions that set the state of the pins check to see if the devices has pins associated and will return zero if they do not. Therefore, it is safe to call these pinctrl functions even for I2C devices that do not have any pins associated. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jon Hunter authored
Update the Tegra I2C driver to use runtime PM and move the code in the tegra_i2c_clock_enable/disable() functions to the PM runtime resume and suspend callbacks, respectively. Note that given that CONFIG_PM is not mandatory for Tegra, if CONFIG_PM is not enabled and so runtime PM is not enabled, ensure that the I2C clocks are turned on during probe and kept on by calling the resume callback directly. In the function tegra_i2c_init(), the variable 'err' does not need to be initialised to zero in tegra_i2c_init() because it is initialised when pm_runtime_get_sync() is called. Furthermore, to ensure we only return 0 from tegra_i2c_init(), it is necessary to re-initialise 'err' to 0 after a successful call to pm_runtime_get_sync() because it can return a positive value on success. However, alternatively re-initialise 'err' by using the return value of the function tegra_i2c_flush_fifos() because it can only be 0 or -ETIMEDOUT. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jon Hunter authored
The I2C adapter is unlocked regardless of whether the tegra_i2c_init() called during the resume is successful or not. However, if the tegra_i2c_init() is not successful, then ->is_suspended is not set to false. Simplify the resume code by only setting ->is_suspended to false if tegra_i2c_init() is successful and return the error code from tegra_i2c_init(). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jon Hunter authored
All Tegra I2C devices have the name "Tegra I2C adapter" which is not very useful when viewing the I2C adapter names via the sysfs. Therefore, use the device name, which is unique for each I2C device, instead. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jon Hunter authored
Tegra has only supported device-tree for platform/board configuration for quite some time now and so simplify the Tegra I2C driver by dropping code for non device-tree platforms/boards. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jon Hunter authored
Add missing new line characters for the various error messages. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jon Hunter authored
Checkpatch warns about missing blank lines after declarations in the Tegra I2C driver and so fix these. Note that the initialisation of 'val' to zero in tegra_dvc_init() is unnecessary and so remove this. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jon Hunter authored
Checkpatch warns about spacing around the '<<' operator in the Tegra I2C driver and so fix these by converting the bit definitions that are using this operator to use the BIT macro. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jon Hunter authored
Checkpatch warns about some lines over 80 characters in the Tegra I2C driver and so fix these. While we are at it, prefix the second instance of "STOP condition" in the comment with a "the". Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 25 Aug, 2016 30 commits
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https://github.com/peda-r/i2c-muxWolfram Sang authored
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Lucas De Marchi authored
Disabling the adapter after each transfer adds additional delays for each I2C transfer. Even if we don't wait for it to be disabled anymore, on next transfer we will need to if we have several transfers in a row. Now during the transfer init we check if IC_TAR can be changed dynamically, the status register for no activity and TX buffer being empty. In this case we don't need to disable it When a transfer fails the adapter will still be disabled - this is a conservative approach. When transfers succeed, the adapter is left enabled and it's configured so to disable interrupts. Alternating register reads on 2 slaves: perf stat -r4 chrt -f 10 ./i2c-test /dev/i2c-1 25000 0x40 0x6 0x1e 0x00 Before: 8.638705161 seconds time elapsed ( +- 5.90% ) After: 7.516821591 seconds time elapsed ( +- 0.11% ) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Lucas De Marchi authored
This adapter can be synthesized with dynamic tar update enabled or disabled. When enabled it is not necessary to disable the adapter to change the slave address in some situations, which saves some time per transaction. There is no direct register to know if this feature is enabled but we can do it indirectly by writing to the 10BIT_ADDR field in IC_CON: this field is read only when dynamic tar update is enabled. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Lucas De Marchi authored
These are used in 2 places and will be needed in more. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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José Roberto de Souza authored
If we aren't going to continue using the controller we can just disable it instead of waiting for it to complete. The biggest improvement here is when a I2C transaction is completed and it doesn't block until the adapter is disabled. When a new transfer is needed we will disable and wait for its completion. This way the adapter will continue changing its state in parallel to the execution of the thread that requested the I2C transaction saving most of the time 25~250 usec per I2C transaction. A simple program doing a register read (1 byte write, 1 byte read) alternating on 2 different slaves repeated 25k times for each and measurements taken 4 times we get: perf stat -r4 chrt -f 10 ./i2c-test /dev/i2c-1 25000 0x40 0x6 0x1e 0x00 Before: 30.879317977 seconds time elapsed ( +- 14.83% ) After: 8.638705161 seconds time elapsed ( +- 5.90% ) Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jarkko Nikula authored
Fast mode is the default speed of i2c-designware which can be overridden by platform data or by "clock-frequency" device property. Even though the ACPI 5.1 can pass device properties via _DSD method, shipping systems define the connection speed between I2C host and each slave in their I2cSerialBus resources. Which means speed is not defined per bus but per slave. As there is now support in i2c-core to find the bus speed from ACPI use that to set up the bus speed prior registering the I2C adapter. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jarkko Nikula authored
ACPI 5 specification doesn't have property for the I2C bus speed but I2cSerialBus resource descriptor which define each controller-slave connection define the maximum speed supported by that connection. Thus finding the maximum safe speed for the bus is to walk through all I2cSerialBus resources that are associated to I2C controller and use the speed of slowest connection. Add function i2c_acpi_find_bus_speed() to the i2c-core that adapter drivers can call prior registering itself to core. This implies two-step walk through the I2cSerialBus resources: call to i2c_acpi_find_bus_speed() does the first scan and finds the safe bus speed that adapter drivers can set up. Adapter driver registration does the second scan when i2c-core creates the I2C slaves by calling the i2c_acpi_register_devices(). In that way the bus speed is set in case slave device probe gets called during registration and does communication. Previous version commit 55d38d06 ("i2c: core: Add function for finding the bus speed from ACPI") got reverted due merge conflicts from commit 525e6fab ("i2c / ACPI: add support for ACPI reconfigure notifications"). This version is a bit bigger than previous version but is still sharing the lowest and complicated part of I2cSerialBus lookup routines with the existing code. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jarkko Nikula authored
I2C ACPI enumeration was originally implemented in another module under drivers/acpi/ but was later moved into i2c-core with added support for I2C ACPI operation region. Rename these acpi_i2c_ prefixed functions, structures and defines in i2c-core to i2c_acpi_ in order to have more consistent name space. This is updated version from commit a7003b65 ("i2c: core: Cleanup I2C ACPI namespace") that got reverted due merge conflicts from commit 525e6fab ("i2c / ACPI: add support for ACPI reconfigure notifications"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Weifeng Voon authored
This patch enabled high speed mode. High speed mode can be turn on by setting the clk_freq to 3400000. High speed HCNT and LCNT are needed as there is no default value provided. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Weifeng Voon authored
DW_IC_CON_MASTER, DW_IC_CON_SLAVE_DISABLE and DW_IC_CON_RESTART_EN are common config that need to be set for i2c designware master. So, configure it first without having to repeat inside the if else. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Weifeng Voon authored
This patch enabled fast mode plus. The fast mode plus and fast speed share the same HCNT and LCNT register. So, the fast mode plus will only run when the HCNT and LCNT value is provided. Else, it will run at fast speed as default. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Weifeng Voon authored
I2C designware controller can run at fast mode plus and high speed. This patch adds the capability to get the HCNT, LCNT configuration via FPCN (fast plus) and HSCN (high speed) ACPI method. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Weifeng Voon authored
I2c designware controller operate speed is configured in the register IC_CON. Previously the operate speed is determined by a local variable clk_freq. This patch will move the local variable clk_freq into struct dw_i2c_dev. This change will ease the set and get of the clk_freq. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jan Glauber authored
The i2c Octeon and ThunderX drivers are maintained by Cavium. While at it fix the whitespace errors of the next entry. Signed-off-by: Jan Glauber <jglauber@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jan Glauber authored
Initialize booleon values with true instead of 1. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jan Glauber authored
Sort include files alphabetically to reduce probability of merge conflicts. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jan Glauber authored
The register offsets are different between Octeon and ThunderX so move them into the algorithm struct and get rid of the define. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jan Glauber authored
Add SMBUS alert interrupt support. For now only device tree is supported for specifying the alert. In case of ACPI an error is returned. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jan Glauber authored
The ThunderX SOC uses the same i2c block as the Octeon SOC. The main difference is that on ThunderX the device is a PCI device so device probing is done via PCI, interrupts are MSI-X. The clock rates can be set via device tree or ACPI. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jan Glauber authored
Move common functionality into a separate file in preparation of the re-use from the ThunderX i2c driver. Functions are slightly re-ordered but no other changes are included. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jan Glauber authored
This is an intermediate commit in preparation of the driver split. The module rename in this commit will be reverted in the next patch, this is just done to make the series bisectible. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Peter Rosin authored
No longer rely on the implicit matching with the i2c device name, use an explicit compatible string instead. Keep a direct pointer to the chip description instead of an index into the chip description array. Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
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Peter Rosin authored
No longer rely on the implicit matching with the i2c device name, use an explicit compatible string instead. Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
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Peter Rosin authored
The i2c mux core can then take appropriate action depending on if it is used for an actual i2c mux, for a gate or for an arbitrator (the last is the case for these drivers). This adds support for the new clearer and more compact devicetree bindings that was added recently. Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
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Peter Rosin authored
Backwards compatibility is preserved; the subnodes are in practice optional. However, the mux core needs to know what subnode it should examine, so add a couple of new flags for i2c_mux_alloc for this purpose. The rule is that if the mux core finds a 'reg' property in the appropriate subnode, e.g. if 'reg' exists in the 'i2c-mux' subnode, then the mux core will assume that this is an old style entry and not an i2c-mux subnode (correspondingly for arbitrators and gates with 'i2c-arb' and 'i2c-gate'). Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
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Peter Rosin authored
Fill the gap for this pre-existing driver. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
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Peter Rosin authored
Handle i2c gates similarly to how i2c arbitrators are handled. This gets rid of a pointless 'reg' property for i2c gates. I.e. this new and more compact style some-gate { i2c-gate { #address-cells = <1>; #size-cells = <0>; some-i2c-device@50 { reg = <0x50>; }; }; }; instead of the old some-gate { #address-cells = <1>; #size-cells = <0>; i2c@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; some-i2c-device@50 { reg = <0x50>; }; }; }; Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
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Peter Rosin authored
This gets rid of the need for a pointless 'reg' property for i2c arbitrators. I.e. this new and more compact style some-arbitrator { i2c-arb { #address-cells = <1>; #size-cells = <0>; some-i2c-device@50 { reg = <0x50>; }; }; }; instead of the old some-arbitrator { #address-cells = <1>; #size-cells = <0>; i2c@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; some-i2c-device@50 { reg = <0x50>; }; }; }; Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
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Peter Rosin authored
Similar to the new optional 'i2c-bus' subnode from Jon Hunter, this adds an optional 'i2c-mux' subnode, for similar reasons. I.e. it is bad of the i2c mux core to assume that any subnode of an i2c mux device is a potential (when the 'reg' property matches) i2c-mux child bus, given that i2c mux devices might do more than mux i2c traffic. So, if an 'i2c-mux' subnode is present, dictate that all i2c-mux child buses exist beneath that subnode. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
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Peter Rosin authored
This unifies usage with i2c_lock_bus and i2c_unlock_bus, and paves the way for the next patch which looks a bit saner with this preparatory work taken care of beforehand. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 22 Aug, 2016 1 commit
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Bartosz Golaszewski authored
The at24 driver doesn't check if the chip is functional in its probe function. This leads to instantiating devices that are not physically present. For example the cape EEPROMs for BeagleBone Black are defined in the device tree at four addresses on i2c2, but normally only one of them is present. If the userspace doesn't know the location in advance, it will need to check if reading the nvmem attributes fails to determine which EEPROM is actually there. Try to read a single byte in probe() and bail-out with -ENODEV if the read fails. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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