1. 13 Oct, 2021 2 commits
    • Arnd Bergmann's avatar
      Merge tag 'arm-soc/for-5.16/drivers' of https://github.com/Broadcom/stblinux into arm/drivers · 790f42a6
      Arnd Bergmann authored
      This pull request contains Broadcom ARM/ARM64 SoC drivers changes for
      5.16, please pull the following:
      
      - Cai updates the bcm-pmb and bcm63xx-power drivers to use the
        devm_platform_ioremap_resource() helper
      
      - Florian updates the Bus Interface Unit code to tune the 72116 and
        72113 chips according to their existing counterparts. The GISB driver is
        updated to be built as a non-removable module
      
      * tag 'arm-soc/for-5.16/drivers' of https://github.com/Broadcom/stblinux:
        bus: brcmstb_gisb: Allow building as module
        soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72116
        soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72113
        soc: bcm63xx-power: Make use of the helper function devm_platform_ioremap_resource()
        soc: bcm: bcm-pmb: Make use of the helper function devm_platform_ioremap_resource()
      
      Link: https://lore.kernel.org/r/20211013174016.831348-3-f.fainelli@gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      790f42a6
    • Arnd Bergmann's avatar
      Merge tag 'qcom-drivers-for-5.16' of... · 936fc53f
      Arnd Bergmann authored
      Merge tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
      
      Qualcomm driver updates for v5.16
      
      This drops the use of power-domains for exposing the load_state from the
      QMP driver to clients, to avoid issues related to system suspend.
      
      SMP2P becomes wakeup capable, to allow dying remoteprocs to wake up
      Linux from suspend to perform recovery.
      
      It adds RPM power-domain support for SM6350 and MSM8953 and base RPM
      support for MSM8953 and QCM2290.
      
      It adds support for MSM8996, SDM630 and SDM660 in the SPM driver, which
      will enable the introduction of proper voltage scaling of the CPU
      subsystem.
      
      Support for releasing secondary CPUs on MSM8226 is introduced.
      
      The Asynchronous Packet Router (APR) driver is extended to support the
      new Generic Packet Router (GPR) variant, which is used to communicate
      with the firmware in the new AudioReach audio driver.
      
      Lastly it transitions a number of drivers to safer string functions, as
      well as switching things to use devm_platform_ioremap_resource().
      
      * tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (40 commits)
        soc: qcom: apr: Add GPR support
        soc: dt-bindings: qcom: add gpr bindings
        soc: qcom: apr: make code more reuseable
        soc: dt-bindings: qcom: apr: deprecate qcom,apr-domain property
        soc: dt-bindings: qcom: apr: convert to yaml
        dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions
        dt-bindings: msm/dp: Remove aoss-qmp header
        soc: qcom: aoss: Drop power domain support
        dt-bindings: soc: qcom: aoss: Drop the load state power-domain
        soc: qcom: smp2p: Add wakeup capability to SMP2P IRQ
        dt-bindings: power: rpmpd: Add SM6350 to rpmpd binding
        dt-bindings: soc: qcom: aoss: Add SM6350 compatible
        soc: qcom: llcc: Disable MMUHWT retention
        soc: qcom: smd-rpm: Add QCM2290 compatible
        dt-bindings: soc: qcom: smd-rpm: Add QCM2290 compatible
        firmware: qcom_scm: Add compatible for MSM8953 SoC
        dt-bindings: firmware: qcom-scm: Document msm8953 bindings
        soc: qcom: pdr: Prefer strscpy over strcpy
        soc: qcom: rpmh-rsc: Make use of the helper function devm_platform_ioremap_resource_byname()
        soc: qcom: gsbi: Make use of the helper function devm_platform_ioremap_resource()
        ...
      
      Link: https://lore.kernel.org/r/20211012173442.1017010-1-bjorn.andersson@linaro.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      936fc53f
  2. 11 Oct, 2021 9 commits
  3. 10 Oct, 2021 1 commit
  4. 08 Oct, 2021 5 commits
  5. 07 Oct, 2021 7 commits
  6. 06 Oct, 2021 1 commit
  7. 05 Oct, 2021 6 commits
  8. 04 Oct, 2021 5 commits
  9. 30 Sep, 2021 1 commit
  10. 28 Sep, 2021 3 commits
    • Krzysztof Kozlowski's avatar
      memory: samsung: describe drivers in KConfig · 6b20a5d1
      Krzysztof Kozlowski authored
      Rephrase the Kconfig option and make it clear it applies only to Samsung
      SoC.
      Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
      Link: https://lore.kernel.org/r/20210924133406.112174-1-krzysztof.kozlowski@canonical.com
      6b20a5d1
    • Andrew Gabbasov's avatar
      memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlash · 1869023e
      Andrew Gabbasov authored
      HyperFlash devices in Renesas SoCs use 2-bytes addressing, according
      to HW manual paragraph 62.3.3 (which officially describes Serial Flash
      access, but seems to be applicable to HyperFlash too). And 1-byte bus
      read operations to 2-bytes unaligned addresses in external address space
      read mode work incorrectly (returns the other byte from the same word).
      
      Function memcpy_fromio(), used by the driver to read data from the bus,
      in ARM64 architecture (to which Renesas cores belong) uses 8-bytes
      bus accesses for appropriate aligned addresses, and 1-bytes accesses
      for other addresses. This results in incorrect data read from HyperFlash
      in unaligned cases.
      
      This issue can be reproduced using something like the following commands
      (where mtd1 is a parition on Hyperflash storage, defined properly
      in a device tree):
      
      [Correct fragment, read from Hyperflash]
      
          root@rcar-gen3:~# dd if=/dev/mtd1 of=/tmp/zz bs=32 count=1
          root@rcar-gen3:~# hexdump -C /tmp/zz
          00000000  f4 03 00 aa f5 03 01 aa  f6 03 02 aa f7 03 03 aa  |................|
          00000010  00 00 80 d2 40 20 18 d5  00 06 81 d2 a0 18 a6 f2  |....@ ..........|
          00000020
      
      [Incorrect read of the same fragment: see the difference at offsets 8-11]
      
          root@rcar-gen3:~# dd if=/dev/mtd1 of=/tmp/zz bs=12 count=1
          root@rcar-gen3:~# hexdump -C /tmp/zz
          00000000  f4 03 00 aa f5 03 01 aa  03 03 aa aa              |............|
          0000000c
      
      Fix this issue by creating a local replacement of the copying function,
      that performs only properly aligned bus accesses, and is used for reading
      from HyperFlash.
      
      Fixes: ca7d8b98 ("memory: add Renesas RPC-IF driver")
      Cc: <stable@vger.kernel.org>
      Signed-off-by: default avatarAndrew Gabbasov <andrew_gabbasov@mentor.com>
      Link: https://lore.kernel.org/r/20210922184830.29147-1-andrew_gabbasov@mentor.comSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
      1869023e
    • Wolfram Sang's avatar
      memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode · fff53a55
      Wolfram Sang authored
      This patch fixes 2 problems:
      [1] The output warning logs and data loss when performing
      mount/umount then remount the device with jffs2 format.
      [2] The access width of SMWDR[0:1]/SMRDR[0:1] register is wrong.
      
      This is the sample warning logs when performing mount/umount then
      remount the device with jffs2 format:
      jffs2: jffs2_scan_inode_node(): CRC failed on node at 0x031c51d4:
      Read 0x00034e00, calculated 0xadb272a7
      
      The reason for issue [1] is that the writing data seems to
      get messed up.
      Data is only completed when the number of bytes is divisible by 4.
      If you only have 3 bytes of data left to write, 1 garbage byte
      is inserted after the end of the write stream.
      If you only have 2 bytes of data left to write, 2 bytes of '00'
      are added into the write stream.
      If you only have 1 byte of data left to write, 2 bytes of '00'
      are added into the write stream. 1 garbage byte is inserted after
      the end of the write stream.
      
      To solve problem [1], data must be written continuously in serial
      and the write stream ends when data is out.
      
      Following HW manual 62.2.15, access to SMWDR0 register should be
      in the same size as the transfer size specified in the SPIDE[3:0]
      bits in the manual mode enable setting register (SMENR).
      Be sure to access from address 0.
      
      So, in 16-bit transfer (SPIDE[3:0]=b'1100), SMWDR0 should be
      accessed by 16-bit width.
      Similar to SMWDR1, SMDDR0/1 registers.
      In current code, SMWDR0 register is accessed by regmap_write()
      that only set up to do 32-bit width.
      
      To solve problem [2], data must be written 16-bit or 8-bit when
      transferring 1-byte or 2-byte.
      
      Fixes: ca7d8b98 ("memory: add Renesas RPC-IF driver")
      Cc: <stable@vger.kernel.org>
      Signed-off-by: default avatarDuc Nguyen <duc.nguyen.ub@renesas.com>
      [wsa: refactored to use regmap only via reg_read/reg_write]
      Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
      Tested-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
      Link: https://lore.kernel.org/r/20210922091007.5516-1-wsa+renesas@sang-engineering.comSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
      fff53a55