- 09 Jul, 2024 5 commits
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Rafael J. Wysocki authored
Merge tag 'cpufreq-arm-updates-6.11' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/vireshk/pm Merge ARM cpufreq updates for 6.11 from Viresh Kumar: "- cpufreq: Add Loongson-3 CPUFreq driver support (Huacai Chen). - Make exit() callback return void (Lizhe and Viresh Kumar). - Minor cleanups and fixes in several drivers (Bryan Brattlof, Javier Carrasco, Jagadeesh Kona, Jeff Johnson, Nícolas F. R. A. Prado, Primoz Fiser, Raphael Gallais-Pou, and Riwen Lu)." * tag 'cpufreq-arm-updates-6.11' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: (21 commits) cpufreq: sti: fix build warning cpufreq: mediatek: Use dev_err_probe in every error path in probe cpufreq: Add Loongson-3 CPUFreq driver support cpufreq: Make cpufreq_driver->exit() return void cpufreq: pcc: Remove empty exit() callback cpufreq: loongson2: Remove empty exit() callback cpufreq: nforce2: Remove empty exit() callback cpufreq: sti: add missing MODULE_DEVICE_TABLE entry for stih418 cpufreq: ti: update OPP table for AM62Px SoCs cpufreq: ti: update OPP table for AM62Ax SoCs cpufreq: sun50i: add Allwinner H700 speed bin cpufreq/cppc: Don't compare desired_perf in target() OPP: ti: Fix ti_opp_supply_probe wrong return values cpufreq: ti-cpufreq: Handle deferred probe with dev_err_probe() cpufreq: dt-platdev: add missing MODULE_DESCRIPTION() macro cpufreq: longhaul: Fix kernel-doc param for longhaul_setstate cpufreq: qcom-nvmem: eliminate uses of of_node_put() cpufreq: qcom-nvmem: fix memory leaks in probe error paths cpufreq: scmi: Avoid overflow of target_freq in fast switch cpufreq: sun50i: replace of_node_put() with automatic cleanup handler ...
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Raphael Gallais-Pou authored
Building this driver yields the following: .../drivers/cpufreq/sti-cpufreq.c:215:50: warning: ‘%d’ directive output may be truncated writing between 1 and 10 bytes into a region of size 2 [-Wformat-truncation=] 215 | snprintf(name, MAX_PCODE_NAME_LEN, pcode%d, pcode); | ^~ .../drivers/cpufreq/sti-cpufreq.c:215:44: note: directive argument in the range [0, 2147483647] 215 | snprintf(name, MAX_PCODE_NAME_LEN, pcode%d, pcode); | ^~~~~~~~~ .../drivers/cpufreq/sti-cpufreq.c:215:9: note: ‘snprintf’ output between 7 and 16 bytes into a destination of size 7 215 | snprintf(name, MAX_PCODE_NAME_LEN, pcode%d, pcode); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fix the buffer size to avoid the warning at build time. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Nícolas F. R. A. Prado authored
Use the dev_err_probe() helper to log the errors on every error path in the probe function and its sub-functions. This includes * adding error messages where there was none * converting over dev_err/dev_warn * removing the top-level error message after mtk_cpu_dvfs_info_init() is called, since every error path inside that function already logs the error reason. This gets rid of the misleading error message when probe is deferred: mtk-cpufreq mtk-cpufreq: failed to initialize dvfs info for cpu0 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Huacai Chen authored
Some of LoongArch processors (Loongson-3 series) support DVFS, their IOCSR.FEATURES has IOCSRF_FREQSCALE set. And they has a micro-core in the package called SMC (System Management Controller), which can be used to detect temperature, control fans, scale frequency and voltage, etc. The Loongson-3 CPUFreq driver is very simple now, it communicate with SMC, get DVFS info, set target frequency from CPUFreq core, and so on. There is a command list to interact with SMC, widely-used commands in the CPUFreq driver include: CMD_GET_VERSION: Get SMC firmware version. CMD_GET_FEATURE: Get enabled SMC features. CMD_SET_FEATURE: Enable SMC features, such as basic DVFS, BOOST. CMD_GET_FREQ_LEVEL_NUM: Get the number of all frequency levels. CMD_GET_FREQ_BOOST_LEVEL: Get the first boost frequency level. CMD_GET_FREQ_LEVEL_INFO: Get the detail info of a frequency level. CMD_GET_FREQ_INFO: Get the current frequency. CMD_SET_FREQ_INFO: Set the target frequency. In future we will add automatic frequency scaling, which is similar to Intel's HWP (HardWare P-State). Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> [ Viresh: Minor formatting cleanups, change return type of exit() to void and use devm_mutex_init() ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Lizhe authored
The cpufreq core doesn't check the return type of the exit() callback and there is not much the core can do on failures at that point. Just drop the returned value and make it return void. Signed-off-by: Lizhe <sensor1010@163.com> [ Viresh: Reworked the patches to fix all missing changes together. ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> # Mediatek Acked-by: Sudeep Holla <sudeep.holla@arm.com> # scpi, scmi, vexpress Acked-by: Mario Limonciello <mario.limonciello@amd.com> # amd Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> # bmips Acked-by: Rafael J. Wysocki <rafael@kernel.org> Acked-by: Kevin Hilman <khilman@baylibre.com> # omap
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- 08 Jul, 2024 1 commit
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Rafael J. Wysocki authored
Merge tag 'amd-pstate-v6.11-2024-07-07' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Merge more amd-pstate changes for 6.11 from Mario Liminciello: "This adds fixes for setting scaling max frequency on systems without a dedicated MSR for setting CPPC requests." * tag 'amd-pstate-v6.11-2024-07-07' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: cpufreq/amd-pstate: Fix the scaling_max_freq setting on shared memory CPPC systems cpufreq/amd-pstate-ut: Convert nominal_freq to khz during comparisons
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- 07 Jul, 2024 2 commits
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Dhananjay Ugwekar authored
On shared memory CPPC systems, with amd_pstate=active mode, the change in scaling_max_freq doesn't get written to the shared memory region. Due to this, the writes to the scaling_max_freq sysfs file don't take effect. Fix this by propagating the scaling_max_freq changes to the shared memory region. Fixes: ffa5096a ("cpufreq: amd-pstate: implement Pstate EPP support for the AMD processors") Reported-by: David Arcari <darcari@redhat.com> Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20240702081413.5688-3-Dhananjay.Ugwekar@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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Dhananjay Ugwekar authored
cpudata->nominal_freq being in MHz whereas other frequencies being in KHz breaks the amd-pstate-ut frequency sanity check. This fixes it. Fixes: e4731baa ("cpufreq: amd-pstate: Fix the inconsistency in max frequency units") Reported-by: David Arcari <darcari@redhat.com> Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Link: https://lore.kernel.org/r/20240702081413.5688-2-Dhananjay.Ugwekar@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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- 05 Jul, 2024 3 commits
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Viresh Kumar authored
The exit() callback is optional, remove the empty one. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
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Viresh Kumar authored
The exit() callback is optional, remove the empty one. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
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Viresh Kumar authored
The exit() callback is optional, remove the empty one. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Rafael J. Wysocki <rafael@kernel.org>
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- 02 Jul, 2024 1 commit
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Raphael Gallais-Pou authored
Add a description of the scaling_available_frequencies attribute in sysfs to the documentation. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://patch.msgid.link/20240701171040.369030-1-rgallaispou@gmail.comSigned-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 28 Jun, 2024 3 commits
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Dhruva Gole authored
Since this function is supposed to return boost_enabled which is anyway a bool type make sure that it's return value is also marked as bool. This helps maintain better consistency in data types being used. Signed-off-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patch.msgid.link/20240627060117.1809477-1-d-gole@ti.comSigned-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Srinivas Pandruvada authored
On some systems, the HWP (Hardware P-states) highest performance level can change from the value set at boot-up. This behavior can lead to two issues: - The 'cpuinfo_max_freq' within the 'cpufreq' sysfs will not reflect the CPU's highest achievable performance. - Even if the CPU's highest performance level is increased after booting, the CPU may not reach the full expected performance. The availability of this feature is indicated by the CPUID instruction: if CPUID[6].EAX[15] is set to 1, the feature is supported. When supported, setting bit 2 of the MSR_HWP_INTERRUPT register enables notifications of the highest performance level changes. Therefore, as part of enabling the HWP interrupt, bit 2 of the MSR_HWP_INTERRUPT should also be set when this feature is supported. Upon a change in the highest performance level, a new HWP interrupt is generated, with bit 3 of the MSR_HWP_STATUS register set, and the MSR_HWP_CAPABILITIES register is updated with the new highest performance limit. The processing of the interrupt is the same as the guaranteed performance change. Notify change to cpufreq core and update MSR_HWP_REQUEST with new performance limits. The current driver implementation already takes care of the highest performance change as part of: commit dfeeedc1 ("cpufreq: intel_pstate: Update cpuinfo.max_freq on HWP_CAP changes") For example: Before highest performance change interrupt: cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq 37000004 cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq 37000004 After highest performance changes interrupt: cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq 3900000 cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq 3900000 Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20240624161109.1427640-3-srinivas.pandruvada@linux.intel.comSigned-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Srinivas Pandruvada authored
When CPUID[6].EAX[15] is set to 1, this CPU supports notification for HWP (Hardware P-states) highest performance change. Add a feature flag to check if the CPU supports HWP highest performance change. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20240624161109.1427640-2-srinivas.pandruvada@linux.intel.comSigned-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 27 Jun, 2024 2 commits
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Rafael J. Wysocki authored
Merge tag 'amd-pstate-v6.11-2024-06-26' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Merge more amd-pstate driver updates for 6.11 from Mario Limonciello: "Add support for amd-pstate core performance boost support which allows controlling which CPU cores can operate above nominal frequencies for short periods of time." * tag 'amd-pstate-v6.11-2024-06-26' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: Documentation: cpufreq: amd-pstate: update doc for Per CPU boost control method cpufreq: amd-pstate: Cap the CPPC.max_perf to nominal_perf if CPB is off cpufreq: amd-pstate: initialize core precision boost state cpufreq: acpi: move MSR_K7_HWCR_CPB_DIS_BIT into msr-index.h
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Rafael J. Wysocki authored
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- 26 Jun, 2024 5 commits
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Perry Yuan authored
Updates the documentation in `amd-pstate.rst` to include information about the per CPU boost control feature. Users can now enable or disable the Core Performance Boost (CPB) feature on individual CPUs using the `boost` sysfs attribute. Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20240626042733.3747-5-mario.limonciello@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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Perry Yuan authored
When Core Performance Boost is disabled by the user, the CPPC_REQ.max_perf should not exceed the nominal_perf since by definition the frequencies between nominal_perf and the highest_perf are in the boost range. Fix this in amd_pstate_update() Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Link: https://lore.kernel.org/r/66f55232be01092c423f0523f68b82b80c293943.1718988436.git.perry.yuan@amd.com Link: https://lore.kernel.org/r/20240626042733.3747-4-mario.limonciello@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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Perry Yuan authored
The "Core Performance Boost (CPB) feature, when enabled in the BIOS, allows the OS to control the highest performance for each individual core. The active, passive and the guided modes of the amd-pstate driver do support controlling the core frequency boost when this BIOS feature is enabled. Additionally, the amd-pstate driver provides a sysfs interface allowing the user to activate/deactivate this core performance boost feature at runtime. Add support for the set_boost callback in the active mode driver to enable boost control via the cpufreq core. This ensures a consistent boost control interface across all pstate modes, including passive mode, guided mode, and active mode. With this addition, all three pstate modes can support the same boost control interface with unique interface and global CPB control. Each CPU also supports individual boost control, allowing global CPB to change all cores' boost states simultaneously. Specific CPUs can update their boost states separately, ensuring all cores' boost states are synchronized. Cc: Oleksandr Natalenko <oleksandr@natalenko.name> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217931Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Link: https://lore.kernel.org/r/20240626042733.3747-3-mario.limonciello@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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Perry Yuan authored
There are some other drivers also need to use the MSR_K7_HWCR_CPB_DIS_BIT for CPB control bit, so it makes sense to move the definition to a common header file to allow other driver to use it. No intentional functional impact. Suggested-by: Gautham Ranjal Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Acked-by: Rafael J. Wysocki <rafael@kernel.org> Acked-by: Huang Rui <ray.huang@amd.com> Link: https://lore.kernel.org/r/78b6c75e6cffddce3e950dd543af6ae9f8eeccc3.1718988436.git.perry.yuan@amd.com Link: https://lore.kernel.org/r/20240626042733.3747-2-mario.limonciello@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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Raphael Gallais-Pou authored
'st,stih418' is missing in the compatible list. Add it in order to use the driver with stih418 platform. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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- 25 Jun, 2024 4 commits
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Srinivas Pandruvada authored
Replace boot_cpu_has() with cpu_feature_enabled(). Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20240624162714.1431182-1-srinivas.pandruvada@linux.intel.comSigned-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Rafael J. Wysocki authored
Merge tag 'amd-pstate-v6.11-2024-06-24' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Merge the second round of changes for amd-pstate in 6.11 from Mario Limonciello: "* Enables amd-pstate by default in "shared memory" designs without a dedicated MSR. * Adds extra infrastructure for debugging problems. * Bug fixes found for init/unload failure." * tag 'amd-pstate-v6.11-2024-06-24' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: cpufreq: simplify boolean parsing with kstrtobool in store function cpufreq: amd-pstate: Don't create attributes when registration fails cpufreq: amd-pstate: Make amd-pstate unit tests depend on amd-pstate cpufreq/amd-pstate: fix setting policy current frequency value cpufreq: amd-pstate: auto-load pstate driver by default cpufreq: amd-pstate: enable shared memory type CPPC by default cpufreq: amd-pstate: switch boot_cpu_has() to cpu_feature_enabled() Documentation: PM: amd-pstate: add guided mode to the Operation mode cpufreq: amd-pstate: add debug message while CPPC is supported and disabled by SBIOS cpufreq: amd-pstate: show CPPC debug message if CPPC is not supported cpufreq: amd-pstate: remove unused variable nominal_freq cpufreq: amd-pstate: optimize the initial frequency values verification cpufreq: amd-pstate: Allow users to write 'default' EPP string
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Bryan Brattlof authored
More speed grades for the AM62Px SoC family have been defined which unfortunately no longer align with the AM62x table. So create a new table with these new speed grades defined for the AM62Px Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Bryan Brattlof authored
As the AM62Ax SoC family matures more speed grades are being defined. These new grades unfortunately no longer align with the AM62x SoC family. Define a new table with new OPP speed grade limits for the AM62Ax Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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- 24 Jun, 2024 4 commits
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Perry Yuan authored
Update the cpufreq store function to use kstrtobool for parsing boolean values. This simplifies the code and improves readability by using a standard kernel function for boolean string conversion. Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Link: https://lore.kernel.org/r/d392eba3bad1231776124c321cef8c184ce1482d.1718988436.git.perry.yuan@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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Rafael J. Wysocki authored
It is reported that single-thread performance on some hybrid systems dropped significantly after commit 7feec743 ("ACPI: CPPC: Only probe for _CPC if CPPC v2 is acked") which prevented _CPC from being used if the support for it had not been confirmed by the platform firmware. The problem is that if the platform firmware does not confirm CPPC v2 support, cppc_get_perf_caps() returns an error which prevents the intel_pstate driver from enabling ITMT. Consequently, the scheduler does not get any hints on CPU performance differences, so in a hybrid system some tasks may run on CPUs with lower capacity even though they should be running on high-capacity CPUs. To address this, modify intel_pstate to use the information from MSR_HWP_CAPABILITIES to enable ITMT if CPPC is not available (which is done already if the highest performance number coming from CPPC is not realistic). Fixes: 7feec743 ("ACPI: CPPC: Only probe for _CPC if CPPC v2 is acked") Closes: https://lore.kernel.org/linux-acpi/d01b0a1f-bd33-47fe-ab41-43843d8a374f@kfocus.org Link: https://lore.kernel.org/linux-acpi/ZnD22b3Br1ng7alf@kf-XEReported-by: Aaron Rainbolt <arainbolt@kfocus.org> Tested-by: Aaron Rainbolt <arainbolt@kfocus.org> Cc: 5.19+ <stable@vger.kernel.org> # 5.19+ Link: https://patch.msgid.link/12460110.O9o76ZdvQC@rjwysocki.netSigned-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
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Mario Limonciello authored
If driver registration fails then immediately return the failure instead of continuing to register attributes. This fixes issues of falling back from amd-pstate to other drivers when cpufreq init has failed for any reason. Reported-by: alex.s.cochran@proton.me Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Reviewed-by: Perry Yuan <Perry.Yuan@amd.com> Link: https://lore.kernel.org/r/20240623200918.52104-1-mario.limonciello@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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Mario Limonciello authored
As the unit tests use a symbol from the driver an explicit dependency is required. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202406222016.R4A2TMs8-lkp@intel.com/Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com> Reviewed-by: Perry Yuan <Perry.Yuan@amd.com> Link: https://lore.kernel.org/r/20240622215219.47911-1-mario.limonciello@amd.comSigned-off-by: Mario Limonciello <mario.limonciello@amd.com>
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- 23 Jun, 2024 8 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linuxLinus Torvalds authored
Pull i2c fixes from Wolfram Sang: "The core gains placeholders for recently added functions when CONFIG_I2C is not defined as well documentation fixes to start using inclusive terminology. The drivers get paths in DT bindings fixed as well as proper interrupt handling for the ocores driver" * tag 'i2c-for-6.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: docs: i2c: summary: be clearer with 'controller/target' and 'adapter/client' pairs docs: i2c: summary: document 'local' and 'remote' targets docs: i2c: summary: document use of inclusive language docs: i2c: summary: update speed mode description docs: i2c: summary: update I2C specification link docs: i2c: summary: start sentences consistently. i2c: Add nop fwnode operations i2c: ocores: set IACK bit after core is enabled dt-bindings: i2c: google,cros-ec-i2c-tunnel: correct path to i2c-controller schema dt-bindings: i2c: atmel,at91sam: correct path to i2c-controller schema
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git://git.samba.org/sfrench/cifs-2.6Linus Torvalds authored
Pull smb client fixes from Steve French: "Five smb3 client fixes - three nets/fiolios cifs fixes - fix typo in module parameters description - fix incorrect swap warning" * tag '6.10-rc4-smb3-client-fixes' of git://git.samba.org/sfrench/cifs-2.6: cifs: Move the 'pid' from the subreq to the req cifs: Only pick a channel once per read request cifs: Defer read completion cifs: fix typo in module parameter enable_gcm_256 cifs: drop the incorrect assertion in cifs_swap_rw()
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git://git.kernel.org/pub/scm/linux/kernel/git/rppt/memblockLinus Torvalds authored
Pull memblock fix from Mike Rapoport: "Fix fragility in checks for unset node ID. Use numa_valid_node() function to verify that nid is a valid node ID instead of inconsistent comparisons with either NUMA_NO_NODE or MAX_NUMNODES" * tag 'fixes-2024-06-23' of git://git.kernel.org/pub/scm/linux/kernel/git/rppt/memblock: memblock: use numa_valid_node() helper to check for invalid node ID
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git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds authored
Pull MIPS fixes from Thomas Bogendoerfer: - fix lseek in o32 compat mode - fix for microMIPS MT ASE helpers * tag 'mips-fixes_6.10_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: mips: fix compat_sys_lseek syscall MIPS: mipsmtregs: Fix target register for MFTC0
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Borislav Petkov: - An ARM-relevant fix to not free default RMIDs of a resource control group - A randconfig build fix for the VMware virtual GPU driver * tag 'x86_urgent_for_v6.10_rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/resctrl: Don't try to free nonexistent RMIDs drm/vmwgfx: Fix missing HYPERVISOR_GUEST dependency
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git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linuxLinus Torvalds authored
Pull powerpc fixes from Michael Ellerman: - Prevent use-after-free in 64-bit KVM VFIO - Add generated Power8 crypto asm to .gitignore Thanks to Al Viro and Nathan Lynch. * tag 'powerpc-6.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: KVM: PPC: Book3S HV: Prevent UAF in kvm_spapr_tce_attach_iommu_group() powerpc/crypto: Add generated P8 asm to .gitignore
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Wolfram Sang authored
Merge tag 'i2c-host-fixes-6.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-current This pull request fixes the paths of the dt-schema to their complete locations for the ChromeOS EC tunnel driver and the Atmel at91sam drivers. Additionally, the OpenCores driver receives a fix for an issue that dates back to version 2.6.18. Specifically, the interrupts need to be acknowledged (clearing all pending interrupts) after enabling the core.
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- 22 Jun, 2024 2 commits
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https://github.com/Rust-for-Linux/linuxLinus Torvalds authored
Pull rust fix from Miguel Ojeda: - Avoid unused import warning in 'rusttest'. * tag 'rust-fixes-6.10' of https://github.com/Rust-for-Linux/linux: rust: avoid unused import warning in `rusttest`
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Linus Torvalds authored
Merge tag 'regulator-fix-v6.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator Pull regulator fixes from Mark Brown: "A few driver specific fixes for incorrect device descriptions, plus a fix for a missing symbol export which causes build failures for some newly added drivers in other trees" * tag 'regulator-fix-v6.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: regulator: axp20x: AXP717: fix LDO supply rails and off-by-ones regulator: bd71815: fix ramp values regulator: core: Fix modpost error "regulator_get_regmap" undefined regulator: tps6594-regulator: Fix the number of irqs for TPS65224 and TPS6594
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