- 13 Mar, 2016 2 commits
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https://github.com/carlocaione/linux-mesonOlof Johansson authored
This series adds initial support for the Amlogic S905 based Tronsmart Vega S95 Pro, Meta and Telos TV boxes. - Add new DTS to enable support for the boards - Add documentation for compatibles and vendor prefix * tag 'for-v4.6/gxbb-dt' of https://github.com/carlocaione/linux-meson: ARM64: dts: amlogic: Add Tronsmart Vega S95 configs Documentation: devicetree: amlogic: Document Tronsmart Vega S95 boards ARM64: dts: Prepare configs for Amlogic Meson GXBaby Documentation: devicetree: amlogic: Document Meson GXBaby devicetree: bindings: Add vendor prefix for Tronsmart Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.infradead.org/linux-mvebuOlof Johansson authored
mvebu dt64 for 4.6 (part 2) Add support for the Armada 7K and 8K SoCs and the Armada 8040 DB board * tag 'mvebu-dt64-4.6-2' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: re-order Device Tree nodes for Armada AP806 arm64: dts: marvell: update Armada AP806 clock description arm64: dts: marvell: add Device Tree files for Armada 7K/8K Signed-off-by: Olof Johansson <olof@lixom.net>
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- 07 Mar, 2016 5 commits
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Andreas Färber authored
Add Device Trees for Tronsmart Vega S95 Pro, Meta and Telos TV boxes. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Carlo Caione <carlo@endlessm.com>
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Andreas Färber authored
Use "tronsmart,vega-s95" as well as "tronsmart,vega-s95-pro", "tronsmart,vega-s95-meta" and "tronsmart,vega-s95-telos" compatible strings. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Carlo Caione <carlo@endlessm.com>
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Andreas Färber authored
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Carlo Caione <carlo@endlessm.com>
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Andreas Färber authored
Use "amlogic,meson-gxbb" compatible string. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Carlo Caione <carlo@endlessm.com>
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Matthias Brugger authored
Tronsmart is a China based company building consumer electronic devices. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Carlo Caione <carlo@endlessm.com>
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- 02 Mar, 2016 2 commits
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Arnd Bergmann authored
Merge tag 'imx-dt64-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64 Merge "NXP/Freescale arm64 dts update for 4.6" from Shawn Guo: - Add "snps,quirk-frame-length-adjustment" property to USB3 node for erratum A009116, which affects NXP/Freescale arm64 SoCs LS1043A and LS2080A. * tag 'imx-dt64-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: ls1043a: Add quirk for Erratum A009116 arm64: dts: ls2080a: Add quirk for Erratum A009116
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Arnd Bergmann authored
Merge tag 'qcom-arm64-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64 Merge "Qualcomm ARM64 Updates for v4.6" from Andy Gross: * Add MSM8996 support * Cleanups for MSM8916 * Updates for APQ8016 SBC * Fixup pmic reg properties * Add RPMCC node for 8916 * Add LPASS audio nodes * Add USB support on MSM8916 * tag 'qcom-arm64-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (24 commits) arm64: dts: qcom: Fix MPP's function used for LED control arm64: dts: qcom: fix usb digital voltage levels arm64: dts: qcom: apq8016-sbc: enable lpass on DB410c arm64: dts: qcom: add lpass node arm64: dts: qcom: add audio pinctrls arm64: dts: qcom: apq8016-sbc: add usb support arm64: dts: qcom: add manual pullup setting to otg. arm64: dts: qcom: msm8916: Add RPMCC DT node ARM64: dts: qcom: Remove size elements from pmic reg properties arm64: dts: msm8996: Add #power-domain-cells property arm64: dts: apq8016-sbc: Add real regulators and pinctrl for sdhc arm64: dts: apq8016-sbc: move sdhci node under soc node arm64: dts: apq8016-sbc: make 1.8v available on LS expansion arm64: dts: apq8016-sbc: add regulators support arm64: dts: qcom: add lable for smd rpm regulators arm64: dts: remove s2 regulator from smd regulators. arm64: dts: qcom: add correct drive strenght on cs pins arm64: dts: qcom: remove redundant spi cs pins from pinconf arm64: dts: apq8016-sbc: Add aliases to spi device. arm64: dts: Add L2 cache node to msm8916 ...
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- 29 Feb, 2016 5 commits
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https://github.com/AppliedMicro/xgene-nextArnd Bergmann authored
Merge "Second part of X-Gene DT changes queued for v4.6" from Duc Dang: This patch set includes: + X-Gene v2 Mailbox DT node + X-Gene v1 and X-Gene v2 SLIMpro Mailbox I2C driver DT nodes * tag 'xgene-dts-for-v4.6-part2' of https://github.com/AppliedMicro/xgene-next: arm64: dts: apm: Add DT node for X-Gene v2 SLIMpro Mailbox I2C Driver arm64: dts: apm: Mailbox device tree node for APM X-Gene v2 platform. arm64: dts: apm: Add DT node for X-Gene v1 SLIMpro Mailbox I2C Driver arm64: dts: apm: mailbox device tree node for APM X-Gene platform.
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https://github.com/AppliedMicro/xgene-nextArnd Bergmann authored
Merge "First part of X-Gene DT changes queued for v4.6" from Duc Dang: This patch set includes: + A change in compatible string of X-Gene v2 SoC PLL DT node to reflect the v2 hardware + Update DT fields for X-Gene v1 and v2 standby GPIO controllers + Update declaration of power button GPIO for X-Gene v1 and X-Gene v2 platforms * tag 'xgene-dts-for-v4.6-part1' of https://github.com/AppliedMicro/xgene-next: arm64: dts: apm: Update GPIO to control power-off on X-Gene v2 platforms arm64: dts: apm: Update GPIO standby controller DT node for X-Gene v2 platforms arm64: dts: apm: Update GPIO to control power-off on X-Gene v1 platforms arm64: dts: apm: Update X-Gene standby GPIO controller DTS entries arm64: dts: apm: Update Merlin DT PCP PLL clock node for v2 hardware
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git://github.com/hisilicon/linux-hisiArnd Bergmann authored
Merge "ARM64: DT: Hisilicon Hip05 soc and D02 board updates for 4.6" from Wei Xu: - Add L2 cache topology - Use Cortex specific device node for pmu - Append all gicv3 ITS entries - Append gpio nodes - Append power button node for D02 board * tag 'hip05-dt-for-4.6' of git://github.com/hisilicon/linux-hisi: arm64: dts: hip05: Append power button node for D02 board arm64: dts: hip05: Append gpio nodes arm64: dts: hip05: Append all gicv3 ITS entries arm64: dts: hip05: Use Cortex specific device node for pmu arm64: dts: hip05: Add L2 cache topology
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Ivan T. Ivanov authored
The qcom-spmi-mpp driver is now using string "digital" to denote old "normal" functionality. Update DTS file. Also update the powersource. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
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Arnd Bergmann authored
Merge tag 'renesas-arm64-dt2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Merge "Second Round of Renesas ARM64 Based SoC DT Updates for v4.6" from Simon Horman: Updates for r8a7795/salvator-x * Enable USB2.0, and SDHI0 & 3 * Add GIC-400 virtual interfaces * Add INTC-EX and L2 cache-controller nodes * Use fallback etheravb compatibility string * Use GIC_* defines where appropriate * tag 'renesas-arm64-dt2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: salvator-x: enable USB 2.0 Host of channel 1 and 2 arm64: dts: salvator-x: enable usb2_phy of channel 1 and 2 arm64: dts: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodes arm64: dts: r8a7795: add usb2_phy device nodes arm64: dts: r8a7795: use fallback etheravb compatibility string arm64: dts: r8a7795: salvator-x: enable SDHI0 & 3 arm64: dts: r8a7795: Add SDHI support to dtsi arm64: dts: r8a7795: Add GIC-400 virtual interfaces arm64: dts: r8a7795: Add INTC-EX device node arm64: dts: r8a7795: Add CA53 L2 cache-controller node arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node arm64: dts: r8a7795: use GIC_* defines arm64: dts: r8a7795: pmu: switch to Cortex specific device nodes arm64: dts: r8a7795: Add L2 cache-controller nodes
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- 26 Feb, 2016 15 commits
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http://github.com/Broadcom/stblinuxArnd Bergmann authored
Merge "Broadcom devicetree-arm64 changes for 4.6" from Florian Fainelli: This pull request contains Broadcom ARM64-based SoCs device tree changes: - Anup adds additional nodes to the Broadcom Northstart 2 Device Trees: SDHCI (iProc-compatible), ARM SP804 timers, ARM SP805 watchdog - Anup also adds a binding documentation for the ARM SP805 watchdog since there was not one in tree before - Ray adds PCIE root complex nodes to the Northstar 2 Device Tree nodes, using the iProc-compatible binding - Jayachandran C. adds binding documentation for the Broadcom Vulcan processors and reference platforms * tag 'arm-soc/for-4.6/devicetree-arm64' of http://github.com/Broadcom/stblinux: dt-bindings: Add documentation for Broadcom Vulcan arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2 arm64: dts: Add ARM SP805 watchdog DT node for NS2 dt-bindings: watchdog: Add ARM SP805 DT bindings arm64: dts: Add ARM SP804 timer DT nodes for NS2 arm64: dts: Add SDHCI DT node for NS2
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Antoine Tenart authored
Following the addition of the Alpine MSIX controller driver, add the corresponding node in the Alpine v2 device tree. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Tsahee Zidenberg <tsahee@annapurnalabs.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Antoine Tenart authored
This patch adds the initial support for the Alpine v2 EVP board from Annapurna Labs (Amazon). Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Barak Wasserstrom <barak@annapurnalabs.com> Signed-off-by: Tsahee Zidenberg <tsahee@annapurnalabs.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/Xilinx/linux-xlnxArnd Bergmann authored
Merge "ARM: Xilinx ZynqMP dt patches for v4.6" from Michal Simek: - Extract clock information from EP108 - Sort GPIO node * tag 'zynqmp-dt-for-4.6' of https://github.com/Xilinx/linux-xlnx: ARM64: zynqmp: Extract clock information from EP108 ARM64: zynqmp: Keep gpio node alphabetically sorted
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https://github.com/mbgg/linux-mediatekArnd Bergmann authored
Merge "ARM: mediatek: dts updates for v4.6" from Matthias Brugger: Add nor-flash to mt8173 SoC. Add efuse device to mt8173 SoC. Fix power-domain issue mt8173-evb which uses older chip revision. * tag 'v4.5-next-dts64' of https://github.com/mbgg/linux-mediatek: ARM64: dts: Mediatek: mt8173-evb: fix access MMC fail issue dts: arm64: Add EFUSE device node arm64: dts: mt8173: Add nor flash node
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Thomas Petazzoni authored
The DT nodes representing the XOR engines were not placed at the proper location to comply with the requirement of ordering DT nodes by their unit address. This commit fixes this mistake. [gregory.clement@free-electrons.com: Fix commit title by adding ' dts:'] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
Following the review from the DT maintainers, the DT binding for the clocks has changed, and we now use a DFX server node exposing a syscon, with the clock nodes being subnodes of the DFX server node. This commit therefore updates the AP806 Device Tree file to use this new DT binding. [gregory.clement@free-electrons.com: Fix commit title by adding ' dts:'] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
This commit adds the base Device Tree files for the Armada 7K and 8K SoCs, as well as the Armada 8040 DB board. The Armada 7020, 7040 (7K family) and 8020, 8040 (8K family) are composed of: - An AP806 block that contains the CPU core and a few basic peripherals. The AP806 is available in dual core configurations (used in 7020 and 8020) and quad core configurations (used in 8020 and 8040). - One or two CP110 blocks that contain all the high-speed interfaces (SATA, PCIe, Ethernet, etc.). The 7K family chips have one CP110, and the 8K family chips have two CP110, giving them twice the number of HW interfaces. In order to represent this from a Device Tree point of view, this commit creates the following hierarchy: * armada-ap806.dtsi - definitions common to dual/quad ap806 * armada-ap806-dual.dtsi - description of the two CPUs * armada-7020.dtsi - description of the 7020 SoC * armada-8020.dtsi - description of the 8020 SoC * armada-ap806-quad.dtsi - description of the four CPUs * armada-7040.dtsi - description of the 7040 SoC * armada-7040-db.dts - description of the 7040 board * armada-8040.dtsi - description of the 8040 SoC The CP110 blocks are not described yet, and will be part of future patch series. [gregory.clement@free-electrons.com: Fix commit title by adding ' dts:'] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Duc Dang authored
Add DT node to enable SLIMpro Mailbox I2C Driver for X-Gene v2 platforms. Signed-off-by: Duc Dang <dhdang@apm.com>
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Duc Dang authored
Add mailbox device tree node for APM X-Gene v2 platform. Signed-off-by: Duc Dang <dhdang@apm.com>
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Duc Dang authored
Add DT node to enable SLIMpro Mailbox I2C Driver for X-Gene v1 platforms. Signed-off-by: Duc Dang <dhdang@apm.com>
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Duc Dang authored
Mailbox device tree node for APM X-Gene platform. Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
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Duc Dang authored
This patch updates gpio-keys node that supports power-off for X-Gene v2 Merlin board to adapt with new changes in xgene-gpio-sb driver (to support configuring some GPIO pins as interrupt pins). Signed-off-by: Quan Nguyen <qnguyen@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com>
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Duc Dang authored
xgene-gpio-sb driver now supports configuring some GPIO pins as interrupt pins. This patch adds the required fields for GPIO standby controller DT node of X-Gene v2 platform to work with this new driver change. Signed-off-by: Quan Nguyen <qnguyen@apm.com> Signed-off-by: Duc Dang <dhdang@apm.com>
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Duc Dang authored
This patch updates gpio-keys node that supports power-off for X-Gene v1 Mustang board to adapt with new changes in xgene-gpio-sb driver (to support configuring some GPIO pins as interrupt pins). Signed-off-by: Duc Dang <dhdang@apm.com>
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- 25 Feb, 2016 11 commits
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Yoshihiro Shimoda authored
We should set SW15 to pin 2-3 side on the board before we use CN9 as USB host or peripheral. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Yoshihiro Shimoda authored
This board has a MAX3355 chip. However, we cannot use the extcon/max3355 driver because the ID pin doesn't connect to a gpio pin (in other words, it connects to the SoC specific pin). And, the phy-rcar-gen3-usb2 driver cannot handle such a chip for now. So, this patch enables usb2_phy of channel 1 and 2. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Yoshihiro Shimoda authored
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Yoshihiro Shimoda authored
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
Use recently added fallback compatibility string in r8a7795 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ai Kyuse authored
Add the exposed SD card slots. The on-board eMMC needs to wait until we fixed the 8bit support. Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Ai Kyuse authored
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [wsa: squashed some fixes and added mmc-caps] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Srinivas Kandagatla authored
This patch updates the digital voltage levels from corner values to microvolts as we are going to use s1 regulator directly for vddcx instead of s1_corner. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Srinivas Kandagatla authored
This patch enables the lpass on DB410C. LPASS is used as cpu dai for both analog and digital audio. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Srinivas Kandagatla authored
This patch adds lpass node to the SOC. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Srinivas Kandagatla authored
This patch adds pinctrls required for digital and analog audio via lpass. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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