- 31 Aug, 2022 8 commits
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Jani Nikula authored
Move display FBC related members under drm_i915_private display sub-struct. Pointers and arrays of pointers to structs that we defined are fine without a sub-struct wrapping. Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Reviewed-by:
Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1151469ec13d392df86b72a375f490fd70a3257a.1661779055.git.jani.nikula@intel.com
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Jani Nikula authored
Move display VBT related members under drm_i915_private display sub-struct. v2: Rebase Signed-off-by:
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Jani Nikula authored
Move display DSI related members under drm_i915_private display sub-struct. Prefer adding anonymous sub-structs even for single members that aren't our own structs. Abstract mmio base member access in register definitions in a macro. Signed-off-by:
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Jani Nikula authored
Move display backlight related members under drm_i915_private display sub-struct. Prefer adding anonymous sub-structs even for single members that aren't our own structs. Signed-off-by:
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Jani Nikula authored
Move display cdclk related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display opregion related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display bandwidth related members under drm_i915_private display sub-struct. v2: Rebase Signed-off-by:
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Jani Nikula authored
Move display hdcp related members under drm_i915_private display sub-struct. Signed-off-by:
Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1083f5a58cce1507bd19bf7f98bf85e9351b741e.1661779055.git.jani.nikula@intel.com
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- 29 Aug, 2022 21 commits
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Jani Nikula authored
Sync drm-intel-next with v6.0-rc as well as recent drm-intel-gt-next. Since drm-next does not have commit f0c70d41 ("drm/i915/guc: remove runtime info printing from time stamp logging") yet, only drm-intel-gt-next, will need to do that as part of the merge here to build. Signed-off-by:
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Jani Nikula authored
The lone gem quirk is an outlier, not even handled by the common quirk code. Split it to a separate gem_quirks member. Signed-off-by:
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Jani Nikula authored
The macros clearly don't belong in i915_drv.h. Move to intel_frontbuffer.h. Also split the BUILD_BUG_ON()s to intel_frontbuffer_track() to avoid depending on some other macros in the header. Signed-off-by:
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Jani Nikula authored
The window2_delay member has been functionally unused (always set to 0) since it was added in commit bb265dbd ("drm/i915/xelpd: Add VRR guardband for VRR CTL"). Replace it with a FIXME comment. Signed-off-by:
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Jani Nikula authored
Move display sagv related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display overlay related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display hotplug related members under drm_i915_private display sub-struct. Rename struct i915_hotplug to intel_hotplug while at it. Signed-off-by:
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Jani Nikula authored
Move display watermark related members under drm_i915_private display sub-struct. It's a bit arbitrary when to define a named struct for grouping, but clearly intel_wm is big enough to warrant a separate definition. Signed-off-by:
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Jani Nikula authored
Move display fbdev related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display dpll related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display audio related members under drm_i915_private display sub-struct. Split audio funcs to display.funcs to follow the same pattern as all the other display functions. Signed-off-by:
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Jani Nikula authored
Move display dmc related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display PPS related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display gmbus related members under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display color functions under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display fdi functions under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display watermark functions under drm_i915_private display sub-struct. Rename struct drm_i915_wm_disp_funcs to intel_wm_funcs while at it. Signed-off-by:
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Jani Nikula authored
Move display hotplug functions under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display dpll functions under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
Move display cdclk functions under drm_i915_private display sub-struct. Signed-off-by:
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Jani Nikula authored
In another long-overdue cleanup, add a display sub-struct to drm_i915_private, and start moving display related members there. Start with display funcs that need a rename anyway to not collide with the new display member. Add a new header under display/ for defining struct intel_display. Rename struct drm_i915_display_funcs to intel_display_funcs while at it. v2: - Fix multi-line comment style (Arun) - Use display as the member name Signed-off-by:
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- 26 Aug, 2022 3 commits
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José Roberto de Souza authored
New PCI id recently added. BSpec: 53655 Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Reviewed-by:
Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220824133935.51560-1-jose.souza@intel.com
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Ville Syrjälä authored
The stuff programmed into the wm/ddb registers of planes on disabled pipes doesn't matter. So during readout just leave our software state tracking for those zeroed. This should avoid us trying too hard to clean up after whatever mess the VBIOS/GOP left in there. The actual hardware state will get cleaned up if/when we enable the pipe anyway. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5711Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220617195948.24007-1-ville.syrjala@linux.intel.comReviewed-by:
Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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Dave Airlie authored
Merge tag 'drm-intel-gt-next-2022-08-24' of git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Create gt/gtN/.defaults/ for per gt sysfs defaults Create a gt/gtN/.defaults/ directory (similar to engine/<engine-name>/.defaults/) to expose default parameter values for each gt in sysfs. This allows userspace to restore default parameter values after they have changed. Driver Changes: - Support GuC v69 in parallel to v70 (Daniele) - Improve TLB invalidation to limit performance regression (Chris, Mauro) - Expose per-gt RPS defaults in sysfs (Ashutosh) - Suppress OOM warning for shmemfs object allocation failure (Chris, Nirmoy) - Disable PCI resize on 32-bit machines (Nirmoy) - Update DG2 to GuC v70.4.1 (John) - Fix CCS data copying on DG2 during swapping (Matt A) - Add DG2 performance tuning setting recommended by spec (Matt R) - Add GuC <-> kernel time stamp translation information to error logs (John) - Record GuC CTB info in error logs (John) - Route semaphores to GuC for Gen12+ when enabled (Michal Wi, John) - Improve resilency to bug #3575: Handle reset timeouts under unrelated kernel hangs (Chris, Ashutosh) - Avoid system freeze by removing shared locking on freeing objects (Chris, Nirmoy) - Demote GuC error "No response for request" into debug when expected (Zhanjun) - Fix GuC capture size warning and bump the size (John) - Use streaming loads to speed up dumping the GuC log (Chris, John) - Don't abort on CTB_UNUSED status from GuC (John) - Don't send spurious policy update for GuC child contexts (Daniele) - Don't leak the CCS state (Matt A) - Prefer drm_err over pr_err (John) - Eliminate unused calc_ctrl_surf_instr_size (Matt A) - Add dedicated function for non-ctx register tuning settings (Matt R) - Style and typo fixes, documentation improvements (Jason Wang, Mauro) - Selftest improvements (Matt B, Rahul, John) Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YwYTCjA/Rhpd1n4A@jlahtine-mobl.ger.corp.intel.com
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- 25 Aug, 2022 8 commits
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José Roberto de Souza authored
Display version 14 also supports MBUS joining just like ADL-P and also it does not need MBUS initialization, so extending ADL-P code paths to display version 14 and higher. Bspec: 49213 Reviewed-by:
Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220818234202.451742-20-radhakrishna.sripada@intel.com
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Radhakrishna Sripada authored
Meteorlake uses a similar DBUF calculations as ADL-P. Reuse the call flow for meteorlake. Bspec: 49255 Original Author: Caz Yokoyama Reviewed-by:
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Radhakrishna Sripada authored
Like ADL_P, Meteorlake has different memory characteristics from past platforms. Update the values used by our memory bandwidth calculations accordingly. Bspec: 64631 Reviewed-by:
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Radhakrishna Sripada authored
Since Xe LPD+, Memory latency data are in LATENCY_LPX_LPY registers instead of GT driver mailbox. v2: Use the extracted wm latency adjustment function(Matt) v3: Use Odd/even for Latency fields(MattR) Bspec: 64608 Cc: Matt Roper <matthew.d.roper@intel.com> Original Author: Caz Yokoyama Signed-off-by:
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Radhakrishna Sripada authored
Watermark latency is adjusted in cases when latency is 0us for level greater than 1, the subsequent levels are disabled. Extract this logic into its own function. v2: Pass dev_priv to the extracted function(MattR) Suggested-by:
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Clint Taylor authored
MTL has a fixed rawclk of 38400Khz. Register does not need to be reprogrammed. Bspec: 49304 Reviewed-by:
Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by:
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Radhakrishna Sripada authored
The initialization sequence for Meteorlake reuses the sequence for icelake for most parts. Some changes viz. reset PICA handshake are added. Bspec: 49189 Reviewed-by:
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Imre Deak authored
Add the proper VBT port,AUX_CH -> i915 port,AUX_CH mapping which just follows the ADL_P one. Reviewed-by:
Imre Deak <imre.deak@intel.com> Signed-off-by:
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