1. 16 Mar, 2021 32 commits
  2. 15 Mar, 2021 8 commits
    • Alex Elder's avatar
      net: ipa: make ipa_table_hash_support() inline · 0f13b5e6
      Alex Elder authored
      In review, Alexander Duyck suggested that ipa_table_hash_support()
      was trivial enough that it could be implemented as a static inline
      function in the header file.  But the patch had already been
      accepted.  Implement his suggestion.
      Signed-off-by: default avatarAlex Elder <elder@linaro.org>
      Reviewed-by: default avatarAlexander Duyck <alexanderduyck@fb.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0f13b5e6
    • Ivan Bornyakov's avatar
      net: phy: add Marvell 88X2222 transceiver support · 6e3bac3e
      Ivan Bornyakov authored
      Add basic support for the Marvell 88X2222 multi-speed ethernet
      transceiver.
      
      This PHY provides data transmission over fiber-optic as well as Twinax
      copper links. The 88X2222 supports 2 ports of 10GBase-R and 1000Base-X
      on the line-side interface. The host-side interface supports 4 ports of
      10GBase-R, RXAUI, 1000Base-X and 2 ports of XAUI.
      
      This driver, however, supports only XAUI on the host-side and
      1000Base-X/10GBase-R on the line-side, for now. The SGMII is also
      supported over 1000Base-X. Interrupts are not supported.
      
      Internal registers access compliant with the Clause 45 specification.
      Signed-off-by: default avatarIvan Bornyakov <i.bornyakov@metrotek.ru>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6e3bac3e
    • David S. Miller's avatar
      Merge branch 'stmmac-clocks' · 63fe6059
      David S. Miller authored
      Joakim Zhang says:
      
      ====================
      net: stmmac: implement clocks management
      
      This patch set tries to implement clocks management, and takes i.MX platform as an example.
      
      ---
      ChangeLogs:
      V1->V2:
      	* change to pm runtime mechanism.
      	* rename function: _enable() -> _config()
      	* take MDIO bus into account, it needs clocks when interface
      	is closed.
      	* reverse Christmass tree.
      V2->V3:
      	* slightly simple the code according to Andrew's suggesstion
      	and also add tag: Reviewed-by: Andrew Lunn <andrew@lunn.ch>
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      63fe6059
    • Joakim Zhang's avatar
      net: stmmac: dwmac-imx: add platform level clocks management for i.MX · 8f2f8376
      Joakim Zhang authored
      Split clocks settings from init callback into clks_config callback,
      which could support platform level clocks management.
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarJoakim Zhang <qiangqing.zhang@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8f2f8376
    • Joakim Zhang's avatar
      net: stmmac: add platform level clocks management · b4d45aee
      Joakim Zhang authored
      This patch intends to add platform level clocks management. Some
      platforms may have their own special clocks, they also need to be
      managed dynamically. If you want to manage such clocks, please implement
      clks_config callback.
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarJoakim Zhang <qiangqing.zhang@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b4d45aee
    • Joakim Zhang's avatar
      net: stmmac: add clocks management for gmac driver · 5ec55823
      Joakim Zhang authored
      This patch intends to add clocks management for stmmac driver:
      
      If CONFIG_PM enabled:
      1. Keep clocks disabled after driver probed.
      2. Enable clocks when up the net device, and disable clocks when down
      the net device.
      
      If CONFIG_PM disabled:
      Keep clocks always enabled after driver probed.
      
      Note:
      1. It is fine for ethtool, since the way of implementing ethtool_ops::begin
      in stmmac is only can be accessed when interface is enabled, so the clocks
      are ticked.
      2. The MDIO bus has a different life cycle to the MAC, need ensure
      clocks are enabled when _mdio_read/write() need clocks, because these
      functions can be called while the interface it not opened.
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarJoakim Zhang <qiangqing.zhang@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5ec55823
    • David S. Miller's avatar
      Merge branch 'net-pcs-stmmac=add-C37-AN-SGMII-support' · 91de5ac9
      David S. Miller authored
      Ong Boon Leong says:
      
      ====================
      net: pcs, stmmac: add C37 AN SGMII support
      
      This patch series adds MAC-side SGMII support to stmmac driver and it is
      changed as follow:-
      
      1/6: Refactor the current C73 implementation in pcs-xpcs to prepare for
           adding C37 AN later.
      2/6: Add MAC-side SGMII C37 AN support to pcs-xpcs
      3,4/6: make phylink_parse_mode() to work for non-DT platform so that
             we can use stmmac platform_data to set it.
      5/6: Make stmmac_open() to only skip PHY init if C73 is used, otherwise
           C37 AN will need phydev to be connected to phylink.
      6/6: Finally, add pcs-xpcs SGMII interface support to Intel mGbE
           controller.
      
      The patch series have been tested on EHL CRB PCH TSN (eth2) controller
      that has Marvell 88E1512 PHY attached over SGMII interface and the
      iterative tests of speed change (AN) + ping test have been successful.
      
      [63446.009295] intel-eth-pci 0000:00:1e.4 eth2: Link is Down
      [63449.986365] intel-eth-pci 0000:00:1e.4 eth2: Link is Up - 1Gbps/Full - flow control off
      [63449.987625] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
      [63451.248064] intel-eth-pci 0000:00:1e.4 eth2: Link is Down
      [63454.082366] intel-eth-pci 0000:00:1e.4 eth2: Link is Up - 100Mbps/Full - flow control off
      [63454.083650] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
      [63456.465179] intel-eth-pci 0000:00:1e.4 eth2: Link is Down
      [63459.202367] intel-eth-pci 0000:00:1e.4 eth2: Link is Up - 10Mbps/Full - flow control off
      [63459.203639] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
      [63460.882832] intel-eth-pci 0000:00:1e.4 eth2: Link is Down
      [63464.322366] intel-eth-pci 0000:00:1e.4 eth2: Link is Up - 1Gbps/Full - flow control off
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      91de5ac9
    • Ong Boon Leong's avatar
      stmmac: intel: add pcs-xpcs for Intel mGbE controller · 7310fe53
      Ong Boon Leong authored
      Intel mGbE controller such as those in EHL & TGL uses pcs-xpcs driver for
      SGMII interface. To ensure mdio bus scanning does not assign phy_device
      to MDIO-addressable entities like intel serdes and pcs-xpcs, we set up
      to phy_mask to skip them.
      Signed-off-by: default avatarOng Boon Leong <boon.leong.ong@intel.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7310fe53