1. 29 Jul, 2020 8 commits
    • Suman Anna's avatar
      remoteproc: k3-dsp: Add support for C71x DSPs · 87218f96
      Suman Anna authored
      The Texas Instrument's K3 J721E SoCs have a newer next-generation
      C71x DSP Subsystem in the MAIN voltage domain in addition to the
      previous generation C66x DSP subsystems. The C71x DSP subsystem is
      based on the TMS320C71x DSP CorePac module. The C71x CPU is a true
      64-bit machine including 64-bit memory addressing and single-cycle
      64-bit base arithmetic operations and supports vector signal processing
      providing a significant lift in DSP processing power over C66x DSPs.
      J721E SoCs use a C711 (a one-core 512-bit vector width CPU core) DSP
      that is cache coherent with the A72 Arm cores.
      
      Each subsystem has one or more Fixed/Floating-Point DSP CPUs, with 32 KB
      of L1P Cache, 48 KB of L1D SRAM that can be configured and partitioned as
      either RAM and/or Cache, and 512 KB of L2 SRAM configurable as either RAM
      and/or Cache. The CorePac also includes a Matrix Multiplication Accelerator
      (MMA), a Stream Engine (SE) and a C71x Memory Management Unit (CMMU), an
      Interrupt Controller (INTC) and a Powerdown Management Unit (PMU) modules.
      
      Update the existing K3 DSP remoteproc driver to add support for this C71x
      DSP subsystem. The firmware loading support is provided by using the newly
      added 64-bit ELF loader support, and is limited to images using only
      external DDR memory at the moment. The L1D and L2 SRAMs are used as scratch
      memory when using as RAMs, and cannot be used for loadable segments. The
      CMMU is also not supported to begin with, and the driver is designed to
      treat the MMU as if it is in bypass mode.
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
      Link: https://lore.kernel.org/r/20200612225357.8251-3-s-anna@ti.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      87218f96
    • Suman Anna's avatar
      dt-bindings: remoteproc: k3-dsp: Update bindings for C71x DSPs · c6caf22e
      Suman Anna authored
      Some Texas Instruments K3 family of SoCs have one of more newer
      generation TMS320C71x CorePac processor subsystem in addition to
      the existing TMS320C66x CorePac processor subsystems. Update the
      device tree bindings document for the C71x DSP devices.
      
      The example is also updated to show the single C71 DSP present
      on J721E SoCs.
      Reviewed-by: default avatarRob Herring <robh@kernel.org>
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Link: https://lore.kernel.org/r/20200612225357.8251-2-s-anna@ti.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      c6caf22e
    • Suman Anna's avatar
      remoteproc: k3-dsp: Add support for L2RAM loading on C66x DSPs · 21a4d738
      Suman Anna authored
      The resets for the DSP processors on K3 SoCs are managed through the
      Power and Sleep Controller (PSC) module. Each DSP typically has two
      resets - a global module reset for powering on the device, and a local
      reset that affects only the CPU while allowing access to the other
      sub-modules within the DSP processor sub-systems.
      
      The C66x DSPs have two levels of internal RAMs that can be used to
      boot from, and the firmware loading into these RAMs require the
      local reset to be asserted with the device powered on/enabled using
      the module reset. Enhance the K3 DSP remoteproc driver to add support
      for loading into the internal RAMs. The local reset is deasserted on
      SoC power-on-reset, so logic has to be added in probe in remoteproc
      mode to balance the remoteproc state-machine.
      
      Note that the local resets are a no-op on C71x cores, and the hardware
      does not supporting loading into its internal RAMs.
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
      Link: https://lore.kernel.org/r/20200721223617.20312-7-s-anna@ti.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      21a4d738
    • Suman Anna's avatar
      remoteproc: k3-dsp: Add a remoteproc driver of K3 C66x DSPs · 6edbe024
      Suman Anna authored
      The Texas Instrument's K3 J721E SoCs have two C66x DSP Subsystems in MAIN
      voltage domain that are based on the TI's standard TMS320C66x DSP CorePac
      module. Each subsystem has a Fixed/Floating-Point DSP CPU, with 32 KB each
      of L1P & L1D SRAMs that can be configured and partitioned as either RAM
      and/or Cache, and 288 KB of L2 SRAM with 256 KB of memory configurable as
      either RAM and/or Cache. The CorePac also includes an Internal DMA (IDMA),
      External Memory Controller (EMC), Extended Memory Controller (XMC) with a
      Region Address Translator (RAT) unit for 32-bit to 48-bit address
      extension/translations, an Interrupt Controller (INTC) and a Powerdown
      Controller (PDC).
      
      A new remoteproc module is added to perform the device management of
      these DSP devices. The support is limited to images using only external
      DDR memory at the moment, the loading support to internal memories and
      any on-chip RAM memories will be added in a subsequent patch. RAT support
      is also left for a future patch, and as such the reserved memory carveout
      regions are all expected to be using memory regions within the first 2 GB.
      Error Recovery and Power Management features are not currently supported.
      
      The C66x remote processors do not have an MMU, and so require fixed memory
      carveout regions matching the firmware image addresses. Support for this
      is provided by mandating multiple memory regions to be attached to the
      remoteproc device. The first memory region will be used to serve as the
      DMA pool for all dynamic allocations like the vrings and vring buffers.
      The remaining memory regions are mapped into the kernel at device probe
      time, and are used to provide address translations for firmware image
      segments without the need for any RSC_CARVEOUT entries. Any firmware
      image using memory outside of the supplied reserved memory carveout
      regions will be errored out.
      
      The driver uses various TI-SCI interfaces to talk to the System Controller
      (DMSC) for managing configuration, power and reset management of these
      cores. IPC between the A72 cores and the DSP cores is supported through
      the virtio rpmsg stack using shared memory and OMAP Mailboxes.
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
      Link: https://lore.kernel.org/r/20200721223617.20312-6-s-anna@ti.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      6edbe024
    • Suman Anna's avatar
      dt-bindings: remoteproc: Add bindings for C66x DSPs on TI K3 SoCs · 2a218020
      Suman Anna authored
      Some Texas Instruments K3 family of SoCs have one of more Digital Signal
      Processor (DSP) subsystems that are comprised of either a TMS320C66x
      CorePac and/or a next-generation TMS320C71x CorePac processor subsystem.
      Add the device tree bindings document for the C66x DSP devices on these
      SoCs. The added example illustrates the DT nodes for the first C66x DSP
      device present on the K3 J721E family of SoCs.
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Reviewed-by: default avatarRob Herring <robh@kernel.org>
      Link: https://lore.kernel.org/r/20200721223617.20312-5-s-anna@ti.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      2a218020
    • Suman Anna's avatar
      remoteproc: k3: Add TI-SCI processor control helper functions · cf7acb49
      Suman Anna authored
      Texas Instruments' K3 generation SoCs have specific modules/register
      spaces used for configuring the various aspects of a remote processor.
      These include power, reset, boot vector and other configuration features
      specific to each compute processor present on the SoC. These registers
      are managed by the System Controller such as DMSC on K3 AM65x SoCs.
      
      The Texas Instrument's System Control Interface (TI-SCI) Message Protocol
      is used to communicate to the System Controller from various compute
      processors to invoke specific services provided by the firmware running
      on the System Controller.
      
      Add a common processor control interface header file that can be used by
      multiple remoteproc drivers. The helper functions within this header file
      abstract the various TI SCI protocol ops for the remoteproc drivers, and
      allow them to request the System Controller to be able to program and
      manage various remote processors on the SoC. The remoteproc drivers are
      expected to manage the life-cycle of their ti_sci_proc_dev local
      structures.
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
      Link: https://lore.kernel.org/r/20200721223617.20312-4-s-anna@ti.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      cf7acb49
    • Suman Anna's avatar
      remoteproc: Introduce rproc_of_parse_firmware() helper · a8aa5ee1
      Suman Anna authored
      Add a new helper function rproc_of_parse_firmware() to the remoteproc
      core that can be used by various remoteproc drivers to look up the
      the "firmware-name" property from a rproc device node. This property
      is already being used by multiple drivers, so this helper can avoid
      repeating equivalent code in remoteproc drivers.
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
      Link: https://lore.kernel.org/r/20200721223617.20312-3-s-anna@ti.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      a8aa5ee1
    • Suman Anna's avatar
      dt-bindings: arm: keystone: Add common TI SCI bindings · 44aa656f
      Suman Anna authored
      Add a bindings document that defines the common TI SCI properties
      used by various K3 device management nodes such as clock controllers,
      interrupt controllers, reset controllers or remoteproc devices.
      
      The required properties for each device management node shall be
      specified in the respective binding document.
      Reviewed-by: default avatarRob Herring <robh@kernel.org>
      Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
      Link: https://lore.kernel.org/r/20200721223617.20312-2-s-anna@ti.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      44aa656f
  2. 28 Jul, 2020 5 commits
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  5. 18 Jul, 2020 11 commits
  6. 17 Jul, 2020 9 commits