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  1. 09 Dec, 2013 2 commits
  3. 05 Dec, 2013 2 commits
    • Fengguang Wu's avatar
      USB: fix coccinelle warnings · 2e30d14f
      Fengguang Wu authored 
      drivers/usb/host/ehci-mv.c:181:26-27: WARNING comparing pointer to 0, suggest !E
/c/kernel-tests/src/cocci/drivers/usb/host/ehci-mv.c:181:26-27: WARNING comparing pointer to 0

 Compare pointer-typed values to NULL rather than 0

Semantic patch information:
 This makes an effort to choose between !x and x == NULL.  !x is used
 if it has previously been used with the function used to initialize x.
 This relies on type information.  More type information can be obtained
 using the option -all_includes and the option -I to specify an
 include path.

Generated by: coccinelle/null/badzero.cocci

CC: Jingoo Han <jg1.han@samsung.com>
CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarFengguang Wu <fengguang.wu@intel.com>
      2e30d14f
    • Jingoo Han's avatar
      USB: remove DEFINE_PCI_DEVICE_TABLE macro · 2fd3f651
      Jingoo Han authored 
      Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro
is not preferred.
Signed-off-by: default avatarJingoo Han <jg1.han@samsung.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      2fd3f651
  5. 03 Dec, 2013 30 commits
  7. 02 Dec, 2013 6 commits
    • Xenia Ragiadakou's avatar
      xhci: replace xhci_write_64() with writeq() · 7dd09a1a
      Xenia Ragiadakou authored 
      Function xhci_write_64() is used to write 64bit xHC registers residing in MMIO.
On 32bit systems, xHC registers need to be written with 32bit accesses by
writing first the lower 32bits and then the higher 32bits. The header file
asm-generic/io-64-nonatomic-lo-hi.h ensures that on 32bit systems writeq() will
will write 64bit registers in 32bit chunks with low-high order.

Replace all calls to xhci_write_64() with calls to writeq().

This is done to reduce code duplication since 64bit low-high write logic
is already implemented and to take advantage of inherent "atomic" 64bit
write operations on 64bit systems.
Signed-off-by: default avatarXenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      7dd09a1a
    • Xenia Ragiadakou's avatar
      xhci: replace xhci_read_64() with readq() · e8b37332
      Xenia Ragiadakou authored 
      Function xhci_read_64() is used to read 64bit xHC registers residing in MMIO.
On 32bit systems, xHC registers need to be read with 32bit accesses by
reading first the lower 32bits and then the higher 32bits.

Replace all calls to xhci_read_64() with calls to readq() and include
asm-generic/io-64-nonatomic-lo-hi.h header file, so that if the system
is not 64bit, readq() will read registers in 32bit chunks with low-high order.

This is done to reduce code duplication since 64bit low-high read logic
is already implemented and to take advantage of inherent "atomic" 64bit
read operations on 64bit systems.
Signed-off-by: default avatarXenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      e8b37332
    • Xenia Ragiadakou's avatar
      xhci: replace xhci_writel() with writel() · 204b7793
      Xenia Ragiadakou authored 
      Function xhci_writel() is used to write a 32bit value in xHC registers residing
in MMIO address space. It takes as first argument a pointer to the xhci_hcd
although it does not use it. xhci_writel() internally simply calls writel().
This creates an illusion that xhci_writel() is an xhci specific function that
has to be called in a context where a pointer to xhci_hcd is available.

Remove xhci_writel() wrapper function and replace its calls with calls to
writel() to make the code more straight-forward.
Signed-off-by: default avatarXenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      204b7793
    • Xenia Ragiadakou's avatar
      xhci: replace xhci_readl() with readl() · b0ba9720
      Xenia Ragiadakou authored 
      Function xhci_readl() is used to read 32bit xHC registers residing in MMIO
address space. It takes as first argument a pointer to the xhci_hcd although
it does not use it. xhci_readl() internally simply calls readl(). This creates
an illusion that xhci_readl() is an xhci specific function that has to be
called in a context where a pointer to xhci_hcd is available.

Remove the unnecessary xhci_readl() wrapper function and replace its calls to
with calls to readl() to make the code more straightforward.
Signed-off-by: default avatarXenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      b0ba9720
    • Xenia Ragiadakou's avatar
      xhci: remove conversion from generic to pci device in xhci_mem.c · 2a100047
      Xenia Ragiadakou authored 
      This patch removes the to_pci_dev() conversion performed to generic struct
device since it is not actually useful (the pointer to the generic device
can be used directly rather through a conversion to pci_dev) and it is pci
bus specific.

This isn't stable material because this code will produce harmless
behavior on non-PCI xHCI hosts.  The pci_device pointer is never
dereferenced, only used to re-calculate the underlying device pointer.
Signed-off-by: default avatarXenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      2a100047
    • Xenia Ragiadakou's avatar
      xhci: fix incorrect type in assignment in xhci_count_num_dropped_endpoints() · 78d1ff02
      Xenia Ragiadakou authored 
      The fields 'add_flags' and 'drop_flags' in struct xhci_input_control_ctx
have type __le32 and need to be converted to CPU byteorder before being
used to derive the number of dropped endpoints.
This bug was found using sparse.

This patch is not suitable for stable, since the bug would only be
triggered on big endian systems, and the code only runs for Intel xHCI
host controllers, which are always integrated into little endian
systems.
Signed-off-by: default avatarXenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      78d1ff02
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