1. 21 Apr, 2020 1 commit
    • Matt Roper's avatar
      drm/i915: Use single set of AUX powerwell ops for gen11+ · 89e01caa
      Matt Roper authored
      AUX power wells sometimes need additional handling besides just
      programming the specific power well registers:
       * Type-C PHY's also require additional Type-C register programming
       * ICL combo PHY's require additional workarounds
       * TGL & EHL combo PHY's can be treated like any other power well
      
      Today we have dedicated aux ops for the ICL combo PHY and Type-C cases.
      This works fine, but means that when a new platform shows up with
      identical general power well handling, but different types of PHYs on
      its outputs, we have to define an entire new power well table for that
      platform and can't just re-use the table from the earlier platform -- as
      an example, see ehl_power_wells[], which is a subset of
      icl_power_wells[], *except* that we need to specify different AUX ops
      for the third display.
      
      If we instead create a single set of top-level aux ops that will check
      the PHY type and then dispatch to the appropriate handlers, we can get
      more reuse out of our power well definitions.  This allows us to
      immediately eliminate ehl_power_wells[] and simply reuse the ICL table;
      if future platforms follow the same general power well assignments as
      either ICL or TGL, we'll be able to re-use those tables in the same way.
      
      Note that I've only changed ICL+ platforms over to using the new icl_aux
      ops; at this point it's unlikely that we'll have any new platforms that
      re-use gen9 or earlier power well configurations.
      
      v2:
       - ICL_AUX_PW_TO_PHY() won't return the proper PHY for TBT AUX power
         wells.  But we know those wells will only used on Type-C outputs
         anyway, so we can just check is is_tc_tbt flag in the condition.
         (Jose).
      
      Cc: José Roberto de Souza <jose.souza@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200415233435.3064257-2-matthew.d.roper@intel.com
      89e01caa
  2. 20 Apr, 2020 19 commits
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