- 02 Jul, 2017 7 commits
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Bjorn Helgaas authored
* pci/resource: PCI: Work around poweroff & suspend-to-RAM issue on Macbook Pro 11 PCI: Do not disregard parent resources starting at 0x0 Conflicts: arch/x86/pci/fixup.c
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Bjorn Helgaas authored
* pci/portdrv: PCI/portdrv: Allocate MSI/MSI-X vector for Downstream Port Containment PCI/portdrv: Support multiple interrupts for MSI as well as MSI-X
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Bjorn Helgaas authored
* pci/pm: PCI/PM: Avoid using device_may_wakeup() for runtime PM x86/PCI: Avoid AMD SB7xx EHCI USB wakeup defect PCI/PM: Restore the status of PCI devices across hibernation drm/radeon: make MacBook Pro d3_delay quirk more generic drm/amdgpu: remove unnecessary save/restore of pdev->d3_delay PCI/PM: Add needs_resume flag to avoid suspend complete optimization PCI: imx6: Fix config read timeout handling switchtec: Fix minor bug with partition ID register switchtec: Use new cdev_device_add() helper function PCI: endpoint: Make PCI_ENDPOINT depend on HAS_DMA
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Bjorn Helgaas authored
* pci/msi: PCI/MSI: Ignore affinity if pre/post vector count is more than min_vecs
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Bjorn Helgaas authored
* pci/misc: x86/PCI: Simplify Dell DMI B1 quirk PCI: Add domain number check to find_smbios_instance_string() x86/PCI: Fix whitespace in set_bios_x() printk PCI: Correct PCI_STD_RESOURCE_END usage efi/fb: Correct PCI_STD_RESOURCE_END usage MIPS: PCI: Remove unused busn_offset MIPS: Loongson: Remove unused PCI_BAR_COUNT definition
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Bjorn Helgaas authored
* pci/enumeration: PCI: Enable ECRC only if device supports it PCI: Add sysfs max_link_speed/width, current_link_speed/width, etc PCI: Test INTx masking during enumeration, not at run-time
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Bjorn Helgaas authored
* pci/dpc: PCI/DPC: Fix control register setting PCI/DPC: Skip DPC event if device is not present
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- 30 Jun, 2017 5 commits
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Rafael J. Wysocki authored
pci_target_state() calls device_may_wakeup() which checks whether or not the device may wake up the system from sleep states, but pci_target_state() is used for runtime PM too. Since runtime PM is expected to always enable remote wakeup if possible, modify pci_target_state() to take additional argument indicating whether or not it should look for a state from which the device can signal wakeup and pass either the return value of device_can_wakeup(), or "false" (if the device itself is not wakeup-capable) to it from the code related to runtime PM. While at it, fix the comment in pci_dev_run_wake() which is not about sleep states. Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Mika Westerberg <mika.westerberg@linux.intel.com>
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Kai-Heng Feng authored
On an AMD Carrizo laptop, when EHCI runtime PM is enabled, EHCI ports do not assert PME# for device plug/unplug events while in D3. As Alan Stern points out [1], the PME signal is not enabled when controller is in D3, therefore it's not being woken up when new devices get plugged in. Testing shows PME signal works when the EHCI power state is D2. Clear the PCI_PM_CAP_PME_D3 and PCI_PM_CAP_PME_D3cold bits in dev->pme_support to indicate the device will not assert PME# from those states. [1] http://lkml.kernel.org/r/Pine.LNX.4.44L0.1706121010010.2092-100000@iolanthe.rowland.org Link: https://bugzilla.kernel.org/show_bug.cgi?id=196091 Link: https://support.amd.com/TechDocs/46837.pdf (Section 23) Link: https://support.amd.com/TechDocs/42413.pdf (Appendix A2) Signed-off-by:
Kai-Heng Feng <kai.heng.feng@canonical.com> [bhelgaas: changelog, add parens in quirk] Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Chen Yu authored
Currently we saw a lot of "No irq handler" errors during hibernation, which caused the system hang finally: ata4.00: qc timeout (cmd 0xec) ata4.00: failed to IDENTIFY (I/O error, err_mask=0x4) ata4.00: revalidation failed (errno=-5) ata4: SATA link up 6.0 Gbps (SStatus 133 SControl 300) do_IRQ: 31.151 No irq handler for vector According to above logs, there is an interrupt triggered and it is dispatched to CPU31 with a vector number 151, but there is no handler for it, thus this IRQ will not get acked and will cause an IRQ flood which kills the system. To be more specific, the 31.151 is an interrupt from the AHCI host controller. After some investigation, the reason why this issue is triggered is because the thaw_noirq() function does not restore the MSI/MSI-X settings across hibernation. The scenario is illustrated below: 1. Before hibernation, IRQ 34 is the handler for the AHCI device, which is bound to CPU31. 2. Hibernation starts, the AHCI device is put into low power state. 3. All the nonboot CPUs are put offline, so IRQ 34 has to be migrated to the last alive one - CPU0. 4. After the snapshot has been created, all the nonboot CPUs are brought up again; IRQ 34 remains bound to CPU0. 5. AHCI devices are put into D0. 6. The snapshot is written to the disk. The issue is triggered in step 6. The AHCI interrupt should be delivered to CPU0, however it is delivered to the original CPU31 instead, which causes the "No irq handler" issue. Ying Huang has provided a clue that, in step 3 it is possible that writing to the register might not take effect as the PCI devices have been suspended. In step 3, the IRQ 34 affinity should be modified from CPU31 to CPU0, but in fact it is not. In __pci_write_msi_msg(), if the device is already in low power state, the low level MSI message entry will not be updated but cached. During the device restore process after a normal suspend/resume, pci_restore_msi_state() writes the cached MSI back to the hardware. But this is not the case for hibernation. pci_restore_msi_state() is not currently called in pci_pm_thaw_noirq(), although pci_save_state() has saved the necessary PCI cached information in pci_pm_freeze_noirq(). Restore the PCI status for the device during hibernation. Otherwise the status might be lost across hibernation (for example, settings for MSI, MSI-X, ATS, ACS, IOV, etc.), which might cause problems during hibernation. Suggested-by:
Ying Huang <ying.huang@intel.com> Suggested-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by:
Chen Yu <yu.c.chen@intel.com> [bhelgaas: changelog] Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: stable@vger.kernel.org Cc: Len Brown <len.brown@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Rui Zhang <rui.zhang@intel.com> Cc: Ying Huang <ying.huang@intel.com>
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Bjorn Helgaas authored
The PCI Power Management Spec, r1.2, sec 5.6.1, requires a 10 millisecond delay when powering on a device, i.e., transitioning from state D3hot to D0. Apparently some devices require more time, and d1f9809e ("drm/radeon: add quirk for d3 delay during switcheroo poweron for apple macbooks") added an additional delay for the Radeon device in a MacBook Pro. 4807c5a8 ("drm/radeon: add a PX quirk list") made the affected device more explicit. Add a generic PCI quirk to increase the d3_delay. This means we will use the additional delay for *all* wakeups from D3, not just those initiated by radeon_switcheroo_set_state(). Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Andreas Boll <andreas.boll.dev@gmail.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> CC: Maarten Lankhorst <maarten.lankhorst@canonical.com>
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Bjorn Helgaas authored
Remove unnecessary save/restore of pdev->d3_delay. The only assignments to pdev->d3_delay are in radeon_switcheroo_set_state() and some quirks, none of which should be relevant in the amdgpu_switcheroo_set_state() path. Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Andreas Boll <andreas.boll.dev@gmail.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com>
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- 28 Jun, 2017 2 commits
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Bjorn Helgaas authored
Neither soft poweroff (transition to ACPI power state S5) nor suspend-to-RAM (transition to state S3) works on the Macbook Pro 11,4 and 11,5. The problem is related to the [mem 0x7fa00000-0x7fbfffff] space. When we use that space, e.g., by assigning it to the 00:1c.0 Root Port, the ACPI Power Management 1 Control Register (PM1_CNT) at [io 0x1804] doesn't work anymore. Linux does a soft poweroff (transition to S5) by writing to PM1_CNT. The theory about why this doesn't work is: - The write to PM1_CNT causes an SMI - The BIOS SMI handler depends on something in [mem 0x7fa00000-0x7fbfffff] - When Linux assigns [mem 0x7fa00000-0x7fbfffff] to the 00:1c.0 Port, it covers up whatever the SMI handler uses, so the SMI handler no longer works correctly Reserve the [mem 0x7fa00000-0x7fbfffff] space so we don't assign it to anything. This is voodoo programming, since we don't know what the real conflict is, but we've failed to find the root cause. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=103211 Tested-by: thejoe@gmail.com Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Cc: stable@vger.kernel.org Cc: Rafael J. Wysocki <rafael@kernel.org> Cc: Lukas Wunner <lukas@wunner.de> Cc: Chen Yu <yu.c.chen@intel.com>
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Bjorn Helgaas authored
John reported that an Intel QuickAssist crypto accelerator didn't work in a Dell PowerEdge R730. The problem seems to be that we enabled ECRC when the device doesn't support it: 85:00.0 Co-processor [0b40]: Intel Corporation DH895XCC Series QAT [8086:0435] Capabilities: [100 v1] Advanced Error Reporting AERCap: First Error Pointer: 00, GenCap- CGenEn+ ChkCap- ChkEn+ 1302fcf0 ("PCI: Configure *all* devices, not just hot-added ones") exposed the problem because it applies settings from the _HPX method to all devices, not just hot-added ones. The R730 supplies an _HPX method that allows the kernel to enable ECRC. Only enable ECRC if the device advertises support for it. Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1571798 Fixes: 1302fcf0 ("PCI: Configure *all* devices, not just hot-added ones") Reported-by:
John Mazzie <john_mazzie@dell.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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- 19 Jun, 2017 1 commit
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Wong Vee Khee authored
Expose PCIe bridges attributes such as secondary bus number, subordinate bus number, max link speed and link width, current link speed and link width via sysfs in /sys/bus/pci/devices/... This information is available via lspci, but that requires root privilege. Signed-off-by:
Wong Vee Khee <vee.khee.wong@ni.com> Signed-off-by:
Hui Chun Ong <hui.chun.ong@ni.com> [bhelgaas: changelog, return errors early to unindent usual case, return errors with same style throughout] Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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- 17 Jun, 2017 1 commit
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Gabriele Paoloni authored
Currently pcie_port_enable_irq_vec() only allocates MSI/MSI-X vectors for PME, hotplug, and AER. The Downstream Port Containment feature also supports MSI/MSI-X interrupts, so allocate a vector for it, too. Signed-off-by:
Liudongdong <liudongdong3@huawei.com> Signed-off-by:
Gabriele Paoloni <gabriele.paoloni@huawei.com> [bhelgaas: changelog, comment] Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de>
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- 16 Jun, 2017 2 commits
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Gabriele Paoloni authored
Root Ports can generate several different interrupts using either MSI or MSI-X, but we only support that for MSI-X. Ports that support MSI but not MSI-X are currently limited to sharing a single interrupt. Rename pcie_port_enable_msix() to pcie_port_enable_irq_vec() and extend it to support multiple interrupts using either MSI-X (preferred) or MSI. Signed-off-by:
Gabriele Paoloni <gabriele.paoloni@huawei.com> [bhelgaas: changelog, reword comments, simplify PME/hotplug no-MSI logic] Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de>
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Piotr Gregor authored
The test for INTx masking via PCI_COMMAND_INTX_DISABLE performed in pci_intx_mask_supported() should be done before the device can be used. This is to avoid writing PCI_COMMAND while the driver owns the device, in case that has any effect on MSI/MSI-X interrupts. Move the content of pci_intx_mask_supported() to pci_intx_mask_broken() and call it from pci_setup_device(). The test result can be queried at any time later using the same pci_intx_mask_supported() interface as before (though with changed implementation), so callers (uio, vfio) should be unaffected. Signed-off-by:
Piotr Gregor <piotrgregor@rsyncme.org> [bhelgaas: changelog, remove quirk check, remove locking, move dev->broken_intx_masking assignment to caller] Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Alex Williamson <alex.williamson@redhat.com> Acked-by:
Michael S. Tsirkin <mst@redhat.com>
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- 15 Jun, 2017 1 commit
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Jean Delvare authored
No need for such convoluted code, when all we need is to call one function in one specific case. Tested-by: Narendra K <Narendra.K@dell.com> # DellEMC PowerEdge 1950, R730XD Signed-off-by:
Jean Delvare <jdelvare@suse.de> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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- 13 Jun, 2017 4 commits
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Sujith Pandel authored
The function find_smbios_instance_string() does not consider the PCI domain number. As a result, SMBIOS type 41 device type instance would be exported to sysfs for all the PCI domains which have a PCI device with same bus/device/function, though PCI bus/device/func from a specific PCI domain has SMBIOS type 41 device type instance defined. Address the issue by making find_smbios_instance_string() check PCI domain number as well. Reported-by:
Shai Fultheim <Shai@ScaleMP.com> Suggested-by:
Shai Fultheim <Shai@ScaleMP.com> Tested-by:
Shai Fultheim <Shai@ScaleMP.com> Signed-off-by:
Sujith Pandel <sujithpshankar@gmail.com> Signed-off-by:
Narendra K <Narendra_K@Dell.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Vincent Legoll authored
Remove the space from "PCI :" to make the message consistent with other PCI messages. Signed-off-by:
Vincent Legoll <vincent.legoll@gmail.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Bjorn Helgaas authored
PCI_STD_RESOURCE_END is (confusingly) the index of the last valid BAR, not the *number* of BARs. To iterate through all possible BARs, we need to include PCI_STD_RESOURCE_END. Fixes: 9fe373f9 ("PCI: Increase IBM ipr SAS Crocodile BARs to at least system page size") Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Bjorn Helgaas authored
PCI_STD_RESOURCE_END is (confusingly) the index of the last valid BAR, not the *number* of BARs. To iterate through all possible BARs, we need to include PCI_STD_RESOURCE_END. Fixes: 55d728a4 ("efi/fb: Avoid reconfiguration of BAR that covers the framebuffer") Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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- 23 May, 2017 1 commit
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Imre Deak authored
Some drivers - like i915 - may not support the system suspend direct complete optimization due to differences in their runtime and system suspend sequence. Add a flag that when set resumes the device before calling the driver's system suspend handlers which effectively disables the optimization. Needed by a future patch fixing suspend/resume on i915. Suggested by Rafael. Signed-off-by:
Imre Deak <imre.deak@intel.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Acked-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: stable@vger.kernel.org
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- 22 May, 2017 7 commits
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Keith Busch authored
This driver was OR'ing desired bits from the existing control setting. That could create an invalid DPC Trigger Enabled configuration if the platform previously set this to "ERR_FATAL", 01b. The driver currently wants to set this to ERR_NONFATAL/ERR_FATAL, 10b, and the logical OR of this gets 11b, which is reserved. Fix that by masking off the fields it is setting. Signed-off-by:
Keith Busch <keith.busch@intel.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Keith Busch authored
The DPC interupt may be executed on a device that is being removed. Skip queuing event handling if the status is all 1's, which should be seen only if the device is not present. Signed-off-by:
Keith Busch <keith.busch@intel.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Lucas Stach authored
Commit cc7b0d49 ("PCI: designware: Update PCI config space remap function") made PCI configuration requests non-posted, which means we now get a synchronous abort when the CFG space read to probe for downstream devices times out. Synchronous aborts need to be handled differently from the async aborts we were getting before, in particular the PC needs to be advanced when resolving the abort. This is mostly a copy of what other PCI drivers do on ARM to handle those aborts. [bhelgaas: changelog, "Fixes"] Fixes: cc7b0d49 ("PCI: designware: Update PCI config space remap function") Tested-by:
Fabio Estevam <fabio.estevam@nxp.com> Tested-by:
Peter Senna Tschudin <peter.senna@collabora.com> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Acked-by:
Richard Zhu <hongxing.zhu@nxp.com>
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Logan Gunthorpe authored
When a switch endpoint is configured without NTB, the mmio_ntb registers will read all zeros. However, in corner case configurations where the partition ID is not zero and NTB is not enabled, the code will have the wrong partition ID and this causes the driver to use the wrong set of drivers. To fix this we simply take the partition ID from the system info region. Reported-by:
Dingbao Chen <dingbao.chen@microsemi.com> Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Logan Gunthorpe authored
Convert from "cdev_add() + device_add()" to cdev_device_add(), and from "device_del() + cdev_del()" to cdev_device_del(). [bhelgaas: changelog] Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Geert Uytterhoeven authored
If NO_DMA=y: drivers/built-in.o: In function `__pci_epc_create': (.text+0xef4e): undefined reference to `bad_dma_ops' drivers/built-in.o: In function `pci_epc_add_epf': (.text+0xf676): undefined reference to `bad_dma_ops' drivers/built-in.o: In function `pci_epf_alloc_space': (.text+0xfa32): undefined reference to `bad_dma_ops' drivers/built-in.o: In function `pci_epf_free_space': (.text+0xfac4): undefined reference to `bad_dma_ops' Add a dependency on HAS_DMA to fix this. Signed-off-by:
Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Michael Hernandez authored
min_vecs is the minimum amount of vectors needed to operate in MSI-X mode which may just include the vectors that don't need affinity. Disabling affinity settings causes the qla2xxx driver scsi_add_host() to fail when blk_mq is enabled as the blk_mq_pci_map_queues() expects affinity masks on each vector. Fixes: dfef358b ("PCI/MSI: Don't apply affinity if there aren't enough vectors left") Signed-off-by:
Michael Hernandez <michael.hernandez@cavium.com> Signed-off-by:
Himanshu Madhani <himanshu.madhani@cavium.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de> Cc: stable@vger.kernel.org # v4.10+
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- 18 May, 2017 2 commits
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Bjorn Helgaas authored
pci_add_resource_offset() is for host bridge windows where the bridge translates CPU addresses to PCI bus addresses by adding an offset. To my knowledge, no host bridge translates bus numbers, so this is only useful for MEM and IO windows. In any event, host->busn_offset is never set to anything other than zero, so pci_add_resource() is sufficient. a2e50f53 ("MIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controller") also added busn_resource itself. This is currently unused but may be used by future SGI IP27 fixes, so I left it there. Tested-by: Joshua Kinard <kumba@gentoo.org> # SGI IP30 and IP27 Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Acked-by:
Joshua Kinard <kumba@gentoo.org>
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Bjorn Helgaas authored
Remove unused PCI_BAR_COUNT definition. Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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- 17 May, 2017 1 commit
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Ard Biesheuvel authored
Commit f44116ae ("PCI: Remove pci_find_parent_resource() use for allocation") updated the logic that iterates over all bus resources and compares them to a given resource, in order to decide whether one is the parent of the latter. This change inadvertently causes pci_find_parent_resource() to disregard resources starting at address 0x0, resulting in an error such as the one below on ARM systems whose I/O window starts at 0x0. pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff window] pci_bus 0000:00: root bus resource [io 0x0000-0xffff window] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff window] pci_bus 0000:00: root bus resource [bus 00-0f] pci 0000:00:01.0: PCI bridge to [bus 01] pci 0000:00:02.0: PCI bridge to [bus 02] pci 0000:00:03.0: PCI bridge to [bus 03] pci 0000:00:03.0: can't claim BAR 13 [io 0x0000-0x0fff]: no compatible bridge window pci 0000:03:01.0: can't claim BAR 0 [io 0x0000-0x001f]: no compatible bridge window While this never happens on x86, it is perfectly legal in general for a PCI MMIO or IO window to start at address 0x0, and it was supported in the code before commit f44116ae. Drop the test for res->start != 0; resource_contains() already checks whether [start, end) completely covers the resource, and so it should be redundant. Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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- 13 May, 2017 5 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/dtor/inputLinus Torvalds authored
Pull some more input subsystem updates from Dmitry Torokhov: "An updated xpad driver with a few more recognized device IDs, and a new psxpad-spi driver, allowing connecting Playstation 1 and 2 joypads via SPI bus" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: cros_ec_keyb - remove extraneous 'const' Input: add support for PlayStation 1/2 joypads connected via SPI Input: xpad - add USB IDs for Mad Catz Brawlstick and Razer Sabertooth Input: xpad - sync supported devices with xboxdrv Input: xpad - sort supported devices by USB ID
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git://git.infradead.org/linux-ubifsLinus Torvalds authored
Pull UBI/UBIFS updates from Richard Weinberger: - new config option CONFIG_UBIFS_FS_SECURITY - minor improvements - random fixes * tag 'upstream-4.12-rc1' of git://git.infradead.org/linux-ubifs: ubi: Add debugfs file for tracking PEB state ubifs: Fix a typo in comment of ioctl2ubifs & ubifs2ioctl ubifs: Remove unnecessary assignment ubifs: Fix cut and paste error on sb type comparisons ubi: fastmap: Fix slab corruption ubifs: Add CONFIG_UBIFS_FS_SECURITY to disable/enable security labels ubi: Make mtd parameter readable ubi: Fix section mismatch
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git://git.kernel.org/pub/scm/linux/kernel/git/rw/umlLinus Torvalds authored
Pull UML fixes from Richard Weinberger: "No new stuff, just fixes" * 'for-linus-4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml: um: Add missing NR_CPUS include um: Fix to call read_initrd after init_bootmem um: Include kbuild.h instead of duplicating its macros um: Fix PTRACE_POKEUSER on x86_64 um: Set number of CPUs um: Fix _print_addr()
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Linus Torvalds authored
Merge misc fixes from Andrew Morton: "15 fixes" * emailed patches from Andrew Morton <akpm@linux-foundation.org>: mm, docs: update memory.stat description with workingset* entries mm: vmscan: scan until it finds eligible pages mm, thp: copying user pages must schedule on collapse dax: fix PMD data corruption when fault races with write dax: fix data corruption when fault races with write ext4: return to starting transaction in ext4_dax_huge_fault() mm: fix data corruption due to stale mmap reads dax: prevent invalidation of mapped DAX entries Tigran has moved mm, vmalloc: fix vmalloc users tracking properly mm/khugepaged: add missed tracepoint for collapse_huge_page_swapin gcov: support GCC 7.1 mm, vmstat: Remove spurious WARN() during zoneinfo print time: delete current_fs_time() hwpoison, memcg: forcibly uncharge LRU pages
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- 12 May, 2017 1 commit
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Roman Gushchin authored
Commit 4b4cea91691d ("mm: vmscan: fix IO/refault regression in cache workingset transition") introduced three new entries in memory stat file: - workingset_refault - workingset_activate - workingset_nodereclaim This commit adds a corresponding description to the cgroup v2 docs. Link: http://lkml.kernel.org/r/1494530293-31236-1-git-send-email-guro@fb.comSigned-off-by:
Roman Gushchin <guro@fb.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Michal Hocko <mhocko@kernel.org> Cc: Vladimir Davydov <vdavydov.dev@gmail.com> Cc: Tejun Heo <tj@kernel.org> Cc: Li Zefan <lizefan@huawei.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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