1. 29 Sep, 2022 5 commits
  2. 28 Sep, 2022 2 commits
    • Jing Zhang's avatar
      perf arm-spe: augment the data source type with neoverse_spe list · 74a61d53
      Jing Zhang authored
      When synthesizing event with SPE data source, commit 4e6430cb("perf
      arm-spe: Use SPE data source for neoverse cores") augment the type with
      source information by MIDR. However, is_midr_in_range only compares the
      first entry in neoverse_spe.
      
      Change is_midr_in_range to is_midr_in_range_list to traverse the
      neoverse_spe array so that all neoverse cores synthesize event with data
      source packet.
      
      Fixes: 4e6430cb ("perf arm-spe: Use SPE data source for neoverse cores")
      Reviewed-by: default avatarAli Saidi <alisaidi@amazon.com>
      Reviewed-by: default avatarLeo Yan <leo.yan@linaro.org>
      Signed-off-by: default avatarJing Zhang <renyu.zj@linux.alibaba.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Ali Saidi <alisaidi@amazon.com>
      Cc: German Gomez <german.gomez@arm.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: James Clark <james.clark@arm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.garry@huawei.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Shuai Xue <xueshuai@linux.alibaba.com>
      Cc: Timothy Hayes <timothy.hayes@arm.com>
      Cc: Will Deacon <will@kernel.org>
      Cc: Zhuo Song <zhuo.song@linux.alibaba.com>
      Link: https://lore.kernel.org/r/1664197396-42672-1-git-send-email-renyu.zj@linux.alibaba.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      74a61d53
    • Athira Rajeev's avatar
      perf tests vmlinux-kallsyms: Update is_ignored_symbol function to match the kernel ignored list · 50644243
      Athira Rajeev authored
      The testcase “vmlinux-kallsyms.c” fails in powerpc.
      
      	vmlinux symtab matches kallsyms: FAILED!
      
      This test look at the symbols in the vmlinux DSO and check if we find
      all of them in the kallsyms dso.
      
      But from the powerpc logs , observed that the failure happens for:
      
      	ERR : 0xc0000000000fe9c8: .Lmfspr_table not on kallsyms
      	ERR : 0xc0000000001009c8: .Lmtspr_table not on kallsyms
      
      These are labels ( with .L) in the source code and has to be ignored.
      Reference code with .Lmtspr_table: arch/powerpc/xmon/spr_access.S
      
      The testcases invokes is_ignored_symbol() function to ignore hidden
      symbols in the dso like local symbols. This function is adapted from
      is_ignored_symbol() kernel function in code: scripts/kallsyms.c . The
      kernel function got some updates which is not reflected in the testcase
      function and the new updates also handles ignoring "labels".
      
      Below is the changes that went in the kernel function.
      
      	 /* Symbol names that begin with the following are ignored.*/
      	 static const char * const ignored_prefixes[] = {
      	 		"$",			/* local symbols for ARM, MIPS, etc. */
      	-		".LASANPC",		/* s390 kasan local symbols */
      	+		".L",			/* local labels, .LBB,.Ltmpxxx,.L__unnamed_xx,.LASANPC, etc. */
      	 		"__crc_",		/* modversions */
      	 		"__efistub_",		/* arm64 EFI stub namespace */
      	-		"__kvm_nvhe_",		/* arm64 non-VHE KVM namespace */
      	+		"__kvm_nvhe_$",		/* arm64 local symbols in non-VHE KVM namespace */
      	+		"__kvm_nvhe_.L",	/* arm64 local symbols in non-VHE KVM namespace */
      	 		"__AArch64ADRPThunk_",	/* arm64 lld */
      	 		"__ARMV5PILongThunk_",	/* arm lld */
      	 		"__ARMV7PILongThunk_",
      
      This change is part of below commits and will handle the
      symbols with “.L”
      
      commit d4c85864 ("kallsyms: ignore all local labels prefixed by '.L'")
      commit 6ccf9cb5 ("KVM: arm64: Symbolize the nVHE HYP addresses")
      
      Update the testcase function to include the new changes.
      Reported-by: default avatarDisha Goel <disgoel@linux.vnet.ibm.com>
      Signed-off-by: default avatarAthira Jajeev <atrajeev@linux.vnet.ibm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Kajol Jain <kjain@linux.ibm.com>
      Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Nageswara R Sastry <rnsastry@linux.ibm.com>
      Cc: linuxppc-dev@lists.ozlabs.org
      Link: https://lore.kernel.org/r/20220928045218.37322-1-atrajeev@linux.vnet.ibm.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      50644243
  3. 26 Sep, 2022 4 commits
    • Athira Rajeev's avatar
      perf tests powerpc: Fix branch stack sampling test to include sanity check for branch filter · f4a2aade
      Athira Rajeev authored
      Commit b55878c9 ("perf test: Add test for branch stack
      sampling") added test for branch stack sampling. There is a sanity check
      in the beginning to skip the test if the hardware doesn't support branch
      stack sampling.
      
      Snippet
      <<>>
      skip the test if the hardware doesn't support branch stack sampling
      perf record -b -o- -B true > /dev/null 2>&1 || exit 2
      <<>>
      
      But the testcase also uses branch sample types: save_type, any. if any
      platform doesn't support the branch filters used in the test, the testcase
      will fail. In powerpc, currently mutliple branch filters are not supported
      and hence this test fails in powerpc. Fix the sanity check to look at
      the support for branch filters used in this test before proceeding with
      the test.
      
      Fixes: b55878c9 ("perf test: Add test for branch stack sampling")
      Reported-by: default avatarDisha Goel <disgoel@linux.vnet.ibm.com>
      Reviewed-by: default avatarKajol Jain <kjain@linux.ibm.com>
      Signed-off-by: default avatarAthira Jajeev <atrajeev@linux.vnet.ibm.com>
      Cc: German Gomez <german.gomez@arm.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Nageswara R Sastry <rnsastry@linux.ibm.com>
      Link: https://lore.kernel.org/r/20220921145255.20972-2-atrajeev@linux.vnet.ibm.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      f4a2aade
    • Zhengjun Xing's avatar
      perf parse-events: Remove "not supported" hybrid cache events · 71c86cda
      Zhengjun Xing authored
      By default, we create two hybrid cache events, one is for cpu_core, and
      another is for cpu_atom. But Some hybrid hardware cache events are only
      available on one CPU PMU. For example, the 'L1-dcache-load-misses' is only
      available on cpu_core, while the 'L1-icache-loads' is only available on
      cpu_atom. We need to remove "not supported" hybrid cache events. By
      extending is_event_supported() to global API and using it to check if the
      hybrid cache events are supported before being created, we can remove the
      "not supported" hybrid cache events.
      
      Before:
      
       # ./perf stat -e L1-dcache-load-misses,L1-icache-loads -a sleep 1
      
       Performance counter stats for 'system wide':
      
                  52,570      cpu_core/L1-dcache-load-misses/
         <not supported>      cpu_atom/L1-dcache-load-misses/
         <not supported>      cpu_core/L1-icache-loads/
               1,471,817      cpu_atom/L1-icache-loads/
      
             1.004915229 seconds time elapsed
      
      After:
      
       # ./perf stat -e L1-dcache-load-misses,L1-icache-loads -a sleep 1
      
       Performance counter stats for 'system wide':
      
                  54,510      cpu_core/L1-dcache-load-misses/
               1,441,286      cpu_atom/L1-icache-loads/
      
             1.005114281 seconds time elapsed
      
      Fixes: 30def61f ("perf parse-events: Create two hybrid cache events")
      Reported-by: default avatarYi Ammy <ammy.yi@intel.com>
      Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
      Signed-off-by: default avatarXing Zhengjun <zhengjun.xing@linux.intel.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Alexander Shishkin <alexander.shishkin@intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jin Yao <yao.jin@linux.intel.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: https://lore.kernel.org/r/20220923030013.3726410-2-zhengjun.xing@linux.intel.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      71c86cda
    • Zhengjun Xing's avatar
      perf print-events: Fix "perf list" can not display the PMU prefix for some hybrid cache events · e28c0787
      Zhengjun Xing authored
      Some hybrid hardware cache events are only available on one CPU PMU. For
      example, 'L1-dcache-load-misses' is only available on cpu_core.
      
      We have supported in the perf list clearly reporting this info, the
      function works fine before but recently the argument "config" in API
      is_event_supported() is changed from "u64" to "unsigned int" which
      caused a regression, the "perf list" then can not display the PMU prefix
      for some hybrid cache events.
      
      For the hybrid systems, the PMU type ID is stored at config[63:32],
      define config to "unsigned int" will miss the PMU type ID information,
      then the regression happened, the config should be defined as "u64".
      
      Before:
       # ./perf list |grep "Hardware cache event"
        L1-dcache-load-misses                              [Hardware cache event]
        L1-dcache-loads                                    [Hardware cache event]
        L1-dcache-stores                                   [Hardware cache event]
        L1-icache-load-misses                              [Hardware cache event]
        L1-icache-loads                                    [Hardware cache event]
        LLC-load-misses                                    [Hardware cache event]
        LLC-loads                                          [Hardware cache event]
        LLC-store-misses                                   [Hardware cache event]
        LLC-stores                                         [Hardware cache event]
        branch-load-misses                                 [Hardware cache event]
        branch-loads                                       [Hardware cache event]
        dTLB-load-misses                                   [Hardware cache event]
        dTLB-loads                                         [Hardware cache event]
        dTLB-store-misses                                  [Hardware cache event]
        dTLB-stores                                        [Hardware cache event]
        iTLB-load-misses                                   [Hardware cache event]
        node-load-misses                                   [Hardware cache event]
        node-loads                                         [Hardware cache event]
      
      After:
       # ./perf list |grep "Hardware cache event"
        L1-dcache-loads                                    [Hardware cache event]
        L1-dcache-stores                                   [Hardware cache event]
        L1-icache-load-misses                              [Hardware cache event]
        LLC-load-misses                                    [Hardware cache event]
        LLC-loads                                          [Hardware cache event]
        LLC-store-misses                                   [Hardware cache event]
        LLC-stores                                         [Hardware cache event]
        branch-load-misses                                 [Hardware cache event]
        branch-loads                                       [Hardware cache event]
        cpu_atom/L1-icache-loads/                          [Hardware cache event]
        cpu_core/L1-dcache-load-misses/                    [Hardware cache event]
        cpu_core/node-load-misses/                         [Hardware cache event]
        cpu_core/node-loads/                               [Hardware cache event]
        dTLB-load-misses                                   [Hardware cache event]
        dTLB-loads                                         [Hardware cache event]
        dTLB-store-misses                                  [Hardware cache event]
        dTLB-stores                                        [Hardware cache event]
        iTLB-load-misses                                   [Hardware cache event]
      
      Fixes: 9b7c7728 ("perf parse-events: Break out tracepoint and printing")
      Reported-by: default avatarYi Ammy <ammy.yi@intel.com>
      Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
      Signed-off-by: default avatarXing Zhengjun <zhengjun.xing@linux.intel.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Alexander Shishkin <alexander.shishkin@intel.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Ian Rogers <irogers@google.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Link: https://lore.kernel.org/r/20220923030013.3726410-1-zhengjun.xing@linux.intel.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      e28c0787
    • Namhyung Kim's avatar
      perf tools: Get a perf cgroup more portably in BPF · e42c9c54
      Namhyung Kim authored
      The perf_event_cgrp_id can be different on other configurations.
      
      To be more portable as CO-RE, it needs to get the cgroup subsys id using
      the bpf_core_enum_value() helper.
      Suggested-by: default avatarIan Rogers <irogers@google.com>
      Reviewed-by: default avatarIan Rogers <irogers@google.com>
      Signed-off-by: default avatarNamhyung Kim <namhyung@kernel.org>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Hao Luo <haoluo@google.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Song Liu <songliubraving@fb.com>
      Cc: bpf@vger.kernel.org
      Link: https://lore.kernel.org/r/20220923063205.772936-1-namhyung@kernel.orgSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      e42c9c54
  4. 25 Sep, 2022 8 commits
  5. 24 Sep, 2022 10 commits
  6. 23 Sep, 2022 11 commits