1. 15 May, 2015 39 commits
  2. 04 May, 2015 1 commit
    • Gregory CLEMENT's avatar
      gpio: mvebu: Fix mask/unmask managment per irq chip type · a4bba4c1
      Gregory CLEMENT authored
      commit 61819549 upstream.
      
      Level IRQ handlers and edge IRQ handler are managed by tow different
      sets of registers. But currently the driver uses the same mask for the
      both registers. It lead to issues with the following scenario:
      
      First, an IRQ is requested on a GPIO to be triggered on front. After,
      this an other IRQ is requested for a GPIO of the same bank but
      triggered on level. Then the first one will be also setup to be
      triggered on level. It leads to an interrupt storm.
      
      The different kind of handler are already associated with two
      different irq chip type. With this patch the driver uses a private
      mask for each one which solves this issue.
      
      It has been tested on an Armada XP based board and on an Armada 375
      board. For the both boards, with this patch is applied, there is no
      such interrupt storm when running the previous scenario.
      
      This bug was already fixed but in a different way in the legacy
      version of this driver by Evgeniy Dushistov:
      9ece8839 "ARM: orion: Fix for certain
      sequence of request_irq can cause irq storm". The fact the new version
      of the gpio drive could be affected had been discussed there:
      http://thread.gmane.org/gmane.linux.ports.arm.kernel/344670/focus=364012Reported-by: default avatarEvgeniy A. Dushistov <dushistov@mail.ru>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      a4bba4c1