- 20 Sep, 2012 40 commits
-
-
Alex Deucher authored
Compare the adjusted clock as well as the crtc mode clock. This handles cases where the driver adjusts the clock for specific special cases. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
This saves lots of lookups later. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
We need the calculate the pixel clock before allocating a PPLL in order to insure the clocks really match. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
If several non-DP displays use the same pixel clock we can use the same PPLL for all of them. If all relevant displays have the same pixel clock, this allows the driver to: - use fewer PPLLs which saves power - support more than two non-DP displays on DCE4+ The current drm modesetting infrastructure doesn't really provide a good framework for validating combinations that work or won't work, so it's possible you could go from a working configuration to a non-working one by changing the mode a one of the displays. However, there this is better than what was there before. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
If possible, use a single PPLL for multiple DP displays on DCE3.x. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
For DP we can use the same PPLL for all active DP encoders. Take advantage of that to prevent cases where we may end up sharing a PPLL between DP and non-DP which won't work. Also clean up the code a bit. v2: - fix missing pll_id assignment in crtc init v3: - fix DP PPLL check - document functions - break in main encoder search loop after matching. no need to keep checking additional encoders. v4: - same as v3, but re-apply to drm-next as the corner cases are fixed properly in subsequent patches. fixes: https://bugs.freedesktop.org/show_bug.cgi?id=54471Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
comparing the encoder mode to the encoder id for DVO. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
MiscInfo field should be programmed with the crtc id rather than the pll id. However, at this point the two are the same for chips with this version of the table. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Makes it more consistent with the surrounding code. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Use the proper struct in the union. That field has the same offset in every struct, so no functional change. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Christian König authored
Roughly based on how nouveau is handling it. Instead of adding the bo_va when the address is set add the bo_va when the handle is opened, but set the address to zero until userspace tells us where to place it. This fixes another bunch of problems with glamor. v2: agd5f: fix build after dropping patch 7/8. Signed-off-by:
Christian König <deathsimple@vodafone.de>
-
Christian König authored
Make the reserve non interruptible. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
The no_wait param isn't used anywhere, and actually isn't very usefull at all. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
It doesn't really belong into the object functions, also rename it to avoid collisions with struct radeon_bo_va. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
Even GPUs can have a null pointer dereference, so move the IB pool to another offset to catch those. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
The end offset is exclusive not inclusive. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
When a VM is used on more than one ring we need to sync to the last user. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Lauri Kasanen authored
This applies on top of drm/radeon: Mark all possible functions / structs as static. Signed-off-by:
Lauri Kasanen <cand@gmx.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Lauri Kasanen authored
Let's allow GCC to optimize better. This exposed some five unused functions, but this patch doesn't remove them. Signed-off-by:
Lauri Kasanen <cand@gmx.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Was removed in the async VM update series. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Don't read past the end of the array if we encounter an unknown thermal controller. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Christian König authored
Currently doing the update with the CP. v2: Rebased on Jeromes bugfix. Make validity comparison more human readable. Signed-off-by:
Christian König <deathsimple@vodafone.de>
-
Jerome Glisse authored
Make sure that the ib bo is bound and is page table is up to date in the virtual address space. Signed-off-by:
Jerome Glisse <jglisse@redhat.com> Reviewed-by:
Christian König <christian.koenig@amd.com>
-
Christian König authored
Makes it easier to move it into the rings. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
Removing the need to wait for anything. Still not ideal, since we need to free pt on va remove. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
Move binding onto the ring, simplifying handling a bit. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
Move flushing the VMs as function into the rings. First step to make VM operations async. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
It actually isn't very useful. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
So it looks more like the rest of the driver. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Christian König authored
Store a reference to the VM into the IB structure, that makes calculating the IBs address a bit less complicated. Signed-off-by:
Christian König <deathsimple@vodafone.de> Reviewed-by:
Jerome Glisse <jglisse@redhat.com>
-
Alex Deucher authored
Several encoder setup functions had the same duplicated code for selecting the proper bpc setting for various atom tables. Consolidate it. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
This cleans up the interface a bit as well. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Just verify the interface and track what functions are supported. Not actually used yet. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
v2: rebase updates Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
- rework the acpi execute code - User proper parameters for ATPX functions v2: rebase fixes Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Verify the ATPX interface and track what ATPX functions are available for future use. v2: rework due to tree changes Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-
Alex Deucher authored
Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
-