- 10 Oct, 2022 20 commits
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Alvin Lee authored
Watermark calculation was incorrect due to missing brackets. Fixes: 85f4bc0c ("drm/amd/display: Add SubVP required code") Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by:
Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by:
Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.0
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Rodrigo Siqueira authored
The OTG_MASTER_UPDATE_LOCK_SEL is used for GSL and OTGs in the same group for selecting the OTG_MASTER_UPDATE_LOCK from the same OTG. At some point, it a check was added to see if OTG is running or not, which is not necessary, and for this reason, this commit dropped that check. Tested-by:
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Rodrigo Siqueira authored
In multiple parts of the DCN code, we write directly to the OTG_V_TOTAL_* registers in some OPTC functions. Let's avoid it by using the set_vtotal_min_max. Tested-by:
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Rodrigo Siqueira authored
The struct timing_generator_funcs provides a hook for setting up the maximum possible vertical dimension of display for OTG, as the panel supports. DCN10 has a standard function named optc1_set_vtotal_min_max which all ASICs can use to set the aforementioned hook. Since we did not set it for DCN20, this commit initializes the set_vtotal_min_max with the DCN10 function. Tested-by:
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Dmytro Laktyushkin authored
Prevents certain configs blocking s0i3 when streams aren't completely removed Tested-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by:
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Meenakshikumar Somasundaram authored
[Why] Dpia hpd interrupt processing is disabled when entering S4/S0i3 and would be reenabled after detection completes during resuming. Because, keeping hpd interrupts enabled during detection leads to multiple detections for the same hpd transition. There is a S4 case where dpia hpd interrupt is missed when driver is in transitioning from hpd interrupt processing disable to enable and the display does not light up. [How] - Added dmub inbox command DMUB_CMD__DPIA_HPD_INT_ENABLE to explicitly control dmub to issue dpia hpd interrupt or not. If dpia hpd interrupt is disabled, dmub will keep the hpd pending and post it once driver reenables dpia hpd interrupt or when querying with DMUB_CMD__QUERY_HPD_STATE. - Added dmub boot option dpia_hpd_int_enable_supported to notify dmub about whether DMUB_CMD__DPIA_HPD_INT_ENABLE command would be used. Tested-by:
Mustapha Ghaddar <Mustapha.Ghaddar@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by:
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Max Tseng authored
Since different features would need to update cursor registers, However, they would use different approaches. To unify varied methods, this refactor is implemented the same update cursor info method for current varied features. Tested-by:
Anthony Koo <Anthony.Koo@amd.com> Reviewed-by:
Max Tseng <Max.Tseng@amd.com> Signed-off-by:
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Dillon Varone authored
[Why & How] FCLK pstate allow message should not be dependent on local "update_fclk". Tested-by:
Martin Leung <Martin.Leung@amd.com> Acked-by:
Dillon Varone <Dillon.Varone@amd.com> Signed-off-by:
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Dillon Varone authored
[Why & How] Acquire FCLK DPM levels to properly construct DML clock limits. Further add new logic to keep number of indices for each clock in clk_mgr. Tested-by:
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Fangzhi Zuo authored
Before enabling new crtc, stream_count in dc_state does not sync with that in drm_atomic_state. Validating dsc in such case would leave newly added stream not jointly participating in dsc optimization with existing streams, but simply using default initialized vcpi all the time which gives wrong dsc determination decision. Consider the scenaio where one 4k60 connected to the dock under dp-alt mode. Since dp-alt mode is 2-lane setup, stream 1 consumes 63 slots with dsc needed. Then hook up a second 4k60 to the dock. stream 2 connected with 65 slot initialized by default without dsc. dsc pre validate will not jointly optimize stream 2 with stream 1 before crtc 2 added into the dc_state. That leads to stream 2 not getting dsc optimization, and trigger atomic_check failure all the time, as 65 > 63 limit. After getting all new crtcs added into the state, stream_count in dc_state correctly reflect that in drm_atomic_state which comes up with correct dsc decision. Fixes: 71be4b16 ("drm/amd/display: dsc validate fail not pass to atomic check") Tested-by:
Roman Li <Roman.Li@amd.com> Acked-by:
Fangzhi Zuo <Jerry.Zuo@amd.com> Tested-by:
Mark Broadworth <mark.broadworth@amd.com> Signed-off-by:
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Jun Lei authored
[Why & How] Add a helper to map ODM/MPC/Multi-Plane resources from DC Tested-by:
Nevenko Stupar <Nevenko.Stupar@amd.com> Reviewed-by:
Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by:
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Vladimir Stempen authored
[Why] Diagnostics reports exceptions generated when timeout waiting for DISPCLK frequency divider change expires when testing ODM4to1. Diagnostics reports exceptions generated when timeout waiting for OTG busy status expires when disabling OTG during ODM4to1 test. [How] Increase HW status waiting time for DISPCLK frequency divider change and OTG busy status when disable OTG. Tested-by:
Ariel Bernstein <Eric.Bernstein@amd.com> Acked-by:
Vladimir Stempen <vladimir.stempen@amd.com> Signed-off-by:
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Aurabindo Pillai authored
[Why&How] Doing timing sync seqence for phantom pipes will not go through since they are not fully programmed like normal pipes. Skip the sequence on such pipes Tested-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
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Dillon Varone authored
[Why?] Currently phy_pix_clk is used to program DTO's which is incorrect. [How?] Use the timing pixel clock to program DTO's correctly. Reviewed-by:
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Josip Pavic authored
[Why & How] Increase width of some variables to avoid comparing integers of different widths Reviewed-by:
Josip Pavic <Josip.Pavic@amd.com> Signed-off-by:
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Martin Leung authored
[Why & How] bug was caused when moving variable from stack to heap because it was reusable and garbage was left over, so we need to zero mem Fixes: 7acc487a ("drm/amd/display: reduce stack size in dcn32 dml (v2)") Tested-by:
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Vladimir Stempen authored
[Why] Bandwidth validation is using Freesync parameters from previous Freesync state. Bandwidth validation ignores DCFCLK calculated after Freesync parameters are configured [How] Set Freesync bandwidth parameters to its default state before running bandwidth validation. Take DCFCLK calculated after Freesync bandwidth parameters are assigned and bandwidth is recalculated. Tested-by:
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Dillon Varone authored
This reverts commit e4e481e4. [Why & How] The reverted commit creates memory leak and causes issue upon driver install. Tested-by:
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Nicholas Kazlauskas authored
[Why] Request from PMFW to change the messaging format to specify whether we support z-state via individual bits. [How] Update the args we pass in the support message. Fixes: d5c6909e ("drm/amd/display: Add DCN314 clock manager") Tested-by:
Mario Limonciello <mario.limonciello@amd.com> Acked-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by:
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Shirish S authored
[Why] If psr_feature_enable is set to true by default, it continues to be enabled for non capable links. [How] explicitly disable the feature on links that are not capable of the same. Fixes: 8c322309 ("drm/amd/display: Enable PSR") Signed-off-by:
Shirish S <shirish.s@amd.com> Reviewed-by:
Leo Li <sunpeng.li@amd.com> Reviewed-by:
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- 06 Oct, 2022 20 commits
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Hamza Mahfooz authored
This reverts commit 66f99628. Unfortunately, that commit causes performance regressions on non-PSR setups. So, just revert it until FB_DAMAGE_CLIPS support can be added. Cc: stable@vger.kernel.org Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2189 Link: https://bugzilla.kernel.org/show_bug.cgi?id=216554 Fixes: 66f99628 ("drm/amdgpu: use dirty framebuffer helper") Fixes: abbc7a3d ("drm/amdgpu: don't register a dirty callback for non-atomic") Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Acked-by:
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Philip Yang authored
amdkfd_total_mem_size is the size of total GPUs vram plus system memory to estimate page tables memory usage and leave enough VRAM room for page tables allocation. Calculate amdkfd_total_mem_size in amdgpu_amdkfd_device_probe is incorrect because adev->gmc.real_vram_size is still 0 called from amdgpu_device_ip_early_init. Move the calculation to amdgpu_amdkfd_device_init to get the correct VRAM size. Do reverse calculation in amdgpu_amdkfd_device_fini_sw to support hot-unplugging GPUs. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Philip Yang authored
Under VRAM usage pression, map to GPU may fail to create pt bo and vmbo->shadow_list is not initialized, then ttm_bo_release calling amdgpu_bo_vm_destroy to access vmbo->shadow_list generates below dmesg and NULL pointer access backtrace: Set vmbo destroy callback to amdgpu_bo_vm_destroy only after creating pt bo successfully, otherwise use default callback amdgpu_bo_destroy. amdgpu: amdgpu_vm_bo_update failed amdgpu: update_gpuvm_pte() failed amdgpu: Failed to map bo to gpuvm amdgpu 0000:43:00.0: amdgpu: Failed to map peer:0000:43:00.0 mem_domain:2 BUG: kernel NULL pointer dereference, address: RIP: 0010:amdgpu_bo_vm_destroy+0x4d/0x80 [amdgpu] Call Trace: <TASK> ttm_bo_release+0x207/0x320 [amdttm] amdttm_bo_init_reserved+0x1d6/0x210 [amdttm] amdgpu_bo_create+0x1ba/0x520 [amdgpu] amdgpu_bo_create_vm+0x3a/0x80 [amdgpu] amdgpu_vm_pt_create+0xde/0x270 [amdgpu] amdgpu_vm_ptes_update+0x63b/0x710 [amdgpu] amdgpu_vm_update_range+0x2e7/0x6e0 [amdgpu] amdgpu_vm_bo_update+0x2bd/0x600 [amdgpu] update_gpuvm_pte+0x160/0x420 [amdgpu] amdgpu_amdkfd_gpuvm_map_memory_to_gpu+0x313/0x1130 [amdgpu] kfd_ioctl_map_memory_to_gpu+0x115/0x390 [amdgpu] kfd_ioctl+0x24a/0x5b0 [amdgpu] Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Arunpravin Paneer Selvam authored
DRM buddy manager allocates the contiguous memory requests in a single block or multiple blocks. So for the ttm move operation (incase of low vram memory) we should consider all the blocks to compute the total memory size which compared with the struct ttm_resource num_pages in order to verify that the blocks are contiguous for the eviction process. v2: Added a Fixes tag v3: Rewrite the code to save a bit of calculations and variables (Christian) Fixes: c9cad937 ("drm/amdgpu: add drm buddy support to amdgpu") Signed-off-by:Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by:
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Yuan Can authored
After commit 5a8132b9 ("drm/amd/display: remove dead dc vbios code"), no one use struct i2c_id_config_access, so remove it. Reviewed-by:
Yuan Can <yuancan@huawei.com> Signed-off-by:
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Dong Chenchen authored
Kernel test robot throws below warning -> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c: In function 'dcn31_hpo_dp_stream_enc_update_dp_info_packets': drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_hpo_dp_stream_encoder.c:439:14: warning: variable 'sdp_stream_enable' set but not used [-Wunused-but-set-variable] 439 | bool sdp_stream_enable = false; Removed unused variable 'sdp_stream_enable'. Reviewed-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Dong Chenchen <dongchenchen2@huawei.com> Signed-off-by:
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Randy Dunlap authored
Rectify multiple kernel-doc warnings in dcn32_fpu.c. E.g.: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:247: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Finds dummy_latency_index when MCLK switching using firmware based drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:484: warning: Function parameter or member 'phantom_stream' not described in 'dcn32_set_phantom_stream_timing' drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:601: warning: Function parameter or member 'dc' not described in 'dcn32_assign_subvp_pipe' drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:601: warning: Function parameter or member 'context' not described in 'dcn32_assign_subvp_pipe' drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:601: warning: Function parameter or member 'index' not described in 'dcn32_assign_subvp_pipe' drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:2140: warning: Function parameter or member 'dc' not described in 'dcn32_update_bw_bounding_box_fpu' drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:2140: warning: Function parameter or member 'bw_params' not described in 'dcn32_update_bw_bounding_box_fpu' drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:2140: warning: expecting prototype for dcn32_update_bw_bounding_box(). Prototype was for dcn32_update_bw_bounding_box_fpu() instead Reviewed-by:Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
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Yunxiang Li authored
manage_dm_interrupts disable/enable vblank using drm_crtc_vblank_off/on which causes drm_crtc_vblank_get in vrr_transition to fail, and later when drm_crtc_vblank_put is called the refcount on vblank will be messed up. Therefore move the call to after manage_dm_interrupts. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1247 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1380Tested-by:
Yunxiang Li <Yunxiang.Li@amd.com> Signed-off-by:
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Roman Li authored
[Why] DCN 3.1.4 supports DPIA. [How] - Set dpia_supported flag for dcn314 in dmub_hw_init() - Remove comment that becomes irrelevant after this change. Signed-off-by:
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Ruili Ji authored
This patch is to fix the SDMA user queue doorbell missing issue on SDMA 6.0. F32_WPTR_POLL_ENABLE has to be set if doorbell mode is used. Otherwise ringing SDMA user queue doorbell can't wake up system from gfxoff. Signed-off-by:
Ruili Ji <ruiliji2@amd.com> Reviewed-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
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Yang Yingliang authored
In some error path in amdgpu_sdma_init_microcode(), release_firmware() is not called, the memory allocated in request_firmware() will be leaked, calling amdgpu_sdma_destroy_inst_ctx() which calls release_firmware() to avoid memory leak. Fixes: 15aa1305 ("drm/amdgpu: add function to init SDMA microcode") Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Signed-off-by:
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Yang Li authored
clean up one inconsistent indenting Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2321Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Yang Li <yang.lee@linux.alibaba.com> Signed-off-by:
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Yang Li authored
clean up one inconsistent indenting Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2238Reported-by:
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Rodrigo Siqueira authored
This commit adds some minor code style changes just to reduce the merge conflicts we have when we upstream some of the VBA code. Reviewed-by:
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Rodrigo Siqueira authored
Update DSC checks in the DCN32 VBA. Reviewed-by:
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Rodrigo Siqueira authored
[Why] During transition from ODM combine to ODM bypass, if DSC is enabled need to disconnect the DSC mux for pipes no longer in use. [How] During ODM update, detect pipes with DSC that are no longer being used for new state and call new DSC interface to disconnect. Add new DSC interface to disconnect from pipe Reviewed-by:
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Martin Leung authored
why and how: needed to fix bad assumption for enable mcm_luts Reviewed-by:
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Aric Cyr authored
This version brings along the following: - ILR improvements - PSR fixes - DCN315 fixes - DCN32 fixes - ODM fixes - DSC fixes - SubVP fixes Reviewed-by:
Aric Cyr <aric.cyr@amd.com> Signed-off-by:
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Rodrigo Siqueira authored
If the current configuration supports 2 to 1 ODM policy, let's also enable the windowed MPO feature. Reviewed-by:
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Rodrigo Siqueira authored
For some reason, we missed the PState check for DCN32 which may cause issues for clock transition. This commit add that required hook. Reviewed-by:
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