- 13 May, 2024 11 commits
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Saleemkhan Jamadar authored
Added support to capture unsch fw debug logs in debugfs. To enable set amdgpu_umschfw_log =1 in boot args. v1 - rename variable to umsch_mm_fwlog (Veera) Signed-off-by:
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by:
Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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David (Ming Qiang) Wu authored
Based on the documentation the maximum resolustion should be 16384x16384. Signed-off-by:
David (Ming Qiang) Wu <David.Wu3@amd.com> Acked-by:
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David (Ming Qiang) Wu authored
On suspend, we need to set power gating state to GATE when VCN5 is busy, otherwise we will get following error on resume: [drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring vcn_unified_0 test failed (-110) [drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block <vcn_v5_0_0> failed -110 amdgpu: amdgpu_device_ip_resume failed (-110). PM: dpm_run_callback(): pci_pm_resume+0x0/0x100 returns -110 PM: failed to resume async: error -110 Signed-off-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
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David (Ming Qiang) Wu authored
We do not directly enable/disable VCN IRQ in vcn 5.0.0. And we do not handle the IRQ state as well. So the calls to disable IRQ and set state are removed. This effectively gets rid of the warining of "WARN_ON(!amdgpu_irq_enabled(adev, src, type))" in amdgpu_irq_put(). Signed-off-by: -
Ma Jun authored
Check the input value for CUSTOM profile mode setting on smu 11, smu13 and smu14. Otherwise we use uninitialized value of input[] Signed-off-by:
Ma Jun <Jun.Ma2@amd.com> Reviewed-by:
Yang Wang <kevinyang.wang@amd.com> Signed-off-by:
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Ma Jun authored
Check the input value for CUSTOM profile mode setting on legacy SOCs. Otherwise we may use uninitalized value of input[] Signed-off-by:
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Heiner Kallweit authored
Support for I2C_CLASS_SPD is currently being removed from the kernel. Only remaining step is to remove the definition of I2C_CLASS_SPD. Setting I2C_CLASS_SPD in a driver is a no-op meanwhile, so remove it here. Reviewed-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
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Shixiong Ou authored
In some causes, HPD signals will jitter when plugging in or unplugging HDMI. Rescheduling the hotplug work for a second when EDID may still be readable but HDP is disconnected, and fixes this issue. Signed-off-by:
Shixiong Ou <oushixiong@kylinos.cn> Signed-off-by:
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Ramesh Errabolu authored
Analysis of code by Coverity, a static code analyser, has identified a resource leak in the symbol hmm_range. This leak occurs when one of the prior steps before it is released encounters an error. Signed-off-by:
Ramesh Errabolu <Ramesh.Errabolu@amd.com> Reviewed-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
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Jack Xiao authored
Adjust mes12 initialization sequence to fix mapping legacy queue. v2: use dev_err. Signed-off-by:
Jack Xiao <Jack.Xiao@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Philip Yang authored
On system with khugepaged enabled and user cases with THP buffer, the hmm_range_fault may takes > 15 seconds to return -EBUSY, the arbitrary timeout value is not accurate, cause memory allocation failure. Remove the arbitrary timeout value, return EAGAIN to application if hmm_range_fault return EBUSY, then userspace libdrm and Thunk will call ioctl again. Change EAGAIN to debug message as this is not error. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
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- 08 May, 2024 29 commits
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Michael Chen authored
Currently oem_id is defined as uint8_t[6] and casted to uint64_t* in some use case. This would lead code scanner to complain about access beyond. Re-define it in union to enforce 8-byte size and alignment to avoid potential issue. Signed-off-by:
Michael Chen <michael.chen@amd.com> Reviewed-by:
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Michel Dänzer authored
It incorrectly claimed a resource isn't CPU visible if it's located at the very end of CPU visible VRAM. Fixes: a6ff969f ("drm/amdgpu: fix visible VRAM handling during faults") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3343Reviewed-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Jeremy Day <jsday@noreason.ca> Signed-off-by:
Michel Dänzer <mdaenzer@redhat.com> Signed-off-by:
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Srinivasan Shanmugam authored
This commit fixes multiple potential truncations when writing the strings _pfp.bin, _me.bin, _rlc.bin, and _mec.bin into the fw_name buffer in the gfx_v12_0_init_microcode function in the gfx_v12_0.c file The ucode_prefix size was reduced from 30 to 15 to ensure the snprintf function does not exceed the size of the fw_name buffer. Thus fixing the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c: In function ‘gfx_v12_0_early_init’: drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:421:54: warning: ‘_pfp.bin’ directive output may be truncated writing 8 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 421 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", ucode_prefix); | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:421:9: note: ‘snprintf’ output between 16 and 45 bytes into a destination of size 40 421 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:428:54: warning: ‘_me.bin’ directive output may be truncated writing 7 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 428 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", ucode_prefix); | ^~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:428:9: note: ‘snprintf’ output between 15 and 44 bytes into a destination of size 40 428 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:436:62: warning: ‘_rlc.bin’ directive output may be truncated writing 8 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 436 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", ucode_prefix); | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:436:17: note: ‘snprintf’ output between 16 and 45 bytes into a destination of size 40 436 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:448:54: warning: ‘_mec.bin’ directive output may be truncated writing 8 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 448 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", ucode_prefix); | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c:448:9: note: ‘snprintf’ output between 16 and 45 bytes into a destination of size 40 448 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Cc: Lijo Lazar <lijo.lazar@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
This commit fixes potential truncation when writing the string _imu.bin into the fw_name buffer in the imu_v12_0_init_microcode function in the imu_v12_0.c file The ucode_prefix size was reduced from 30 to 15 to ensure the snprintf function does not exceed the size of the fw_name buffer. Thus fixing the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/imu_v12_0.c: In function ‘imu_v12_0_init_microcode’: drivers/gpu/drm/amd/amdgpu/imu_v12_0.c:51:54: warning: ‘_imu.bin’ directive output may be truncated writing 8 bytes into a region of size between 4 and 33 [-Wformat-truncation=] 51 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_imu.bin", ucode_prefix); | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/imu_v12_0.c:51:9: note: ‘snprintf’ output between 16 and 45 bytes into a destination of size 40 51 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_imu.bin", ucode_prefix); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Cc: Lijo Lazar <lijo.lazar@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Tim Huang authored
Clear warning that read mc_data[i-1] may out-of-bounds. Signed-off-by:
Tim Huang <Tim.Huang@amd.com> Reviewed-by:
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Tim Huang authored
Clear warning that read ucode[] may out-of-bounds. Signed-off-by:
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Ma Jun authored
Function .set_power_profile_mode need an array as input parameter. So define variable workload as an array to fix the below coverity warning. "Passing &workload to function hwmgr->hwmgr_func->set_power_profile_mode which uses it as an array. This might corrupt or misinterpret adjacent memory locations" Signed-off-by:
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Ma Jun authored
Check the return value of amdgpu_xcp_get_inst_details, otherwise we may use an uninitialized variable inst_mask Signed-off-by:
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Ma Jun authored
Check the fb_channel_number range to avoid the array out-of-bounds read error Signed-off-by:
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Alex Deucher authored
This fixes HDP flushes on systems with non-4K pages. Reviewed-by:
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Alex Deucher authored
This fixes HDP flushes on systems with non-4K pages. Reviewed-by:
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Alex Deucher authored
This fixes HDP flushes on systems with non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
This will be used to consolidate the register remap offset configuration and fix HDP flushes on systems non-4K pages. Reviewed-by:
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Alex Deucher authored
Will be used to consolidate reg remap settings and fix HDP flushes on systems with non-4K pages. Reviewed-by:
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Alex Deucher authored
We don't get the right offset in that case. The GPU has an unused 4K area of the register BAR space into which you can remap registers. We remap the HDP flush registers into this space to allow userspace (CPU or GPU) to flush the HDP when it updates VRAM. However, on systems with >4K pages, we end up exposing PAGE_SIZE of MMIO space. Fixes: d8e408a8 ("drm/amdkfd: Expose HDP registers to user space") Reviewed-by:
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YiPeng Chai authored
Change log level. Signed-off-by:
YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by:
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Jesse Zhang authored
This patch enable UMD Pstates profile level for the renoir_set_performance_level interface. -profile_min_sclk -profile_min_fclk Signed-off-by:
Jesse Zhang <Jesse.Zhang@amd.com> Suggested-by:
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Likun Gao authored
Fix the coding error when load spl component for psp v14. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
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Tim Huang authored
Clear warning that using uninitialized variable r. Signed-off-by:
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Yang Wang authored
Fix null pointer issue when unload driver in SRIOV mode. Adjust the function position to ensure that the amdgpu_mca/aca_xxx_init() related functions can be initialized properly. Signed-off-by:
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