- 19 Jul, 2014 1 commit
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Olof Johansson authored
Merge tag 'renesas-clock2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.17" from Simon Horman: - Add legacy clocks for SCI for SoCs that do not yet have CCF support. This is to allow SCI (serial) devices to be enabled using DT and will be removed after CCF support is added for each SoC. * tag 'renesas-clock2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: sh73a0: add SCI clock support for DT ARM: shmobile: r8a7740: correct SCI clock support for DT ARM: shmobile: r8a73a4: add SCI clock support for DT ARM: shmobile: r8a7778: add SCI clock support for DT Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 13 Jul, 2014 3 commits
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Olof Johansson authored
Merge tag 'renesas-r8a7779-multiplatform3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Third Round of Renesas ARM Based SoC r8a7779-multiplatform Updates for v3.17" from Simon Horman: - Consistently use tabs for indentation * tag 'renesas-r8a7779-multiplatform3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: marzen: Consistently use tabs for indentation Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-cpufreq2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC CPUFreq Updates for v3.17" from Simon Horman: - Remove opps table check for cpufreq as this is already handled by the driver * tag 'renesas-cpufreq2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Remove opps table check for cpufreq Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-soc3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Third Round of Renesas ARM Based SoC Updates for v3.17" from Simon Horman: - Correct build failure in APMU code in the case of !SUSPEND * tag 'renesas-soc3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: fix shmobile_smp_apmu_suspend_init build failure for !SUSPEND Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 12 Jul, 2014 7 commits
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Olof Johansson authored
Merge tag 'renesas-soc2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC Updates for v3.17" from Simon Horman: * Suspend on non-SMP update for r8a7790 * Move r8a7791.h out of mach directory. This is part of a multi-stage effort to move headers out of that directory. * tag 'renesas-soc2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Allow r8a7791 to build non-SMP APMU code ARM: shmobile: Move r8a7791 reset code to pm-r8a7791.c ARM: shmobile: Allow r8a7790 to build non-SMP APMU code ARM: shmobile: Move r8a7790 reset code to pm-r8a7790.c ARM: shmobile: Use __init for APMU suspend init function ARM: shmobile: Adjust APMU code to build for non-SMP ARM: shmobile: Allow use of boot code for non-SMP case ARM: shmobile: Move r8a7791.h Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merging in as base to resolve a merge conflict with later soc branch locally.
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Olof Johansson authored
Merge tag 'renesas-r8a7779-multiplatform2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC r8a7779-multiplatform Updates for v3.17" from Simon Horman: - Move r8a7779.h out of mach directory. This is part of a multi-stage effort to move headers out of that directory. * tag 'renesas-r8a7779-multiplatform2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Move r8a7779.h Signed-off-by:
Olof Johansson <olof@lixom.net>
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Simon Horman authored
This will be used when initialising SCI devices using DT until common clock framework support is added. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
When initialising SCI devices their names will be .serial not .sci. This will be used when initialising SCI devices using DT until common clock framework support is added. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
This will be used when initialising SCI devices using DT until common clock framework support is added. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
This will be used when initialising SCI devices using DT until common clock framework support is added. Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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- 09 Jul, 2014 2 commits
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Gaku Inami authored
This patch is based on feedback from Viresh Kumar. Since cpufreq-cpu0 driver has already check opp table, there is no need to same check in mach-shmobile. Signed-off-by:
Gaku Inami <gaku.inami.xw@bp.renesas.com> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
Unify white space usage by consistently using tabs for indentation. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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- 08 Jul, 2014 4 commits
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git://git.infradead.org/users/hesselba/linux-berlinOlof Johansson authored
Merge "Berlin SoC changes for v3.17" from Sebastian Hesselbarth: - SMP support for BG2 and BG2Q * tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin: ARM: berlin: add SMP support Signed-off-by:
Olof Johansson <olof@lixom.net>
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git://git.infradead.org/linux-mvebuOlof Johansson authored
Merge "mvebu SoC changes for v3.17" from Jason Cooper: - kirkwood * add setup file for netxbig LEDs (non-trivial DT binding doesn't exist yet) - mvebu * staticize where needed * add CPU hotplug for Armada XP * add public datasheet for Armada 370 * don't apply thermal quirk by default * get SoC ID from the system controller when possible * tag 'mvebu-soc-3.17' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Staticize mvebu_cpu_reset_init ARM: mvebu: Staticize armada_370_xp_cpu_pm_init ARM: mvebu: Staticize armada_375_smp_cpu1_enable_wa ARM: mvebu: Use system controller to get the soc id when possible ARM: mvebu: Use the a standard errno in mvebu_get_soc_id ARM: mvebu: Don't apply the thermal quirk if the SoC revision is unknown Documentation: arm: add URLs to public datasheets for the Marvell Armada 370 SoC ARM: mvebu: implement CPU hotplug support for Armada XP ARM: mvebu: export PMSU idle enter/exit functions ARM: mvebu: slightly refactor/rename PMSU idle related functions ARM: mvebu: remove stub implementation of CPU hotplug on Armada 375/38x ARM: Kirkwood: Add setup file for netxbig LEDs ARM: mvebu: mark armada_370_xp_pmsu_idle_prepare() as static Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-soc-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC Updates for v3.17" from Simon Horman: - Use shmobile_init_late on r8a7791 and r8a7790 whien booting using DT-only - Support Core-Standby for Suspend to RAM on r8a7791 and r8a7790 SoCs - Shared CMA reservation for R-Car Gen2 SoCs - Add r8a7791 SYSC power management support * tag 'renesas-soc-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Remove ARCH_HAS_CPUFREQ config for shmobile ARM: shmobile: rcar-gen2: update call to dma_contiguous_reserve_area ARM: shmobile: rcar-gen2: correct return value of shmobile_smp_apmu_suspend_init ARM: shmobile: rcar-gen2: Remove useless copied section for LongTrail ARM: shmobile: rcar-gen2: Use "1ULL" instead of "(u64)1" ARM: shmobile: rcar-gen2: Update for of_get_flat_dt_prop() update ARM: shmobile: Add shared R-Car Gen2 CMA reservation code ARM: shmobile: Use shmobile_init_late() on r8a7791 DT-only ARM: shmobile: Use shmobile_init_late() on r8a7790 DT-only ARM: shmobile: Mark all SoCs in shmobile as CPUFreq, capable ARM: shmobile: r8a7791: Support Core-Standby for Suspend to RAM ARM: shmobile: r8a7790: Support Core-Standby for Suspend to RAM ARM: shmobile: APMU: Add Core-Standby-state for Suspend to RAM ARM: shmobile: r8a7791 SYSC setup code Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'versatile-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into next/soc Merge "DT IRQ and clock support for Versatile platforms" from Rob Herring. This branch moves IRQ and clock support over to DT for the versatile platforms. * tag 'versatile-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: clk: versatile: add versatile OSC support dts: versatile: add clock tree ARM: timer-sp: allow getting timer1 clock from DT to fallback to legacy clock dt/bindings: add compatible string for versatile osc clock dt/bindings: arm-boards: add binding for Versatile core module dts: versatile: add pl180 compatible strings ARM: versatile: remove init_irq hook for DT boot ARM: integrator: convert to use irqchip_init irqchip: versatile-fpga: add support for arm,versatile-sic irqchip: versatile-fpga: Add IRQCHIP_DECLARE support dts: versatile: add missing irq controller properties Tested-by:
Linus Walleij <linus.walleij@linaro.org> Acked-by:
Jason Cooper <jason@lakedaemon.net> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 07 Jul, 2014 4 commits
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Olof Johansson authored
Merge tag 'tegra-for-3.17-delay-timer' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc Merge "ARM: tegra: use us counter as delay timer" from Stephen Warren: Tegra has a micro-second counter whose rate doesn't vary with cpufreq changes. Register it so it can be used as the delay timer, so delays aren't influenced by cpufreq. * tag 'tegra-for-3.17-delay-timer' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: clocksource: tegra: Use us counter as delay timer ARM: choose highest resolution delay timer kernel: add calibration_delay_done() Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-r8a7779-multiplatform-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM Based SoC r8a7779-multiplatform Updates for v3.17" from Simon Horman: Move r8a7779 SoC and its Marzen board to use common clocks, multiplatform and initialise SCIF (serial) devices using DT. * tag 'renesas-r8a7779-multiplatform-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (32 commits) ARM: shmobile: marzen: Do not use workaround for scif devices ARM: shmobile: marzen: Initialise SCIF devices using DT ARM: shmobile: marzen: Remove early_printk from command line ARM: shmobile: r8a7779: Add scif nodes to dtsi ARM: shmobile: r8a7779 dtsi: Correct #address-cells/#size-cells for clocks ARM: shmobile: r8a7779 dtsi: Update unit-addresses for clocks ARM: shmobile: r8a7779: Remove unused r8a7779_init_delay() ARM: shmobile: marzen-reference: Use DT CPU Frequency ARM: shmobile: r8a7779: Use DT CPU Frequency in common case ARM: shmobile: r8a7779: Add Maximum CPU Frequency to DTS ARM: shmobile: marzen-reference: Remove legacy clock support ARM: shmobile: Remove Marzen reference DTS ARM: shmobile: Let Marzen multiplatform boot with Marzen DTB ARM: shmobile: Remove non-multiplatform Marzen reference support ARM: shmobile: marzen-reference: Instantiate clkdevs for SCIF and TMU ARM: shmobile: marzen-reference: Initialize CPG device ARM: shmobile: r8a7779: Initial multiplatform support ARM: shmobile: marzen-reference: Move clock and OF device initialisation into board code ARM: shmobile: r8a7779: Move r8a7779_earlytimer_init to clock-r8a7779.c ARM: shmobile: r8a7779: Add helper to read mode pins ... Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-cpufreq-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC Cpufreq Updates for v3.17" from Simon Horman * Add cpufreq-cpu0 device registration * tag 'renesas-cpufreq-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: add cpufreq-cpu0 driver for common SH-Mobile Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'renesas-clock-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC Clock Updates for v3.17" from Simon Horman: - Fix device node reference leakage in shmobile_init_delay * tag 'renesas-clock-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Fix device node reference leakage in shmobile_init_delay Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 06 Jul, 2014 1 commit
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Arnd Bergmann authored
Patch d6d757c9 ("ARM: shmobile: APMU: Add Core-Standby-state for Suspend to RAM") added both an inline wrapper for shmobile_smp_apmu_suspend_init and an empty function in arch/arm/mach-shmobile/platsmp-apmu.c. We get a build failure when both are present, so this patch removes the one in the .c file and keeps the inline version. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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- 30 Jun, 2014 5 commits
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Sachin Kamat authored
'mvebu_cpu_reset_init' is local to this file. Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Link: https://lkml.kernel.org/r/1403610235-22654-4-git-send-email-sachin.kamat@samsung.comSigned-off-by:
Sachin Kamat <sachin.kamat@samsung.com> Acked-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Sachin Kamat authored
'armada_370_xp_cpu_pm_init' is local to this file. Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Link: https://lkml.kernel.org/r/1403610235-22654-3-git-send-email-sachin.kamat@samsung.comSigned-off-by:
Sachin Kamat <sachin.kamat@samsung.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Sachin Kamat authored
'armada_375_smp_cpu1_enable_wa' is local to this file. Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Link: https://lkml.kernel.org/r/1403610235-22654-2-git-send-email-sachin.kamat@samsung.comSigned-off-by:
Sachin Kamat <sachin.kamat@samsung.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
On Armada 38x it is possible to get the SoC Id and the revision without using the PCI register. Accessing the PCI registers implies enabling its clock and, because of the initialization issue, not keeping them enable. So if possible it is better to avoid it. Armada 370 and Armada XP provides the SoC ID values from the system controller but not the revision. Armada 375 provides both but the SoC ID value looks buggy (0x6660 instead of 0x6720). Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1403538128-27859-1-git-send-email-gregory.clement@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
Instead of using -1 as error value, use a standard errno. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1403274953-21790-2-git-send-email-gregory.clement@free-electrons.comAcked-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- 29 Jun, 2014 10 commits
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Linus Torvalds authored
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git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds authored
Pull ARM fixes from Russell King: "Another round of ARM fixes. The largest change here is the L2 changes to work around problems for the Armada 37x/380 devices, where most of the size comes down to comments rather than code. The other significant fix here is for the ptrace code, to ensure that rewritten syscalls work as intended. This was pointed out by Kees Cook, but Will Deacon reworked the patch to be more elegant. The remainder are fairly trivial changes" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8087/1: ptrace: reload syscall number after secure_computing() check ARM: 8086/1: Set memblock limit for nommu ARM: 8085/1: sa1100: collie: add top boot mtd partition ARM: 8084/1: sa1100: collie: revert back to cfi_probe ARM: 8080/1: mcpm.h: remove unused variable declaration ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache
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Randy Dunlap authored
Note that I don't maintain Documentation/ABI/, Documentation/devicetree/, or the language translation files. Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Dan Carpenter authored
These days most people use git to send patches so I have added a section about that. Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Will Deacon authored
On the syscall tracing path, we call out to secure_computing() to allow seccomp to check the syscall number being attempted. As part of this, a SIGTRAP may be sent to the tracer and the syscall could be re-written by a subsequent SET_SYSCALL ptrace request. Unfortunately, this new syscall is ignored by the current code unless TIF_SYSCALL_TRACE is also set on the current thread. This patch slightly reworks the enter path of the syscall tracing code so that we always reload the syscall number from current_thread_info()->syscall after the potential ptrace traps. Acked-by:
Kees Cook <keescook@chromium.org> Tested-by:
Kees Cook <keescook@chromium.org> Signed-off-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Laura Abbott authored
Commit 1c2f87c2 (ARM: 8025/1: Get rid of meminfo) changed find_limits to use memblock_get_current_limit for calculating the max_low pfn. nommu targets never actually set a limit on memblock though which means memblock_get_current_limit will just return the default value. Set the memblock_limit to be the end of DDR to make sure bounds are calculated correctly. Signed-off-by:
Laura Abbott <lauraa@codeaurora.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Andrea Adami authored
The CFI mapping is now perfect so we can expose the top block, read only. There isn't much to read, though, just the sharpsl_params values. Signed-off-by:
Andrea Adami <andrea.adami@gmail.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Andrea Adami authored
Reverts commit d26b17ed ARM: sa1100: collie.c: fall back to jedec_probe flash detection Unfortunately the detection was challenged on the defective unit used for tests: one of the NOR chips did not respond to the CFI query. Moreover that bad device needed extra delays on erase-suspend/resume cycles. Tested personally on 3 different units and with feedback of two other users. Signed-off-by:
Andrea Adami <andrea.adami@gmail.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Nicolas Pitre authored
The sync_phys variable has been replaced by link time computation in mcpm_head.S before the code was submitted upstream. Signed-off-by:
Nicolas Pitre <nico@linaro.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Thomas Petazzoni authored
When a PL310 cache is used on a system that provides hardware coherency, the outer cache sync operation is useless, and can be skipped. Moreover, on some systems, it is harmful as it causes deadlocks between the Marvell coherency mechanism, the Marvell PCIe controller and the Cortex-A9. To avoid this, this commit introduces a new Device Tree property 'arm,io-coherent' for the L2 cache controller node, valid only for the PL310 cache. It identifies the usage of the PL310 cache in an I/O coherent configuration. Internally, it makes the driver disable the outer cache sync operation. Note that technically speaking, a fully coherent system wouldn't require any of the other .outer_cache operations. However, in practice, when booting secondary CPUs, these are not yet coherent, and therefore a set of cache maintenance operations are necessary at this point. This explains why we keep the other .outer_cache operations and only ->sync is disabled. While in theory any write to a PL310 register could cause the deadlock, in practice, disabling ->sync is sufficient to workaround the deadlock, since the other cache maintenance operations are only used in very specific situations. Contrary to previous versions of this patch, this new version does not simply NULL-ify the ->sync member, because the l2c_init_data structures are now 'const' and therefore cannot be modified, which is a good thing. Therefore, this patch introduces a separate l2c_init_data instance, called of_l2c310_coherent_data. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- 28 Jun, 2014 3 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spiLinus Torvalds authored
Pull spi fixes from Mark Brown: "A few driver specific fixes, the biggest one being a fix for the newly added Qualcomm SPI controller driver to make it not use its internal chip select due to hardware bugs, replacing it with GPIOs" * tag 'spi-v3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: qup: Remove chip select function spi: qup: Fix order of spi_register_master spi: sh-sci: fix use-after-free in sh_sci_spi_remove() spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulatorLinus Torvalds authored
Pull regulator fixes from Mark Brown: "Several driver specific fixes here, the palmas fixes being especially important for a range of boards - the recent updates to support new devices have introduced several regressions" * tag 'regulator-v3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: regulator: tps65218: Correct the the config register for LDO1 regulator: tps65218: Add the missing of_node assignment in probe regulator: palmas: fix typo in enable_reg calculation regulator: bcm590xx: fix vbus name regulator: palmas: Fix SMPS enable/disable/is_enabled
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git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pendingLinus Torvalds authored
Pull SCSI target fixes from Nicholas Bellinger: "Mostly minor fixes this time around. The highlights include: - iscsi-target CHAP authentication fixes to enforce explicit key values (Tejas Vaykole + rahul.rane) - fix a long-standing OOPs in target-core when a alua configfs attribute is accessed after port symlink has been removed. (Sebastian Herbszt) - fix a v3.10.y iscsi-target regression causing the login reject status class/detail to be ignored (Christoph Vu-Brugier) - fix a v3.10.y iscsi-target regression to avoid rejecting an existing ITT during Data-Out when data-direction is wrong (Santosh Kulkarni + Arshad Hussain) - fix a iscsi-target related shutdown deadlock on UP kernels (Mikulas Patocka) - fix a v3.16-rc1 build issue with vhost-scsi + !CONFIG_NET (MST)" * git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending: iscsi-target: fix iscsit_del_np deadlock on unload iovec: move memcpy_from/toiovecend to lib/iovec.c iscsi-target: Avoid rejecting incorrect ITT for Data-Out tcm_loop: Fix memory leak in tcm_loop_submission_work error path iscsi-target: Explicily clear login response PDU in exception path target: Fix left-over se_lun->lun_sep pointer OOPs iscsi-target; Enforce 1024 byte maximum for CHAP_C key value iscsi-target: Convert chap_server_compute_md5 to use kstrtoul
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