- 24 Mar, 2020 40 commits
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Vladyslav Tarasiuk authored
Currently, ethtool feature mask for checksum command is ORed with NETIF_F_FCOE_CRC_BIT, which is bit's position number, instead of the actual feature bit - NETIF_F_FCOE_CRC. The invalid bitmask here might affect unrelated features when toggling TX checksumming. For example, TX checksumming is always mistakenly reported as enabled on the netdevs tested (mlx5, virtio_net). Fixes: f70bb065 ("ethtool: update mapping of features to legacy ioctl requests") Signed-off-by:
Vladyslav Tarasiuk <vladyslavt@mellanox.com> Reviewed-by:
Michal Kubecek <mkubecek@suse.cz> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Dejin Zheng authored
use readl_poll_timeout() to replace the poll codes for simplify iproc_mdio_wait_for_idle() function Signed-off-by:
Dejin Zheng <zhengdejin5@gmail.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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David S. Miller authored
Merge tag 'wireless-drivers-next-2020-03-24' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers-next patches for v5.7 Second set of patches for v5.7. Lots of cleanup patches this time, but of course various new features as well fixes. When merging with wireless-drivers this pull request has a conflict in: drivers/net/wireless/intel/iwlwifi/pcie/drv.c To solve that just drop the changes from commit cf52c8a7 in wireless-drivers and take the hunk from wireless-drivers-next as is. The list of specific subsystem device IDs are not necessary after commit d6f2134a (in wireless-drivers-next) anymore, the detection is based on other characteristics of the devices. Major changes: qtnfmac * support WPA3 SAE and OWE in AP mode ath10k * support for getting btcoex settings from Device Tree * support QCA9377 SDIO device ath11k * add HE rate accounting * add thermal sensor and cooling devices mt76 * MT7663 support for the MT7615 driver ==================== Signed-off-by:
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David S. Miller authored
Vladimir Oltean says: ==================== PTP_CLK pin configuration for SJA1105 DSA driver This series adds support for the PTP_CLK pin on SJA1105 to be configured via the PTP subsystem, in the "periodic output" and "external timestamp input" modes. ==================== Signed-off-by: -
Vladimir Oltean authored
The SJA1105 switch family has a PTP_CLK pin which emits a signal with fixed 50% duty cycle, but variable frequency and programmable start time. On the second generation (P/Q/R/S) switches, this pin supports even more functionality. The use case described by the hardware documents talks about synchronization via oneshot pulses: given 2 sja1105 switches, arbitrarily designated as a master and a slave, the master emits a single pulse on PTP_CLK, while the slave is configured to timestamp this pulse received on its PTP_CLK pin (which must obviously be configured as input). The difference between the timestamps then exactly becomes the slave offset to the master. The only trouble with the above is that the hardware is very much tied into this use case only, and not very generic beyond that: - When emitting a oneshot pulse, instead of being told when to emit it, the switch just does it "now" and tells you later what time it was, via the PTPSYNCTS register. [ Incidentally, this is the same register that the slave uses to collect the ext_ts timestamp from, too. ] - On the sync slave, there is no interrupt mechanism on reception of a new extts, and no FIFO to buffer them, because in the foreseen use case, software is in control of both the master and the slave pins, so it "knows" when there's something to collect. These 2 problems mean that: - We don't support (at least yet) the quirky oneshot mode exposed by the hardware, just normal periodic output. - We abuse the hardware a little bit when we expose generic extts. Because there's no interrupt mechanism, we need to poll at double the frequency we expect to receive a pulse. Currently that means a non-configurable "twice a second". Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by:
Richard Cochran <richardcochran@gmail.com> Signed-off-by:
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Vladimir Oltean authored
The AVB table contains the CAS_MASTER field (to be added in the next patch) which decides the direction of the PTP_CLK pin. Reconfiguring this field dynamically is highly preferable to having to reset the switch and upload a new static configuration, so we add support for exactly that. Signed-off-by:
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Vladimir Oltean authored
Because the PTP_CLK pin starts toggling only at a time higher than the current PTP clock, this helper from the time-aware shaper code comes in handy here as well. We'll use it to transform generic user input for the perout request into valid input for the sja1105 hardware. Signed-off-by:
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Vladimir Oltean authored
These fields configure the destination and source MAC address that the switch will put in the Ethernet frames sent towards the CPU port that contain RX timestamps for PTP. These fields do not enable the feature itself, that is configured via SEND_META0 and SEND_META1 in the General Params table. The implication of this patch is that the AVB Params table will always be present in the static config. Which doesn't really hurt. This is needed because in a future patch, we will add another field from this table, CAS_MASTER, for configuring the PTP_CLK pin function. That can be configured irrespective of whether RX timestamping is enabled or not, so always having this table present is going to simplify things a bit. Signed-off-by:
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Logan Magee authored
checkpatch found a lack of appropriate whitespace after certain keywords as per the style guide. Add it in. Signed-off-by:
Logan Magee <mageelog@gmail.com> Signed-off-by:
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David S. Miller authored
Dejin Zheng says: ==================== introduce read_poll_timeout This patch sets is introduce read_poll_timeout macro, it is an extension of readx_poll_timeout macro. the accessor function op just supports only one parameter in the readx_poll_timeout macro, but this macro can supports multiple variable parameters for it. so functions like phy_read(struct phy_device *phydev, u32 regnum) and phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) can use this poll timeout framework. the first patch introduce read_poll_timeout macro, and the second patch redefined readx_poll_timeout macro by read_poll_timeout(), and the other patches are examples using read_poll_timeout macro. v6 -> v7: - add a parameter to supports that it can sleep some time before read operation in read_poll_timeout macro. - add prefix with double underscores for some variable to avoid any variable re-declaration or shadowing in patch 3 and patch 7. v5 -> v6: - add some check to keep the code more similar in patch 8 v4 -> v5: - add some msleep() before call phy_read_mmd_poll_timeout() to keep the code more similar in patch 6 and patch 9. - add a patch of drop by v4, it can add msleep before call phy_read_poll_timeout() to keep the code more similar. v3 -> v4: - add 3 examples of using new functions. - deal with precedence issues for parameter cond. - drop a patch about phy_poll_reset() function. v2 -> v3: - modify the parameter order of newly added functions. phy_read_mmd_poll_timeout(val, cond, sleep_us, timeout_us, \ phydev, devaddr, regnum) || \/ phy_read_mmd_poll_timeout(phydev, devaddr regnum, val, cond, \ sleep_us, timeout_us) phy_read_poll_timeout(val, cond, sleep_us, timeout_us, \ phydev, regnum) || \/ phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ timeout_us) v1 -> v2: - passed a phydev, device address and a reg to replace args... parameter in phy_read_mmd_poll_timeout() by Andrew Lunn 's suggestion in patch 3. Andrew Lunn <andrew@lunn.ch>, Thanks very much for your help! - also in patch 3, handle phy_read_mmd return an error(the return value < 0) in phy_read_mmd_poll_timeout(). Thanks Andrew again. - in patch 6, pass a phydev and a reg to replace args... parameter in phy_read_poll_timeout(), and also handle the phy_read() function's return error. ==================== Signed-off-by: -
Dejin Zheng authored
use phy_read_poll_timeout() to replace the poll codes for simplify tja11xx_check() function. Suggested-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Dejin Zheng authored
use phy_read_poll_timeout() to replace the poll codes for simplify lan87xx_read_status() function. Suggested-by:
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Dejin Zheng authored
use phy_read_poll_timeout() to replace the poll codes for simplify the code in phy_poll_reset() function. Reviewed-by:
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Dejin Zheng authored
it is sometimes necessary to poll a phy register by phy_read() function until its value satisfies some condition. introduce phy_read_poll_timeout() macros that do this. Suggested-by:
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Dejin Zheng authored
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify mv3310_reset() function. Suggested-by:
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Dejin Zheng authored
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify aqr107_wait_reset_complete() function. Reviewed-by:
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Dejin Zheng authored
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify bcm84881_wait_init() function. Reviewed-by:
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Dejin Zheng authored
it is sometimes necessary to poll a phy register by phy_read_mmd() function until its value satisfies some condition. introduce phy_read_mmd_poll_timeout() macros that do this. Suggested-by:
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Dejin Zheng authored
redefined readx_poll_timeout macro by read_poll_timeout to simplify the code. Signed-off-by:
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Dejin Zheng authored
this macro is an extension of readx_poll_timeout macro. the accessor function op just supports only one parameter in the readx_poll_timeout macro, but this macro can supports multiple variable parameters for it. so functions like phy_read(struct phy_device *phydev, u32 regnum) and phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) can also use this poll timeout core. and also expand it can sleep some time before read operation. Signed-off-by:
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David Laight authored
Previous changes to the IP routing code have removed all the tests for the DS_HOST route flag. Remove the flags and all the code that sets it. Signed-off-by:
David Laight <david.laight@aculab.com> Acked-by:
David Ahern <dsahern@gmail.com> Signed-off-by:
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Zheng zengkai authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/ethernet/cavium/thunder/nicvf_queues.c: In function nicvf_sq_free_used_descs: drivers/net/ethernet/cavium/thunder/nicvf_queues.c:1182:12: warning: variable tail set but not used [-Wunused-but-set-variable] It's not used since commit 4863dea3("net: Adding support for Cavium ThunderX network controller"), so remove it. Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Zheng zengkai <zhengzengkai@huawei.com> Signed-off-by:
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Florian Fainelli authored
Provide a flow_dissect callback which returns the network offset and where to find the skb protocol, given the tags structure a common function works for both tagging formats that are supported. Signed-off-by:
Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by:
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David S. Miller authored
Ido Schimmel says: ==================== devlink: Preparations for trap policers support This patch set prepares the code for devlink-trap policer support in a follow-up patch set [1][2]. No functional changes intended. Policers are going to be added as attributes of packet trap groups, which are entities used to aggregate logically related packet traps. This will allow users, for example, to limit all the packets that encountered an exception during routing to 10Kpps. However, currently, device drivers register their packet trap groups implicitly when they register their packet traps via devlink_traps_register(). This makes it difficult to pass additional attributes for the groups. For example, the policer bound to the group. Therefore, this patch set converts device drivers to explicitly register their packet trap groups. This will later allow these drivers to register the group with additional attributes, if any. ==================== Acked-by:
Jakub Kicinski <kuba@kernel.org> Signed-off-by:
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Ido Schimmel authored
Packet trap groups are now explicitly registered by drivers and not implicitly registered when the packet traps are registered. Therefore, there is no need to encode entire group structure the trap is associated with inside the trap structure. Instead, only pass the group identifier. Refer to it as initial group identifier, as future patches will allow user space to move traps between groups. Signed-off-by:
Ido Schimmel <idosch@mellanox.com> Reviewed-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
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Ido Schimmel authored
Now that drivers explicitly register their supported packet trap groups there is no for devlink to create them on-demand and destroy them when their reference count reaches zero. Signed-off-by:
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Ido Schimmel authored
Use the previously added API to explicitly register / unregister supported packet trap groups. This is in preparation for future patches that will enable drivers to pass additional group attributes, such as associated policer identifier. Signed-off-by:
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Ido Schimmel authored
Use the previously added API to explicitly register / unregister supported packet trap groups. This is in preparation for future patches that will enable drivers to pass additional group attributes, such as associated policer identifier. Signed-off-by:
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Ido Schimmel authored
Currently, packet trap groups are implicitly registered by drivers upon packet trap registration. When the traps are registered, each is associated with a group and the group is created by devlink, if it does not exist already. This makes it difficult for drivers to pass additional attributes for the groups. Therefore, as a preparation for future patches that require passing additional group attributes, add an API to explicitly register / unregister these groups. Next patches will convert existing drivers to use this API. Signed-off-by:
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David S. Miller authored
Heiner Kallweit says: ==================== r8169: improvements for scheduled task handling This series includes some improvements for handling of scheduled tasks. ==================== Signed-off-by: -
Heiner Kallweit authored
So far only the reset bit it set, but the handler executing the reset is not scheduled. Therefore nothing will happen until some other action schedules the handler. Improve this by ensuring that the handler is scheduled. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
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Heiner Kallweit authored
The current implementation makes the implicit assumption that if a bit is set, then the work is scheduled already. Remove the need for this implicit assumption and call schedule_work() always. It will check internally whether the work is scheduled already. Signed-off-by:
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Heiner Kallweit authored
Currently rtl_task() is designed to handle a large number of tasks. However we have just one, so we can remove some overhead. Signed-off-by:
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Heiner Kallweit authored
Factor out setting GPHY 10M to new helper rtl8168g_enable_gphy_10m. Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queueDavid S. Miller authored
Jeff Kirsher says: ==================== 100GbE Intel Wired LAN Driver Updates 2020-03-21 Implement basic support for the devlink interface in the ice driver. Additionally pave some necessary changes for adding a devlink region that exposes the NVM contents. This series first contains 5 patches for enabling and implementing full NVM read access via the ETHTOOL_GEEPROM interface. This includes some cleanup of endian-types, a new function for reading from the NVM and Shadow RAM as a flat addressable space, a function to calculate the available flash size during load, and a change to how some of the NVM version fields are stored in the ice_nvm_info structure. Following this is 3 patches for implementing devlink support. First, one patch which implements the basic framework and introduces the ice_devlink.c file. Second, a patch to implement basic .info_get support. Finally, a patch which reads the device PBA identifier and reports it as the `board.id` value in the .info_get response. ==================== Signed-off-by: -
David S. Miller authored
Sunil Goutham says: ==================== octeontx2-vf: Add network driver for virtual function This patch series adds network driver for the virtual functions of OcteonTX2 SOC's resource virtualization unit (RVU). Changes from v3: * Removed missed out EXPORT symbols in VF driver. Changes from v2: * Removed Copyright license text. * Removed wrapper fn()s around mutex_lock and unlock. * Got rid of using macro with 'return'. * Removed __weak fn()s. - Sugested by Leon Romanovsky and Andrew Lunn Changes from v1: * Removed driver version and fixed authorship * Removed driver version and fixed authorship in the already upstreamed AF, PF drivers. * Removed unnecessary checks in sriov_enable and xmit fn()s. * Removed WQ_MEM_RECLAIM flag while creating workqueue. * Added lock in tx_timeout task. * Added 'supported_coalesce_params' in ethtool ops. * Minor other cleanups. - Sugested by Jakub Kicinski ==================== Acked-by: -
Sunil Goutham authored
This patch removes wrapper fn()s around mutex_init/lock/unlock. Signed-off-by:
Sunil Goutham <sgoutham@marvell.com> Signed-off-by:
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Sunil Goutham authored
Removed MODULE_VERSION and fixed MODULE_AUTHOR. Signed-off-by:
Leon Romanovsky <leonro@mellanox.com> Signed-off-by:
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Geetha sowjanya authored
With MTU sized receive buffers it is not expected to have CQE_RX with multiple receive buffer pointers. But since same physcial link is shared by PF and it's VFs, the max receive packet configured at link could be morethan MTU. Hence there is a chance of receiving plts morethan MTU which then gets DMA'ed into multiple buffers and notified in a single CQE_RX. This patch treats such pkts as errors and frees up receive buffers pointers back to hardware. Also on the transmit side this patch sets SMQ MAXLEN to max value to avoid HW length errors for the packets whose size > MTU, eg due to path MTU. Signed-off-by:
Geetha sowjanya <gakula@marvell.com> Signed-off-by:
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Tomasz Duszynski authored
VF shares physical link with PF. Admin function (AF) sends notification to PF whenever a link change event happens. PF has to forward the same notification to each of the enabled VF. PF traps START/STOP_RX messages sent by VF to AF to keep track of VF's enabled/disabled state. Signed-off-by:
Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by:
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