- 28 Apr, 2016 4 commits
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Arnd Bergmann authored
Merge tag 'renesas-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Second Round of Renesas ARM Based SoC DT Updates for v4.7" from Simon Horman * Don't disable referenced optional clocks in DT of R-Car Gen 1 & 2 SoCs * tag 'renesas-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r8a7794: Don't disable referenced optional clocks ARM: dts: r8a7793: Don't disable referenced optional clocks ARM: dts: r8a7790: Don't disable referenced optional clocks ARM: dts: r8a7779: Don't disable referenced optional clocks ARM: dts: r8a7778: Don't disable referenced optional clocks
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git://github.com/vzapolskiy/linux-lpc32xxArnd Bergmann authored
Merge "NXP LPC32xx device tree updates for v4.7" from Vladimir Zapolskiy: This includes a few functional changes: * new representation of MIC, SIC1 and SIC2 interrupt controllers, * disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in shared lpc32xx.dtsi file, * added clock sources for SPI1 and SPI2, * set default clock rate of HCLK PLL to main osc rate multiplied by 16. Also there are some non-functional changes: * flatten board DTS files by exploiting device node labels, * add 'partitions' device node for NAND SLC / MTD OF, * correct Atmel vendor prefix to describe on board AT24 EEPROMs, * rename board DTS files by adding SoC name prefix. Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern. * tag 'lpc32xx-dt-4.7' of git://github.com/vzapolskiy/linux-lpc32xx: ARM: dts: lpc32xx: phy3250: add SoC name prefix to board dts file ARM: dts: lpc32xx: phy3250: add NAND partitions device node ARM: dts: lpc32xx: phy3250: avoid extension of device nodes by absolute path ARM: dts: lpc32xx: ea3250: add SoC name prefix to board dts file ARM: dts: lpc32xx: ea3250: fix Atmel at24 eeprom vendor ARM: dts: lpc32xx: ea3250: add NAND partitions device node ARM: dts: lpc32xx: ea3250: avoid extension of device nodes by absolute path ARM: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC dt-bindings: interrupt-controllers: add description of SIC1 and SIC2 ARM: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default ARM: dts: phy3250: enable ssp0 ARM: dts: lpc32xx: add clock properties to spi nodes ARM: dts: lpc32xx: set default clock rate of HCLK PLL
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Arnd Bergmann authored
Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt Merge "Second batch of DT changes for 4.7" from Nicolas Ferre: - three low priority fixes: - sama5d2: one pin definition and dependency with the slow clock for watchdog - sama5d4: definition of watchdog IRQ property - addition of the new shutdown controller to sama5d2 & sama5d2 Xplained * tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: dts: at91: sama5d2: add slow clock to watchdog node ARM: dts: at91: sama5d2: add shutdown controller node ARM: dts: at91: sama5d4: add watchdog interrupt property ARM: dts: at91: fix typo in sama5d2 PIN_PD24 description
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Arnd Bergmann authored
Merge tag 'sti-dt-for-v4.7b-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt Merge "STi DT updates for v4.7 #1" from Maxime Coquelin: Highlights: ----------- - Add CPUFreq support to STiH407 family - Add Mailbox nodes to STiH407 family - Add RemoteProc nodes to STiH407 family - Use 'reserved-memory' for DMA memory on STiH407 - Use the LPC timer as a clocksource * tag 'sti-dt-for-v4.7b-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti: ARM: dts: STi: STih407: Switch LPC mode from RTC to Clocksource ARM: dts: STiH407: Move over to using the 'reserved-memory' API for obtaining DMA memory ARM: dts: STiH407: Add nodes for RemoteProc ARM: dts: STi: stih407-family: Add nodes for Mailbox ARM: dts: STi: STiH407: Provide CPU with a means to look-up Major number ARM: dts: STi: STiH407: Link CPU with its voltage supply ARM: dts: STi: STiH407: Provide CPU with clocking information ARM: dts: STi: STiH407: Provide generic (safe) DVFS configuration
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- 27 Apr, 2016 17 commits
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Vladimir Zapolskiy authored
To simplify matching of DTS files of all NXP LPC32xx powered boards by a file name add 'lpc3250' prefix to PHYTEC PHYCORE-LPC3250 board dts file. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Vladimir Zapolskiy authored
To declare MTD OF partitions NAND controller device node should have a special 'partitions' subnode, the change removes a debug message from mtd/ofpart on boot: nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash@20020000. Trying to parse direct subnodes as partitions. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Vladimir Zapolskiy authored
The change simplifies layout of PHY3250 board description by referencing device nodes of LPC32xx controllers by label. No functional change intended. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Vladimir Zapolskiy authored
To simplify matching of DTS files of all NXP LPC32xx powered boards by a file name add 'lpc3250' prefix to Embedded Artists LPC3250 board dts file. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Vladimir Zapolskiy authored
There is no 'at' hardware vendor defined yet, correct vendor prefix for Atmel is 'atmel'. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Vladimir Zapolskiy authored
To declare MTD OF partitions NAND controller device node should have a special 'partitions' subnode, the change removes a debug message from mtd/ofpart on boot: nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash@20020000. Trying to parse direct subnodes as partitions. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Vladimir Zapolskiy authored
The change simplifies layout of EA3250 board description by referencing device nodes of LPC32xx controllers by label. No functional change intended. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Vladimir Zapolskiy authored
The change adds separate device nodes for SIC1 and SIC2 interrupt controllers and reparents all defined SIC1 and SIC2 interrupt producers to the correspondent interrupt controller, this is needed to perform switching to a new LPC32xx MIC/SIC interrupt controller driver. Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Vladimir Zapolskiy authored
NXP LPC32xx has three interrupt controllers, namely root Main Interrupt Controller (MIC) and two supplementary Sub Interrupt Controllers (SIC1 and SIC2), four interrupt outputs from SIC1 and SIC2 are connected to MIC. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Nicolas Ferre authored
As the watchdog timer needs the slow clock, add it to the currently defined wdt node. Reported-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Nicolas Ferre authored
Add the SAMA5D2-Compatible Shutdown Controller node to sama5d2.dtsi and the use of it in the sama5d2 Xplained board dts file. Enable the RTC wakeup event and the "wake up" button support through the input "0" that is present on the board. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
The "interrupts" property is missing from the watchdog node. Add it with highest priority value of 7. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Geert Uytterhoeven authored
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 26 Apr, 2016 19 commits
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Lee Jones authored
This aligns with the internal configuration. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Lee Jones authored
Doing so saves quite a bit of code in the driver. For more information on the 'reserved-memory' bindings see: Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt Suggested-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Lee Jones authored
Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Lee Jones authored
This patch supplies the Mailbox Controller nodes. In order to request channels, these nodes will be referenced by Mailbox Client nodes. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Lee Jones authored
This is used for CPU Frequency Scaling. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Lee Jones authored
Used for Voltage Scaling using CPUFreq. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Lee Jones authored
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Lee Jones authored
You'll notice that the voltage cell is populated with 0's. Voltage information is very platform specific, even depends on 'cut' and 'substrate' versions. Thus it is left blank for a generic (safe) implementation. If other nodes/properties are provided by the bootloader, the ST CPUFreq driver will over-ride these generic values. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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https://github.com/superna9999/linuxArnd Bergmann authored
Merge "ARM: dts: Add OXNAS Platform Bindings" from Neil Armstrong: * tag 'ox810se-arm-dt-v4.6-rc3' of https://github.com/superna9999/linux: ARM: boot: dts: Add Western Digital My Book World Edition device tree dt-bindings: Add Western Digital to vendor prefixes dt-bindings: Add OXNAS bindings ARM: boot: dts: Add Oxford Semiconductor OX810SE dtsi dt-bindings: Add Oxford Semiconductor to vendor prefixes dt-bindings: irq: arm,versatile-fpga: add compatible string for OX810SE SoC
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Vladimir Murzin authored
Application Notes 399 and 400 shares the same memory map and features. Both are shipped with Cortex-M7 and have the same peripheral as AN385/AN386, but with different location of PSRAM and Ethernet controller. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Vladimir Murzin authored
Application Notes 385 and 386 shares the same memory map and features except the CPU is used. AN385 is supplied with Cortex-M3 CPU and AN386 is supplied with Cortex-M4. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Arnd Bergmann authored
Merge tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Renesas ARM Based SoC Fixes for v4.6 * Correct preset_lpj calculation which may lead to too short delays * Correct handling of optional clocks on r8a7791 to restore access to the serial port the porter board This is a backmerge of v4.6 fixes, to avoid a merge conflict between 4.6 and our next/dt branch. * tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: timer: Fix preset_lpj leading to too short delays Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins" ARM: dts: r8a7791: Don't disable referenced optional clocks
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Florian Vallee authored
Fix a typo on PIN_PD24 for UTXD2 and FLEXCOM4_IO3 which were wrongly linked to PIN_PD23). Signed-off-by: Florian Vallee <fvallee@eukrea.fr> Fixes: 7f16cb67 ("ARM: at91/dt: add sama5d2 pinmux") Cc: stable@vger.kernel.org # v4.4+ [nicolas.ferre@atmel.com: add commit message, changed subject] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Neil Armstrong authored
Add Western Digital My Book World Edition device tree based on Oxford Semiconductor OX810SE SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Neil Armstrong authored
Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Neil Armstrong authored
Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Neil Armstrong authored
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Neil Armstrong authored
Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Neil Armstrong authored
Under the OX810SE, this same controller is used as "Reference Peripheral Specification" Interrupt Controller, so add new compatible string to support the Oxford Semiconductor OX810SE SoC Interrupt Controller. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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