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  1. 03 Sep, 2019 1 commit
  2. 28 Aug, 2019 1 commit
  3. 09 Aug, 2019 4 commits
  4. 25 Jul, 2019 1 commit
  5. 18 Jun, 2019 2 commits
    • Anurag Kumar Vulisha's avatar
      usb: dwc3: gadget: Add support for disabling U1 and U2 entries · 729dcffd
      Anurag Kumar Vulisha authored
      Gadget applications may have a requirement to disable the U1 and U2
      entry based on the usecase. Below are few usecases where the disabling
      U1/U2 entries may be possible.
      
      Usecase 1:
      When combining dwc3 with an redriver for a USB Type-C device solution, it
      sometimes have problems with leaving U1/U2 for certain hosts, resulting in
      link training errors and reconnects. For this U1/U2 state entries may be
      avoided.
      
      Usecase 2:
      When performing performance benchmarking on mass storage gadget the
      U1 and U2 entries can be disabled.
      
      Usecase 3:
      When periodic transfers like ISOC transfers are used with bInterval
      of 1 which doesn't require the link to enter into U1 or U2 state entry
      (since ping is issued from host for every uframe interval). In this
      case the U1 and U2 entry can be disabled.
      
      Disablement of U1/U2 can be done by setting U1DevExitLat and U2DevExitLat
      values to 0 in the BOS descriptor. Host on seeing 0 value for U1DevExitLat
      and U2DevExitLat, it doesn't send SET_SEL requests to the gadget. There
      may be some hosts which may send SET_SEL requests even after seeing 0 in
      the UxDevExitLat of BOS descriptor. To aviod U1/U2 entries for these type
      of hosts, dwc3 controller can be programmed to reject those U1/U2 requests
      by not enabling ACCEPTUxENA bits in DCTL register.
      
      This patch updates the same.
      Signed-off-by: default avatarAnurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
      Signed-off-by: default avatarClaus H. Stovgaard <cst@phaseone.com>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      729dcffd
    • Enric Balletbo i Serra's avatar
      usb: dwc3: Fix core validation in probe, move after clocks are enabled · dc1b5d9a
      Enric Balletbo i Serra authored
      The required clocks needs to be enabled before the first register
      access. After commit fe8abf33 ("usb: dwc3: support clocks and resets
      for DWC3 core"), this happens when the dwc3_core_is_valid function is
      called, but the mentioned commit adds that call in the wrong place,
      before the clocks are enabled. So, move that call after the
      clk_bulk_enable() to ensure the clocks are enabled and the reset
      deasserted.
      
      I detected this while, as experiment, I tried to move the clocks and resets
      from the glue layer to the DWC3 core on a Samsung Chromebook Plus.
      
      That was not detected before because, in most cases, the glue layer
      initializes SoC-specific things and then populates the child "snps,dwc3"
      with those clocks already enabled.
      
      Fixes: b873e2d0 ("usb: dwc3: Do core validation early on probe")
      Signed-off-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      dc1b5d9a
  6. 03 May, 2019 4 commits
    • Thinh Nguyen's avatar
      usb: dwc3: Fix default lpm_nyet_threshold value · 8d791929
      Thinh Nguyen authored
      The max possible value for DCTL.LPM_NYET_THRES is 15 and not 255. Change
      the default value to 15.
      
      Cc: stable@vger.kernel.org
      Fixes: 80caf7d2 ("usb: dwc3: add lpm erratum support")
      Signed-off-by: default avatarThinh Nguyen <thinhn@synopsys.com>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      8d791929
    • Thinh Nguyen's avatar
      usb: dwc3: Do core validation early on probe · b873e2d0
      Thinh Nguyen authored
      The setting of the dr_mode may need to check the controller's revision.
      The revision is set in the dwc3_core_is_valid(), which comes after
      dr_mode setting. Let's move it closer to the start of the dwc3_probe()
      function and before calling dwc3_get_dr_mode().
      Signed-off-by: default avatarThinh Nguyen <thinhn@synopsys.com>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      b873e2d0
    • Marek Szyprowski's avatar
      usb: dwc3: move synchronize_irq() out of the spinlock protected block · 41a91c60
      Marek Szyprowski authored
      dwc3_gadget_suspend() is called under dwc->lock spinlock. In such context
      calling synchronize_irq() is not allowed. Move the problematic call out
      of the protected block to fix the following kernel BUG during system
      suspend:
      
      BUG: sleeping function called from invalid context at kernel/irq/manage.c:112
      in_atomic(): 1, irqs_disabled(): 128, pid: 1601, name: rtcwake
      6 locks held by rtcwake/1601:
       #0: f70ac2a2 (sb_writers#7){.+.+}, at: vfs_write+0x130/0x16c
       #1: b5fe1270 (&of->mutex){+.+.}, at: kernfs_fop_write+0xc0/0x1e4
       #2: 7e597705 (kn->count#60){.+.+}, at: kernfs_fop_write+0xc8/0x1e4
       #3: 8b3527d0 (system_transition_mutex){+.+.}, at: pm_suspend+0xc4/0xc04
       #4: fc7f1c42 (&dev->mutex){....}, at: __device_suspend+0xd8/0x74c
       #5: 4b36507e (&(&dwc->lock)->rlock){....}, at: dwc3_gadget_suspend+0x24/0x3c
      irq event stamp: 11252
      hardirqs last  enabled at (11251): [<c09c54a4>] _raw_spin_unlock_irqrestore+0x6c/0x74
      hardirqs last disabled at (11252): [<c09c4d44>] _raw_spin_lock_irqsave+0x1c/0x5c
      softirqs last  enabled at (9744): [<c0102564>] __do_softirq+0x3a4/0x66c
      softirqs last disabled at (9737): [<c0128528>] irq_exit+0x140/0x168
      Preemption disabled at:
      [<00000000>]   (null)
      CPU: 7 PID: 1601 Comm: rtcwake Not tainted
      5.0.0-rc3-next-20190122-00039-ga3f4ee4f8a52 #5252
      Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
      [<c01110f0>] (unwind_backtrace) from [<c010d120>] (show_stack+0x10/0x14)
      [<c010d120>] (show_stack) from [<c09a4d04>] (dump_stack+0x90/0xc8)
      [<c09a4d04>] (dump_stack) from [<c014c700>] (___might_sleep+0x22c/0x2c8)
      [<c014c700>] (___might_sleep) from [<c0189d68>] (synchronize_irq+0x28/0x84)
      [<c0189d68>] (synchronize_irq) from [<c05cbbf8>] (dwc3_gadget_suspend+0x34/0x3c)
      [<c05cbbf8>] (dwc3_gadget_suspend) from [<c05bd020>] (dwc3_suspend_common+0x154/0x410)
      [<c05bd020>] (dwc3_suspend_common) from [<c05bd34c>] (dwc3_suspend+0x14/0x2c)
      [<c05bd34c>] (dwc3_suspend) from [<c051c730>] (platform_pm_suspend+0x2c/0x54)
      [<c051c730>] (platform_pm_suspend) from [<c05285d4>] (dpm_run_callback+0xa4/0x3dc)
      [<c05285d4>] (dpm_run_callback) from [<c0528a40>] (__device_suspend+0x134/0x74c)
      [<c0528a40>] (__device_suspend) from [<c052c508>] (dpm_suspend+0x174/0x588)
      [<c052c508>] (dpm_suspend) from [<c0182134>] (suspend_devices_and_enter+0xc0/0xe74)
      [<c0182134>] (suspend_devices_and_enter) from [<c0183658>] (pm_suspend+0x770/0xc04)
      [<c0183658>] (pm_suspend) from [<c0180ddc>] (state_store+0x6c/0xcc)
      [<c0180ddc>] (state_store) from [<c09a9a70>] (kobj_attr_store+0x14/0x20)
      [<c09a9a70>] (kobj_attr_store) from [<c02d6800>] (sysfs_kf_write+0x4c/0x50)
      [<c02d6800>] (sysfs_kf_write) from [<c02d594c>] (kernfs_fop_write+0xfc/0x1e4)
      [<c02d594c>] (kernfs_fop_write) from [<c02593d8>] (__vfs_write+0x2c/0x160)
      [<c02593d8>] (__vfs_write) from [<c0259694>] (vfs_write+0xa4/0x16c)
      [<c0259694>] (vfs_write) from [<c0259870>] (ksys_write+0x40/0x8c)
      [<c0259870>] (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x28)
      Exception stack(0xed55ffa8 to 0xed55fff0)
      ...
      
      Fixes: 01c10880 ("usb: dwc3: gadget: synchronize_irq dwc irq in suspend")
      Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      41a91c60
    • Andy Shevchenko's avatar
      usb: dwc3: Free resource immediately after use · 75ecb9dd
      Andy Shevchenko authored
      When we read an array of integers from device properties,
      the temporary buffer is allocated.
      
      However, in case of dwc3_set_incr_burst_type() it's not freed.
      Free allocated buffer immediately after use.
      Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      75ecb9dd
  7. 26 Nov, 2018 6 commits
  8. 06 Nov, 2018 1 commit
  9. 02 Oct, 2018 1 commit
  10. 30 Jul, 2018 3 commits
  11. 18 Jun, 2018 1 commit
  12. 16 May, 2018 1 commit
    • Masahiro Yamada's avatar
      usb: dwc3: support clocks and resets for DWC3 core · fe8abf33
      Masahiro Yamada authored
      Historically, the clocks and resets are handled on the glue layer
      side instead of the DWC3 core.  For simple cases, dwc3-of-simple.c
      takes care of arbitrary number of clocks and resets.  The DT node
      structure typically looks like as follows:
      
        dwc3-glue {
                compatible = "foo,dwc3";
                clocks = ...;
                resets = ...;
                ...
      
                dwc3 {
                        compatible = "snps,dwc3";
                        ...
                };
        }
      
      By supporting the clocks and the reset in the dwc3/core.c, it will
      be turned into a single node:
      
        dwc3 {
                compatible = "foo,dwc3", "snps,dwc3";
                clocks = ...;
                resets = ...;
                ...
        }
      
      This commit adds the binding of clocks and resets specific to this IP.
      The number of clocks should generally be the same across SoCs, it is
      just some SoCs either tie clocks together or do not provide software
      control of some of the clocks.
      
      I took the clock names from the Synopsys datasheet: "ref" (ref_clk),
      "bus_early" (bus_clk_early), and "suspend" (suspend_clk).
      
      I found only one reset line in the datasheet, hence the reset-names
      property is omitted.
      
      Those clocks are required for new platforms.  Enforcing the new
      binding breaks existing platforms since they specify clocks (and
      resets) in their glue layer node, but nothing in the core node.
      I listed such exceptional cases in the DT binding.  The driver
      code has been relaxed to accept no clock.  This change is based
      on the discussion [1].
      
      I inserted reset_control_deassert() and clk_bulk_enable() before the
      first register access, i.e. dwc3_cache_hwparams().
      
      [1] https://patchwork.kernel.org/patch/10284265/Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      Reviewed-by: default avatarRob Herring <robh@kernel.org>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      fe8abf33
  13. 15 May, 2018 2 commits
  14. 22 Mar, 2018 3 commits
  15. 13 Mar, 2018 2 commits
  16. 28 Feb, 2018 1 commit
  17. 15 Feb, 2018 1 commit
    • Roger Quadros's avatar
      usb: dwc3: core: Fix ULPI PHYs and prevent phy_get/ulpi_init during suspend/resume · 98112041
      Roger Quadros authored
      In order for ULPI PHYs to work, dwc3_phy_setup() and dwc3_ulpi_init()
      must be doene before dwc3_core_get_phy().
      
      commit 541768b0 ("usb: dwc3: core: Call dwc3_core_get_phy() before initializing phys")
      broke this.
      
      The other issue is that dwc3_core_get_phy() and dwc3_ulpi_init() should
      be called only once during the life cycle of the driver. However,
      as dwc3_core_init() is called during system suspend/resume it will
      result in multiple calls to dwc3_core_get_phy() and dwc3_ulpi_init()
      which is wrong.
      
      Fix this by moving dwc3_ulpi_init() out of dwc3_phy_setup()
      into dwc3_core_ulpi_init(). Use a flag 'ulpi_ready' to ensure that
      dwc3_core_ulpi_init() is called only once from dwc3_core_init().
      
      Use another flag 'phys_ready' to call dwc3_core_get_phy() only once from
      dwc3_core_init().
      
      Fixes: 541768b0 ("usb: dwc3: core: Call dwc3_core_get_phy() before initializing phys")
      Fixes: f54edb53 ("usb: dwc3: core: initialize ULPI before trying to get the PHY")
      Cc: linux-stable <stable@vger.kernel.org> # >= v4.13
      Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      98112041
  18. 12 Feb, 2018 2 commits
  19. 29 Dec, 2017 1 commit
    • Vivek Gautam's avatar
      phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800 · d8c80bb3
      Vivek Gautam authored
      Adding phy calibration sequence for USB 3.0 DRD PHY present on
      Exynos5420/5800 systems.
      This calibration facilitates setting certain PHY parameters viz.
      the Loss-of-Signal (LOS) Detector Threshold Level, as well as
      Tx-Vboost-Level for Super-Speed operations.
      Additionally we also set proper time to wait for RxDetect measurement,
      for desired PHY reference clock, so as to solve issue with enumeration
      of few USB 3.0 devices, like Samsung SUM-TSB16S 3.0 USB drive
      on the controller.
      
      We are using CR_port for this purpose to send required data
      to override the LOS values.
      
      On testing with USB 3.0 devices on USB 3.0 port present on
      SMDK5420, and peach-pit boards should see following message:
      usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd
      
      and without this patch, should see below shown message:
      usb 1-1: new high-speed USB device number 2 using xhci-hcd
      
      [Also removed unnecessary extra lines in the register macro definitions]
      Signed-off-by: default avatarVivek Gautam <gautam.vivek@samsung.com>
      [adapted to use phy_calibrate as entry point]
      Signed-off-by: default avatarAndrzej Pietrasiewicz <andrzej.p@samsung.com>
      Acked-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
      Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
      d8c80bb3
  20. 11 Dec, 2017 1 commit
    • Roger Quadros's avatar
      usb: dwc3: Allow disabling of metastability workaround · 42bf02ec
      Roger Quadros authored
      Some platforms (e.g. TI's DRA7 USB2 instance) have more trouble
      with the metastability workaround as it supports only
      a High-Speed PHY and the PHY can enter into an Erratic state [1]
      when the controller is set in SuperSpeed mode as part of
      the metastability workaround.
      
      This causes upto 2 seconds delay in enumeration on DRA7's USB2
      instance in gadget mode.
      
      If these platforms can be better off without the workaround,
      provide a device tree property to suggest that so the workaround
      is avoided.
      
      [1] Device mode enumeration trace showing PHY Erratic Error.
           irq/90-dwc3-969   [000] d...    52.323145: dwc3_event: event (00000901): Erratic Error [U0]
           irq/90-dwc3-969   [000] d...    52.560646: dwc3_event: event (00000901): Erratic Error [U0]
           irq/90-dwc3-969   [000] d...    52.798144: dwc3_event: event (00000901): Erratic Error [U0]
      Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
      Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      42bf02ec
  21. 07 Nov, 2017 1 commit
    • Greg Kroah-Hartman's avatar
      USB: dwc3: Remove redundant license text · b5ea4757
      Greg Kroah-Hartman authored
      Now that the SPDX tag is in all USB files, that identifies the license
      in a specific and legally-defined manner.  So the extra GPL text wording
      can be removed as it is no longer needed at all.
      
      This is done on a quest to remove the 700+ different ways that files in
      the kernel describe the GPL license text.  And there's unneeded stuff
      like the address (sometimes incorrect) for the FSF which is never
      needed.
      
      No copyright headers or other non-license-description text was removed.
      
      Cc: Kukjin Kim <kgene@kernel.org>
      Cc: Krzysztof Kozlowski <krzk@kernel.org>
      Cc: Patrice Chotard <patrice.chotard@st.com>
      Acked-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b5ea4757