- 13 Jan, 2021 17 commits
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Dmitry Osipenko authored
Tegra PHY driver now supports waking up controller from a low power mode. Enable runtime PM in order to put controller into the LPM during idle. Tested-by:
Matt Merhar <mattmerhar@protonmail.com> Tested-by:
Nicolas Chauvet <kwizart@gmail.com> Tested-by:
Peter Geis <pgwipeout@gmail.com> Tested-by:
Ion Agorria <ion@agorria.com> Acked-by:
Peter Chen <peter.chen@kernel.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20201218120246.7759-7-digetx@gmail.comSigned-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Peter Geis authored
Add USB host mode to the Tegra HDRC driver. This allows us to benefit from support provided by the generic ChipIdea driver instead of duplicating the effort in a separate ehci-tegra driver. Tested-by:
Thierry Reding <treding@nvidia.com> Acked-by:
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Dmitry Osipenko authored
Rename all occurrences in the code from "udc" to "usb" and change the Kconfig entry in order to show that this driver supports USB modes other than device-only mode. The follow up patch will add host-mode support and it will be cleaner to perform the renaming separately, i.e. in this patch. Tested-by:
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Dmitry Osipenko authored
The OF core adds an alias based on the OF device ID table, which is enough to have the driver autoloaded. The legacy MODULE_ALIAS macro was relevant to a pre-OF board files which manually created platform devices, this is irrelevant to the modern ARM kernels since devices are created by the OF core. Remove the unnecessary macro in order to keep the driver's code cleaner. Tested-by:
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Dmitry Osipenko authored
Support programming of waking up from a low power mode by implementing the generic set_wakeup() callback of the USB PHY API. Tested-by:
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Dmitry Osipenko authored
The PHY hardware needs the delay of 2ms after power up, otherwise initial interrupt may be lost if USB controller is accessed before PHY is settled down. Previously this issue was masked by implicit delays, but now it pops up after squashing the older ehci-tegra driver into the ChipIdea driver. Tested-by:
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Chunfeng Yun authored
fix the warning: WARNING:REPEATED_WORD: Possible repeated word: 'and' Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Acked-by:
Felipe Balbi <balbi@kernel.org> Signed-off-by:
Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1610505748-30616-11-git-send-email-chunfeng.yun@mediatek.comSigned-off-by:
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Chunfeng Yun authored
fix checkpatch.pl error: ERROR:SPACING: space prohibited before that ',' Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Chunfeng Yun authored
WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements WARNING:TABSTOP: Statements should start on a tabstop Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Chunfeng Yun authored
Prefer using the BIT macro to define bit fileds Cc: Florian Fainelli <f.fainelli@gmail.com> Reported-by:
kernel test robot <lkp@intel.com> Acked-by:
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Chunfeng Yun authored
Add () around macro argument to avoid precedence issues Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Chunfeng Yun authored
This is used to avoid the warning of function arguments, e.g. WARNING:FUNCTION_ARGUMENTS: function definition argument 'u32' should also have an identifier name Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Chunfeng Yun authored
fix the warning: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Chunfeng Yun authored
Use '"%s...", __func__' to replace embedded function name Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Chunfeng Yun authored
Prefer kzalloc(sizeof(*bd_table)...) over kzalloc(sizeof(struct bd_table) Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Chunfeng Yun authored
No definition for bdc_ep_set_halt(), so remove it. Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Chunfeng Yun authored
For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Cc: Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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- 12 Jan, 2021 23 commits
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Mayank Rana authored
UCSI already conveys the information about a port's connection status, whether it is operating in UFP or DFP mode, and whether the partner supports USB data or not. This information can be used to notify a dual-role controller to start up its host or peripheral mode accordingly. Add optional support for this by querying each port's fwnode to look for an associated USB role switch device. If present, call usb_role_switch_set() with the determined data role upon Connect Change or Connector Partner Change updates. Reviewed-by:
Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by:
Mayank Rana <mrana@codeaurora.org> Signed-off-by:
Jack Pham <jackp@codeaurora.org> Link: https://lore.kernel.org/r/20210111215520.18476-1-jackp@codeaurora.orgSigned-off-by:
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Amelie Delaunay authored
Link Power Management (LPM) on STM32MP15 OTG HS encounters instabilities with some Host controllers. OTG core fails to exit L1 state in 200us: "dwc2 49000000.usb-otg: Failed to exit L1 sleep state in 200us." Then the device is still not enumerated. To avoid this issue, disable Link Power Management on STM32MP15 HS OTG. Acked-by:
Minas Harutyunyan <Minas.Harutyunyan@synopsys.com> Signed-off-by:
Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20210105094855.30763-4-amelie.delaunay@foss.st.comSigned-off-by:
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Amelie Delaunay authored
When the core is in FS host mode, using the FS transceiver, and a Low-Speed device is connected, transceiver clock is 6Mhz. So, to support Low-Speed devices, enable support of FS/LS Low Power mode, so that the PHY supplies a 6 MHz clock during Low-Speed mode. Acked-by:
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Amelie Delaunay authored
STM32MP15 ahbcfg register default value sets Burst length/type (HBSTLEN) to Single (32-bit accesses on AHB), which is not recommended, according to STM32MP157 Reference manual [1]. This patch sets Burst length/type (HBSTLEN) so that bus transactions target 16x32 bit accesses. This improves OTG controller performance. [1] https://www.st.com/resource/en/reference_manual/dm00327659.pdf, p.3149 Acked-by:
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Davidlohr Bueso authored
Currently a tasklet is used to transmit input substream buffer data. However, tasklets have long been deprecated as being too heavy on the system by running in irq context - and this is not a performance critical path. If a higher priority process wants to run, it must wait for the tasklet to finish before doing so. Deferring work to a workqueue and executing in process context should be fine considering the callback already does f_midi_do_transmit() under the transmit_lock and thus changes in semantics are ok regarding concurrency - tasklets being serialized against itself. Cc: Takashi Iwai <tiwai@suse.de> Reviewed-by:
Takashi Iwai <tiwai@suse.de> Acked-by:
Davidlohr Bueso <dbueso@suse.de> Link: https://lore.kernel.org/r/20210111042855.73289-1-dave@stgolabs.netSigned-off-by:
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Andy Shevchenko authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210111135458.57084-1-andriy.shevchenko@linux.intel.comSigned-off-by:
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Andy Shevchenko authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Acked-by:
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Thinh Nguyen authored
For some UDCs, the initialization sequence by udc_start() should not be repeated until it is properly cleaned up with udc_stop() and vise versa. We may run into some cleanup failure as seen with the DWC3 driver during the irq cleanup. This issue can occur when the user triggers soft-connect/soft-disconnect from the soft_connect sysfs. To avoid adding checks to every UDC driver, at the UDC framework, introduce a "started" state to track and prevent the UDC from repeating the udc_start() and udc_stop() if it had already started/stopped. Acked-by:
Thinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/a7c4112fcd4dc2f0169af94a24f5685ca77f09fd.1610395599.git.Thinh.Nguyen@synopsys.comSigned-off-by:
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Yejune Deng authored
devm_reset_control_array_get_optional_shared() looks more readable Reviewed-by:
Yejune Deng <yejune.deng@gmail.com> Link: https://lore.kernel.org/r/1604375863-6649-1-git-send-email-yejune.deng@gmail.comSigned-off-by:
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Serge Semin authored
Intel Keem Bay DWC3 compatible DT nodes are supposed to have a DWC USB3 compatible sub-node to describe a fully functioning USB interface. Let's use the available DWC USB3 DT schema to validate the Intel Keem Bay DWC3 sub-nodes. Note since the generic DWC USB3 DT node is supposed to be named as generic USB HCD ("^usb(@.*)?") one we have to accordingly fix the sub-nodes name regexp and fix the DT node example. Reviewed-by:Rob Herring <robh@kernel.org> Acked-by:
Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> Signed-off-by:
Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20201210090944.16283-20-Sergey.Semin@baikalelectronics.ruSigned-off-by:
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Serge Semin authored
Qualcomm msm8996/sc7180/sdm845 DWC3 compatible DT nodes are supposed to have a DWC USB3 compatible sub-node to describe a fully functioning USB interface. Let's use the available DWC USB3 DT schema to validate the Qualcomm DWC3 sub-nodes. Note since the generic DWC USB3 DT node is supposed to be named as generic USB HCD ("^usb(@.*)?") one we have to accordingly fix the sub-nodes name regexp and fix the DT node example. Reviewed-by: -
Serge Semin authored
TI Keystone DWC3 compatible DT node is supposed to have a DWC USB3 compatible sub-node to describe a fully functioning USB interface. Since DWC USB3 has now got a DT schema describing its DT node, let's make sure the TI Keystone DWC3 sub-node passes validation against it. Reviewed-by:
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Serge Semin authored
Amlogic G12A USB DT sub-nodes are supposed to be compatible with the generic DWC USB2 and USB3 devices. Since now we've got DT schemas for both of the later IP cores let's make sure that the Amlogic G12A USB DT nodes are fully evaluated including the DWC sub-nodes. Reviewed-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by:
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Serge Semin authored
An empty snps,quirk-frame-length-adjustment won't cause any change performed by the driver. Moreover the DT schema validation will fail, since it expects the property being assigned with some value. So set fix the example by setting a valid FL-adj value in accordance with Neil Armstrong comment. Link: https://lore.kernel.org/linux-usb/20201010224121.12672-16-Sergey.Semin@baikalelectronics.ru/Reviewed-by:
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Serge Semin authored
In accordance with the IP core databook the snps,quirk-frame-length-adjustment property can be set within [0, 0x3F]. Let's make sure the DT schema applies a correct constraints on the property. Reviewed-by:
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Serge Semin authored
In accordance with the driver comments the PIPE3 de-emphasis can be tuned to be either -6dB, -2.5dB or disabled. Let's add the de-emphasis property constraints so the DT schema would make sure the controller DT node is equipped with correct value. Reviewed-by:
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Serge Semin authored
The DWC USB3 driver and some DTS files like Exynos 5250, Keystone k2e, etc expects the DWC USB3 DT node to have the compatible string with the "synopsys" vendor prefix. Let's add the corresponding compatible string to the controller DT schema, but mark it as deprecated seeing the Synopsys, Inc. is presented with just "snps" vendor prefix. Reviewed-by:
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Serge Semin authored
The controller driver supports two types of DWC USB3 devices: with a common interrupt lane and with individual interrupts for each mode. Add support for both these cases to the DWC USB3 DT schema. Reviewed-by:
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Serge Semin authored
DWC USB3 DT node is supposed to be compliant with the Generic xHCI Controller schema, but with additional vendor-specific properties, the controller-specific reference clocks and PHYs. So let's convert the currently available legacy text-based DWC USB3 bindings to the DT schema and make sure the DWC USB3 nodes are also validated against the usb-xhci.yaml schema. Note 1. we have to discard the nodename restriction of being prefixed with "dwc3@" string, since in accordance with the usb-hcd.yaml schema USB nodes are supposed to be named as "^usb(@.*)". Note 2. The clock-related properties are marked as optional to match the DWC USB3 driver expectation and to improve the bindings mainainability so in case if there is a glue-node it would the responsible for the clocks initialization. Reviewed-by:
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Serge Semin authored
With minor peculiarities (like uploading some vendor-specific firmware) these are just Generic xHCI controllers fully compatible with its properties. Make sure the Renesas USB xHCI DT nodes are also validated against the Generic xHCI DT schema. Reviewed-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by:
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Serge Semin authored
For some reason the "brcm,xhci-brcm-v2" compatible string has been missing in the original bindings file. Add it to the Generic xHCI Controllers DT schema since the controller driver expects it to be supported. Reviewed-by:
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Serge Semin authored
Currently the DT bindings of Generic xHCI Controllers are described by means of the legacy text file. Since such format is deprecated in favor of the DT schema, let's convert the Generic xHCI Controllers bindings file to the corresponding yaml files. There will be two of them: a DT schema for the xHCI controllers on a generic platform and a DT schema validating a generic xHCI controllers properties. The later will be used to validate the xHCI controllers, which aside from some vendor-specific features support the basic xHCI functionality. An xHCI-compatible DT node shall support the standard USB HCD properties and custom ones like: usb2-lpm-disable, usb3-lpm-capable, quirk-broken-port-ped and imod-interval-ns. In addition if a generic xHCI controller is being validated against the DT schema it is also supposed to be equipped with mandatory compatible string, single registers range, single interrupts source, and is supposed to optionally contain up to two reference clocks for the controller core and CSRs. Reviewed-by:
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Serge Semin authored
Even though the Generic PHY framework is the more preferable way of setting the USB PHY up, there are still many dts-files and DT bindings which rely on having the legacy "usb-phy" specified to attach particular USB PHYs to USB cores. Let's have the "usb-phy" property described in the generic USB HCD binding file so it would be validated against the nodes in which it's specified. Mark the property as deprecated to discourage the developers from using it. Reviewed-by:
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