- 05 Jul, 2012 17 commits
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Bjorn Helgaas authored
* pci/rafael-pci_set_power_state-rebase: PCI / PM: restore the original behavior of pci_set_power_state()
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Bjorn Helgaas authored
* pci/myron-pcibios_setup: xtensa/PCI: factor out pcibios_setup() x86/PCI: adjust section annotations for pcibios_setup() unicore32/PCI: adjust section annotations for pcibios_setup() tile/PCI: factor out pcibios_setup() sparc/PCI: factor out pcibios_setup() sh/PCI: adjust section annotations for pcibios_setup() sh/PCI: factor out pcibios_setup() powerpc/PCI: factor out pcibios_setup() parisc/PCI: factor out pcibios_setup() MIPS/PCI: adjust section annotations for pcibios_setup() MIPS/PCI: factor out pcibios_setup() microblaze/PCI: factor out pcibios_setup() ia64/PCI: factor out pcibios_setup() cris/PCI: factor out pcibios_setup() alpha/PCI: factor out pcibios_setup() PCI: pull pcibios_setup() up into core
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Rafael J. Wysocki authored
Commit cc2893b6 (PCI: Ensure we re-enable devices on resume) addressed the problem with USB not being powered after resume on recent Lenovo machines, but it did that in a suboptimal way. Namely, it should have changed the relevant code paths only, which are pci_pm_resume_noirq() and pci_pm_restore_noirq() supposed to restore the device's power and standard configuration registers after system resume from suspend or hibernation. Instead, however, it modified pci_set_power_state() which is executed in several other situations too. That resulted in some undesirable effects, like attempting to change a device's power state in the same way multiple times in a row (up to as many as 4 times in a row in the snd_hda_intel driver). Fix the bug addressed by commit cc2893b6 in an alternative way, by forcibly powering up all devices in pci_pm_default_resume_early(), which is called by pci_pm_resume_noirq() and pci_pm_restore_noirq() to restore the device's power and standard configuration registers, and modifying pci_pm_runtime_resume() to avoid the forcible power-up if not necessary. Then, revert the changes made by commit cc2893b6 to make the confusion introduced by it go away. Acked-by:
Matthew Garrett <mjg@redhat.com> Signed-off-by:
Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Signed-off-by:
Myron Stowe <myron.stowe@redhat.com> Signed-off-by:
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Myron Stowe authored
Make pcibios_setup() consistently use the "__init" section annotation. Signed-off-by:
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Myron Stowe authored
Make pcibios_setup() consistently use the "__init" section annotation. Acked-by:
Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Acked-by:
Chris Metcalf <cmetcalf@tilera.com> Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Acked-by:
David S. Miller <davem@davemloft.net> Signed-off-by:
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Myron Stowe authored
Make pcibios_setup() consistently use the "__init" section annotation. Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Tested-by:
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Acked-by:
Paul Mundt <lethal@linux-sh.org> Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Acked-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Signed-off-by:
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Myron Stowe authored
Make pcibios_setup() consistently use the "__init" section annotation. Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Acked-by:
Michal Simek <monstr@monstr.eu> Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Acked-by:
Tony Luck <tony.luck@intel.com> Signed-off-by:
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. This patch fixes what looks like a bug in cris, which implements pcibios_setup() such that pci_setup() doesn't look for any generic options. Signed-off-by:
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- 26 Jun, 2012 2 commits
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Myron Stowe authored
The PCI core provides a generic pcibios_setup() routine. Drop this architecture-specific version in favor of that. Acked-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
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Myron Stowe authored
Currently, all of the architectures implement their own pcibios_setup() routine. Most of the implementations do nothing so this patch introduces a generic (__weak) routine in the core that can be used by all architectures as a default. If necessary, it can be overridden by architecture-specific code. Signed-off-by:
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- 23 Jun, 2012 5 commits
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Bjorn Helgaas authored
* topic/huang-d3cold-v7: PCI/PM: add PCIe runtime D3cold support PCI: do not call pci_set_power_state with PCI_D3cold PCI/PM: add runtime PM support to PCIe port ACPI/PM: specify lowest allowed state for device sleep state
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Huang Ying authored
This patch adds runtime D3cold support and corresponding ACPI platform support. This patch only enables runtime D3cold support; it does not enable D3cold support during system suspend/hibernate. D3cold is the deepest power saving state for a PCIe device, where its main power is removed. While it is in D3cold, you can't access the device at all, not even its configuration space (which is still accessible in D3hot). Therefore the PCI PM registers can not be used to transition into/out of the D3cold state; that must be done by platform logic such as ACPI _PR3. To support wakeup from D3cold, a system may provide auxiliary power, which allows a device to request wakeup using a Beacon or the sideband WAKE# signal. WAKE# is usually connected to platform logic such as ACPI GPE. This is quite different from other power saving states, where devices request wakeup via a PME message on the PCIe link. Some devices, such as those in plug-in slots, have no direct platform logic. For example, there is usually no ACPI _PR3 for them. D3cold support for these devices can be done via the PCIe Downstream Port leading to the device. When the PCIe port is powered on/off, the device is powered on/off too. Wakeup events from the device will be notified to the corresponding PCIe port. For more information about PCIe D3cold and corresponding ACPI support, please refer to: - PCI Express Base Specification Revision 2.0 - Advanced Configuration and Power Interface Specification Revision 5.0 [bhelgaas: changelog] Reviewed-by:
Zheng Yan <zheng.z.yan@intel.com> Signed-off-by:
Huang Ying <ying.huang@intel.com> Signed-off-by:
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Huang Ying authored
PCI subsystem has not been ready for D3cold support yet. So PCI_D3cold should not be used as parameter for pci_set_power_state. This patch is needed for upcoming PCI_D3cold support. This patch has no functionality change, because pci_set_power_state will bound the parameter to PCI_D3hot too. CC: Michal Miroslaw <mirq-linux@rere.qmqm.pl> CC: Jesse Barnes <jesse.barnes@intel.com> Reviewed-by:
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Zheng Yan authored
This patch adds runtime PM support to PCIe port. This is needed by PCIe D3cold support, where PCIe device without ACPI node may be powered on/off by PCIe port. Because runtime suspend is broken for some chipsets, a black list is used to disable runtime PM support for these chipsets. Reviewed-by:
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Huang Ying authored
Lower device sleep state can save more power, but has more exit latency too. Sometimes, to satisfy some power QoS and other requirement, we need to constrain the lowest device sleep state. In this patch, a parameter to specify lowest allowed state for acpi_pm_device_sleep_state is added. So that the caller can enforce the constraint via the parameter. This is needed by PCIe D3cold support, where the lowest power state allowed may be D3_HOT instead of default D3_COLD. CC: Len Brown <lenb@kernel.org> CC: linux-acpi@vger.kernel.org Reviewed-by:
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- 22 Jun, 2012 16 commits
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Bjorn Helgaas authored
* topic/jiang-mmconfig-v10: ACPI: mark acpi_sfi_table_parse() as __init x86/PCI: use pr_level() to replace printk(KERN_LEVEL) x86/PCI: refine __pci_mmcfg_init() for better code readability x86/PCI: get rid of redundant log messages x86/PCI: simplify pci_mmcfg_late_insert_resources() x86/PCI: update MMCONFIG information when hot-plugging PCI host bridges PCI/ACPI: provide MMCONFIG address for PCI host bridges x86/PCI: add pci_mmconfig_insert()/delete() for PCI root bridge hotplug x86/PCI: prepare pci_mmcfg_check_reserved() to be called at runtime x86/PCI: introduce pci_mmcfg_arch_map()/pci_mmcfg_arch_unmap() x86/PCI: use RCU list to protect mmconfig list x86/PCI: split out pci_mmconfig_alloc() for code reuse x86/PCI: split out pci_mmcfg_check_reserved() for code reuse
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Jiang Liu authored
Mark function acpi_sfi_table_parse() as __init to avoid warning messages: WARNING: vmlinux.o(.text+0x4cd2d2): Section mismatch in reference from the function acpi_sfi_table_parse.clone.0() to the function Function acpi_sfi_table_parse() calls acpi_table_parse() and pci_parse_mcfg(), which are both marked as __init. Currently acpi_sfi_table_parse() is only used by MMCONFIG to scan MCFG table at boot time only, so it's safe to mark acpi_sfi_table_parse() as __init. Reviewed-by:
Yinghai Lu <yinghai@kernel.org> Signed-off-by:
Jiang Liu <liuj97@gmail.com> Signed-off-by:
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Bjorn Helgaas authored
* topic/bjorn-trivial: PCI: remove useless pcix_set_mmrbc() dev->bus check PCI: acpiphp: check whether _ADR evaluation succeeded PCI: shpchp: remove dead code PCI: fix P2P bridge I/O port window sign extension PCI: fix upstream P2P bridge checks when enabling OBFF and LTR PCI: use __weak consistently PCI: cleanup assign_requested_resources_sorted() kernel-doc warning sparc/PCI: remove unused pcibios_assign_resource() definition
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Bjorn Helgaas authored
* topic/fixes-for-3.5: MAINTAINERS: correct PCI git tree address
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Bjorn Helgaas authored
Signed-off-by: -
Jiang Liu authored
Script checkpatch.pl recommends to replace printk(KERN_LVL) with pr_lvl(), so do it. Reviewed-by:
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Jiang Liu authored
Refine __pci_mmcfg_init() for better code readability. Reviewed-by:
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Jiang Liu authored
For each resource of a PCI host bridge, the arch code and PCI code log following messages. We don't need both, so drop the arch-specific printing. pci_root PNP0A08:00: host bridge window [io 0x0000-0x03af] pci_bus 0000:00: root bus resource [io 0x0000-0x03af] Reviewed-by: -
Jiang Liu authored
Reduce redundant code to simplify pci_mmcfg_late_insert_resources(). Reviewed-by:
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Jiang Liu authored
This patch enhances x86 arch-specific code to update MMCONFIG information when PCI host bridge hotplug event happens. Reviewed-by:
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Jiang Liu authored
This patch provide MMCONFIG address for PCI host bridges, which will be used to support host bridge hotplug. It gets MMCONFIG address by evaluating _CBA method if available. Reviewed-by:
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Jiang Liu authored
Introduce pci_mmconfig_insert()/pci_mmconfig_delete(), which will be used to update MMCONFIG information when supporting PCI root bridge hotplug. Reviewed-by:
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Jiang Liu authored
Prepare function pci_mmcfg_check_reserved() to be called at runtime for PCI host bridge hot-plugging Reviewed-by:
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Jiang Liu authored
Introduce pci_mmcfg_arch_map()/pci_mmcfg_arch_unmap(), which will be used when supporting PCI root bridge hotplug. Reviewed-by:
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Jiang Liu authored
Use RCU list to protect mmconfig list from dynamic change when supporting PCI host bridge hotplug. Reviewed-by:
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Jiang Liu authored
Split out pci_mmconfig_alloc() for code reuse, which will be used when supporting PCI root bridge hotplug. Reviewed-by:
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